ARM: "armv4_5" command prefix becomes "arm"
[openocd.git] / tcl / board / at91rm9200-dk.cfg
1 #
2 # This is for the "at91rm9200-DK" (not the EK) eval board.
3 #
4 # The two are probably very simular.... I have DK...
5 #
6 # It has atmel at91rm9200 chip.
7 source [find target/at91rm9200.cfg]
8 $_TARGETNAME configure -event gdb-attach { reset init }
9 $_TARGETNAME configure -event reset-init { at91rm9200_dk_init }
10
11 #flash bank <driver> <base> <size> <chip_width> <bus_width>
12 flash_bank cfi 0x10000000 0x00200000 2 2 0
13
14
15 proc at91rm9200_dk_init { } {
16 # Try to run at 1khz... Yea, that slow!
17 # Chip is really running @ 32khz
18 jtag_khz 8
19
20 mww 0xfffffc64 0xffffffff
21 ## disable all clocks but system clock
22 mww 0xfffffc04 0xfffffffe
23 ## disable all clocks to pioa and piob
24 mww 0xfffffc14 0xffffffc3
25 ## master clock = slow cpu = slow
26 ## (means the CPU is running at 32khz!)
27 mww 0xfffffc30 0
28 ## main osc enable
29 mww 0xfffffc20 0x0000ff01
30 ## program pllA
31 mww 0xfffffc28 0x20263e04
32 ## program pllB
33 mww 0xfffffc2c 0x10483e0e
34 ## let pll settle... sleep 100msec
35 sleep 100
36 ## switch to fast clock
37 mww 0xfffffc30 0x202
38 ## Sleep some - (go read)
39 sleep 100
40
41 #========================================
42 # CPU now runs at 180mhz
43 # SYS runs at 60mhz.
44 jtag_khz 40000
45 #========================================
46
47
48 ## set memc for all memories
49 mww 0xffffff60 0x02
50 ## program smc controller
51 mww 0xffffff70 0x3284
52 ## init sdram
53 mww 0xffffff98 0x7fffffd0
54 ## all banks precharge
55 mww 0xffffff80 0x02
56 ## touch sdram chip to make it work
57 mww 0x20000000 0
58 ## sdram controller mode register
59 mww 0xffffff90 0x04
60 mww 0x20000000 0
61 mww 0x20000000 0
62 mww 0x20000000 0
63 mww 0x20000000 0
64 mww 0x20000000 0
65 mww 0x20000000 0
66 mww 0x20000000 0
67 mww 0x20000000 0
68 ## sdram controller mode register
69 ## Refresh, etc....
70 mww 0xffffff90 0x03
71 mww 0x20000080 0
72 mww 0xffffff94 0x1f4
73 mww 0x20000080 0
74 mww 0xffffff90 0x10
75 mww 0x20000000 0
76 mww 0xffffff00 0x01
77
78 }

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