e480da9307ffc0594195d90fcae3316388f52e2b
[openocd.git] / src / target / xscale.h
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2007,2008 √ėyvind Harboe *
6 * oyvind.harboe@zylin.com *
7 * *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
12 * *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
17 * *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
23 #ifndef XSCALE_H
24 #define XSCALE_H
25
26 #include "arm.h"
27 #include "armv4_5_mmu.h"
28 #include "trace.h"
29
30 #define XSCALE_COMMON_MAGIC 0x58534341
31
32 /* These four JTAG instructions are architecturally defined.
33 * Lengths are core-specific; originally 5 bits, later 7.
34 */
35 #define XSCALE_DBGRX 0x02
36 #define XSCALE_DBGTX 0x10
37 #define XSCALE_LDIC 0x07
38 #define XSCALE_SELDCSR 0x09
39
40 /* Possible CPU types */
41 #define XSCALE_IXP4XX_PXA2XX 0x0
42 #define XSCALE_PXA3XX 0x4
43
44 enum xscale_debug_reason
45 {
46 XSCALE_DBG_REASON_GENERIC,
47 XSCALE_DBG_REASON_RESET,
48 XSCALE_DBG_REASON_TB_FULL,
49 };
50
51 enum xscale_trace_entry_type
52 {
53 XSCALE_TRACE_MESSAGE = 0x0,
54 XSCALE_TRACE_ADDRESS = 0x1,
55 };
56
57 struct xscale_trace_entry
58 {
59 uint8_t data;
60 enum xscale_trace_entry_type type;
61 };
62
63 struct xscale_trace_data
64 {
65 struct xscale_trace_entry *entries;
66 int depth;
67 uint32_t chkpt0;
68 uint32_t chkpt1;
69 uint32_t last_instruction;
70 unsigned int num_checkpoints;
71 struct xscale_trace_data *next;
72 };
73
74 enum trace_mode
75 {
76 XSCALE_TRACE_DISABLED,
77 XSCALE_TRACE_FILL,
78 XSCALE_TRACE_WRAP
79 };
80
81 struct xscale_trace
82 {
83 struct image *image; /* source for target opcodes */
84 struct xscale_trace_data *data; /* linked list of collected trace data */
85 int buffer_fill; /* maximum number of trace runs to read */
86 int fill_counter; /* running count during trace collection */
87 enum trace_mode mode;
88 enum arm_state core_state; /* current core state (ARM, Thumb) */
89 };
90
91 struct xscale_common
92 {
93 /* armv4/5 common stuff */
94 struct arm armv4_5_common;
95
96 int common_magic;
97
98 /* XScale registers (CP15, DBG) */
99 struct reg_cache *reg_cache;
100
101 /* current state of the debug handler */
102 uint32_t handler_address;
103
104 /* target-endian buffers with exception vectors */
105 uint32_t low_vectors[8];
106 uint32_t high_vectors[8];
107
108 /* static low vectors */
109 uint8_t static_low_vectors_set; /* bit field with static vectors set by the user */
110 uint8_t static_high_vectors_set; /* bit field with static vectors set by the user */
111 uint32_t static_low_vectors[8];
112 uint32_t static_high_vectors[8];
113
114 /* DCache cleaning */
115 uint32_t cache_clean_address;
116
117 /* whether hold_rst and ext_dbg_break should be set */
118 int hold_rst;
119 int external_debug_break;
120
121 /* breakpoint / watchpoint handling */
122 int dbr_available;
123 int dbr0_used;
124 int dbr1_used;
125 int ibcr_available;
126 int ibcr0_used;
127 int ibcr1_used;
128 uint32_t arm_bkpt;
129 uint16_t thumb_bkpt;
130
131 uint8_t vector_catch;
132
133 struct xscale_trace trace;
134
135 int arch_debug_reason;
136
137 /* MMU/Caches */
138 struct armv4_5_mmu_common armv4_5_mmu;
139 uint32_t cp15_control_reg;
140
141 int fast_memory_access;
142
143 /* CPU variant */
144 int xscale_variant;
145 };
146
147 static inline struct xscale_common *
148 target_to_xscale(struct target *target)
149 {
150 return container_of(target->arch_info, struct xscale_common,
151 armv4_5_common);
152 }
153
154 struct xscale_reg
155 {
156 int dbg_handler_number;
157 struct target *target;
158 };
159
160 enum
161 {
162 XSCALE_MAINID, /* 0 */
163 XSCALE_CACHETYPE,
164 XSCALE_CTRL,
165 XSCALE_AUXCTRL,
166 XSCALE_TTB,
167 XSCALE_DAC,
168 XSCALE_FSR,
169 XSCALE_FAR,
170 XSCALE_PID,
171 XSCALE_CPACCESS,
172 XSCALE_IBCR0, /* 10 */
173 XSCALE_IBCR1,
174 XSCALE_DBR0,
175 XSCALE_DBR1,
176 XSCALE_DBCON,
177 XSCALE_TBREG,
178 XSCALE_CHKPT0,
179 XSCALE_CHKPT1,
180 XSCALE_DCSR,
181 XSCALE_TX,
182 XSCALE_RX, /* 20 */
183 XSCALE_TXRXCTRL,
184 };
185
186 #define ERROR_XSCALE_NO_TRACE_DATA (-700)
187
188 #endif /* XSCALE_H */