src/target/target_type.h

   1 /***************************************************************************
   2  *   Copyright (C) 2005 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Copyright (C) 2007-2010 Øyvind Harboe                                 *
   6  *   oyvind.harboe@zylin.com                                               *
   7  *                                                                         *
   8  *   Copyright (C) 2008 by Spencer Oliver                                  *
   9  *   spen@spen-soft.co.uk                                                  *
  10  *                                                                         *
  11  *   This program is free software; you can redistribute it and/or modify  *
  12  *   it under the terms of the GNU General Public License as published by  *
  13  *   the Free Software Foundation; either version 2 of the License, or     *
  14  *   (at your option) any later version.                                   *
  15  *                                                                         *
  16  *   This program is distributed in the hope that it will be useful,       *
  17  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  18  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  19  *   GNU General Public License for more details.                          *
  20  *                                                                         *
  21  *   You should have received a copy of the GNU General Public License     *
  22  *   along with this program; if not, write to the                         *
  23  *   Free Software Foundation, Inc.,                                       *
  24  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  25  ***************************************************************************/
  26
  27 #ifndef TARGET_TYPE_H
  28 #define TARGET_TYPE_H
  29
  30 #include <helper/types.h>
  31 #include <jim-nvp.h>
  32
  33 struct target;
  34
  35 /**
  36  * This holds methods shared between all instances of a given target
  37  * type.  For example, all Cortex-M3 targets on a scan chain share
  38  * the same method table.
  39  */
  40 struct target_type {
  41         /**
  42          * Name of this type of target.  Do @b not access this
  43          * field directly, use target_type_name() instead.
  44          */
  45         const char *name;
  46
  47         /* poll current target status */
  48         int (*poll)(struct target *target);
  49         /* Invoked only from target_arch_state().
  50          * Issue USER() w/architecture specific status.  */
  51         int (*arch_state)(struct target *target);
  52
  53         /* target request support */
  54         int (*target_request_data)(struct target *target, uint32_t size, uint8_t *buffer);
  55
  56         /* halt will log a warning, but return ERROR_OK if the target is already halted. */
  57         int (*halt)(struct target *target);
  58         int (*resume)(struct target *target, int current, uint32_t address,
  59                         int handle_breakpoints, int debug_execution);
  60         int (*step)(struct target *target, int current, uint32_t address,
  61                         int handle_breakpoints);
  62
  63         /* target reset control. assert reset can be invoked when OpenOCD and
  64          * the target is out of sync.
  65          *
  66          * A typical example is that the target was power cycled while OpenOCD
  67          * thought the target was halted or running.
  68          *
  69          * assert_reset() can therefore make no assumptions whatsoever about the
  70          * state of the target
  71          *
  72          * Before assert_reset() for the target is invoked, a TRST/tms and
  73          * chain validation is executed. TRST should not be asserted
  74          * during target assert unless there is no way around it due to
  75          * the way reset's are configured.
  76          *
  77          */
  78         int (*assert_reset)(struct target *target);
  79         /**
  80          * The implementation is responsible for polling the
  81          * target such that target->state reflects the
  82          * state correctly.
  83          *
  84          * Otherwise the following would fail, as there will not
  85          * be any "poll" invoked inbetween the "reset run" and
  86          * "halt".
  87          *
  88          * reset run; halt
  89      */
  90         int (*deassert_reset)(struct target *target);
  91         int (*soft_reset_halt_imp)(struct target *target);
  92         int (*soft_reset_halt)(struct target *target);
  93
  94         /**
  95          * Target register access for GDB.  Do @b not call this function
  96          * directly, use target_get_gdb_reg_list() instead.
  97          *
  98          * Danger! this function will succeed even if the target is running
  99          * and return a register list with dummy values.
 100          *
 101          * The reason is that GDB connection will fail without a valid register
 102          * list, however it is after GDB is connected that monitor commands can
 103          * be run to properly initialize the target
 104          */
 105         int (*get_gdb_reg_list)(struct target *target, struct reg **reg_list[], int *reg_list_size);
 106
 107         /* target memory access
 108         * size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
 109         * count: number of items of <size>
 110         */
 111         int (*read_memory_imp)(struct target *target, uint32_t address,
 112                         uint32_t size, uint32_t count, uint8_t *buffer);
 113         /**
 114          * Target memory read callback.  Do @b not call this function
 115          * directly, use target_read_memory() instead.
 116          */
 117         int (*read_memory)(struct target *target, uint32_t address,
 118                         uint32_t size, uint32_t count, uint8_t *buffer);
 119         int (*write_memory_imp)(struct target *target, uint32_t address,
 120                         uint32_t size, uint32_t count, const uint8_t *buffer);
 121         /**
 122          * Target memory write callback.  Do @b not call this function
 123          * directly, use target_write_memory() instead.
 124          */
 125         int (*write_memory)(struct target *target, uint32_t address,
 126                         uint32_t size, uint32_t count, const uint8_t *buffer);
 127
 128         /* Default implementation will do some fancy alignment to improve performance, target can override */
 129         int (*read_buffer)(struct target *target, uint32_t address,
 130                         uint32_t size, uint8_t *buffer);
 131
 132         /* Default implementation will do some fancy alignment to improve performance, target can override */
 133         int (*write_buffer)(struct target *target, uint32_t address,
 134                         uint32_t size, const uint8_t *buffer);
 135
 136         /**
 137          * Write target memory in multiples of 4 bytes, optimized for
 138          * writing large quantities of data.  Do @b not call this
 139          * function directly, use target_bulk_write_memory() instead.
 140          */
 141         int (*bulk_write_memory)(struct target *target, uint32_t address,
 142                         uint32_t count, const uint8_t *buffer);
 143
 144         int (*checksum_memory)(struct target *target, uint32_t address,
 145                         uint32_t count, uint32_t *checksum);
 146         int (*blank_check_memory)(struct target *target, uint32_t address,
 147                         uint32_t count, uint32_t *blank);
 148
 149         /*
 150          * target break-/watchpoint control
 151          * rw: 0 = write, 1 = read, 2 = access
 152          *
 153          * Target must be halted while this is invoked as this
 154          * will actually set up breakpoints on target.
 155          *
 156          * The breakpoint hardware will be set up upon adding the
 157          * first breakpoint.
 158          *
 159          * Upon GDB connection all breakpoints/watchpoints are cleared.
 160          */
 161         int (*add_breakpoint)(struct target *target, struct breakpoint *breakpoint);
 162         int (*add_context_breakpoint)(struct target *target, struct breakpoint *breakpoint);
 163         int (*add_hybrid_breakpoint)(struct target *target, struct breakpoint *breakpoint);
 164
 165         /* remove breakpoint. hw will only be updated if the target
 166          * is currently halted.
 167          * However, this method can be invoked on unresponsive targets.
 168          */
 169         int (*remove_breakpoint)(struct target *target, struct breakpoint *breakpoint);
 170
 171         /* add watchpoint ... see add_breakpoint() comment above. */
 172         int (*add_watchpoint)(struct target *target, struct watchpoint *watchpoint);
 173
 174         /* remove watchpoint. hw will only be updated if the target
 175          * is currently halted.
 176          * However, this method can be invoked on unresponsive targets.
 177          */
 178         int (*remove_watchpoint)(struct target *target, struct watchpoint *watchpoint);
 179
 180         /**
 181          * Target algorithm support.  Do @b not call this method directly,
 182          * use target_run_algorithm() instead.
 183          */
 184         int (*run_algorithm)(struct target *target, int num_mem_params,
 185                         struct mem_param *mem_params, int num_reg_params,
 186                         struct reg_param *reg_param, uint32_t entry_point,
 187                         uint32_t exit_point, int timeout_ms, void *arch_info);
 188         int (*start_algorithm)(struct target *target, int num_mem_params,
 189                         struct mem_param *mem_params, int num_reg_params,
 190                         struct reg_param *reg_param, uint32_t entry_point,
 191                         uint32_t exit_point, void *arch_info);
 192         int (*wait_algorithm)(struct target *target, int num_mem_params,
 193                         struct mem_param *mem_params, int num_reg_params,
 194                         struct reg_param *reg_param, uint32_t exit_point,
 195                         int timeout_ms, void *arch_info);
 196
 197         const struct command_registration *commands;
 198
 199         /* called when target is created */
 200         int (*target_create)(struct target *target, Jim_Interp *interp);
 201
 202         /* called for various config parameters */
 203         /* returns JIM_CONTINUE - if option not understood */
 204         /* otherwise: JIM_OK, or JIM_ERR, */
 205         int (*target_jim_configure)(struct target *target, Jim_GetOptInfo *goi);
 206
 207         /* target commands specifically handled by the target */
 208         /* returns JIM_OK, or JIM_ERR, or JIM_CONTINUE - if option not understood */
 209         int (*target_jim_commands)(struct target *target, Jim_GetOptInfo *goi);
 210
 211         /**
 212          * This method is used to perform target setup that requires
 213          * JTAG access.
 214          *
 215          * This may be called multiple times.  It is called after the
 216          * scan chain is initially validated, or later after the target
 217          * is enabled by a JRC.  It may also be called during some
 218          * parts of the reset sequence.
 219          *
 220          * For one-time initialization tasks, use target_was_examined()
 221          * and target_set_examined().  For example, probe the hardware
 222          * before setting up chip-specific state, and then set that
 223          * flag so you don't do that again.
 224          */
 225         int (*examine)(struct target *target);
 226
 227         /* Set up structures for target.
 228          *
 229          * It is illegal to talk to the target at this stage as this fn is invoked
 230          * before the JTAG chain has been examined/verified
 231          * */
 232         int (*init_target)(struct command_context *cmd_ctx, struct target *target);
 233
 234         /* translate from virtual to physical address. Default implementation is successful
 235          * no-op(i.e. virtual==physical).
 236          */
 237         int (*virt2phys)(struct target *target, uint32_t address, uint32_t *physical);
 238
 239         /* read directly from physical memory. caches are bypassed and untouched.
 240          *
 241          * If the target does not support disabling caches, leaving them untouched,
 242          * then minimally the actual physical memory location will be read even
 243          * if cache states are unchanged, flushed, etc.
 244          *
 245          * Default implementation is to call read_memory.
 246          */
 247         int (*read_phys_memory)(struct target *target, uint32_t phys_address,
 248                         uint32_t size, uint32_t count, uint8_t *buffer);
 249
 250         /*
 251          * same as read_phys_memory, except that it writes...
 252          */
 253         int (*write_phys_memory)(struct target *target, uint32_t phys_address,
 254                         uint32_t size, uint32_t count, const uint8_t *buffer);
 255
 256         int (*mmu)(struct target *target, int *enabled);
 257
 258         /* after reset is complete, the target can check if things are properly set up.
 259          *
 260          * This can be used to check if e.g. DCC memory writes have been enabled for
 261          * arm7/9 targets, which they really should except in the most contrived
 262          * circumstances.
 263          */
 264         int (*check_reset)(struct target *target);
 265 };
 266
 267 #endif /* TARGET_TYPE_H */