src/target/target_type.h

   1 /***************************************************************************
   2  *   Copyright (C) 2005 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Copyright (C) 2007-2010 Øyvind Harboe                                 *
   6  *   oyvind.harboe@zylin.com                                               *
   7  *                                                                         *
   8  *   Copyright (C) 2008 by Spencer Oliver                                  *
   9  *   spen@spen-soft.co.uk                                                  *
  10  *                                                                         *
  11  *   This program is free software; you can redistribute it and/or modify  *
  12  *   it under the terms of the GNU General Public License as published by  *
  13  *   the Free Software Foundation; either version 2 of the License, or     *
  14  *   (at your option) any later version.                                   *
  15  *                                                                         *
  16  *   This program is distributed in the hope that it will be useful,       *
  17  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  18  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  19  *   GNU General Public License for more details.                          *
  20  *                                                                         *
  21  *   You should have received a copy of the GNU General Public License     *
  22  *   along with this program; if not, write to the                         *
  23  *   Free Software Foundation, Inc.,                                       *
  24  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  25  ***************************************************************************/
  26
  27 #ifndef TARGET_TYPE_H
  28 #define TARGET_TYPE_H
  29
  30 #include <jim-nvp.h>
  31
  32 struct target;
  33
  34 /**
  35  * This holds methods shared between all instances of a given target
  36  * type.  For example, all Cortex-M3 targets on a scan chain share
  37  * the same method table.
  38  */
  39 struct target_type {
  40         /**
  41          * Name of this type of target.  Do @b not access this
  42          * field directly, use target_type_name() instead.
  43          */
  44         const char *name;
  45
  46         /* poll current target status */
  47         int (*poll)(struct target *target);
  48         /* Invoked only from target_arch_state().
  49          * Issue USER() w/architecture specific status.  */
  50         int (*arch_state)(struct target *target);
  51
  52         /* target request support */
  53         int (*target_request_data)(struct target *target, uint32_t size, uint8_t *buffer);
  54
  55         /* halt will log a warning, but return ERROR_OK if the target is already halted. */
  56         int (*halt)(struct target *target);
  57         int (*resume)(struct target *target, int current, uint32_t address,
  58                         int handle_breakpoints, int debug_execution);
  59         int (*step)(struct target *target, int current, uint32_t address,
  60                         int handle_breakpoints);
  61
  62         /* target reset control. assert reset can be invoked when OpenOCD and
  63          * the target is out of sync.
  64          *
  65          * A typical example is that the target was power cycled while OpenOCD
  66          * thought the target was halted or running.
  67          *
  68          * assert_reset() can therefore make no assumptions whatsoever about the
  69          * state of the target
  70          *
  71          * Before assert_reset() for the target is invoked, a TRST/tms and
  72          * chain validation is executed. TRST should not be asserted
  73          * during target assert unless there is no way around it due to
  74          * the way reset's are configured.
  75          *
  76          */
  77         int (*assert_reset)(struct target *target);
  78         /**
  79          * The implementation is responsible for polling the
  80          * target such that target->state reflects the
  81          * state correctly.
  82          *
  83          * Otherwise the following would fail, as there will not
  84          * be any "poll" invoked inbetween the "reset run" and
  85          * "halt".
  86          *
  87          * reset run; halt
  88      */
  89         int (*deassert_reset)(struct target *target);
  90         int (*soft_reset_halt_imp)(struct target *target);
  91         int (*soft_reset_halt)(struct target *target);
  92
  93         /**
  94          * Target register access for GDB.  Do @b not call this function
  95          * directly, use target_get_gdb_reg_list() instead.
  96          *
  97          * Danger! this function will succeed even if the target is running
  98          * and return a register list with dummy values.
  99          *
 100          * The reason is that GDB connection will fail without a valid register
 101          * list, however it is after GDB is connected that monitor commands can
 102          * be run to properly initialize the target
 103          */
 104         int (*get_gdb_reg_list)(struct target *target, struct reg **reg_list[], int *reg_list_size);
 105
 106         /* target memory access
 107         * size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
 108         * count: number of items of <size>
 109         */
 110         int (*read_memory_imp)(struct target *target, uint32_t address,
 111                         uint32_t size, uint32_t count, uint8_t *buffer);
 112         /**
 113          * Target memory read callback.  Do @b not call this function
 114          * directly, use target_read_memory() instead.
 115          */
 116         int (*read_memory)(struct target *target, uint32_t address,
 117                         uint32_t size, uint32_t count, uint8_t *buffer);
 118         int (*write_memory_imp)(struct target *target, uint32_t address,
 119                         uint32_t size, uint32_t count, const uint8_t *buffer);
 120         /**
 121          * Target memory write callback.  Do @b not call this function
 122          * directly, use target_write_memory() instead.
 123          */
 124         int (*write_memory)(struct target *target, uint32_t address,
 125                         uint32_t size, uint32_t count, const uint8_t *buffer);
 126
 127         /* Default implementation will do some fancy alignment to improve performance, target can override */
 128         int (*read_buffer)(struct target *target, uint32_t address,
 129                         uint32_t size, uint8_t *buffer);
 130
 131         /* Default implementation will do some fancy alignment to improve performance, target can override */
 132         int (*write_buffer)(struct target *target, uint32_t address,
 133                         uint32_t size, const uint8_t *buffer);
 134
 135         /**
 136          * Write target memory in multiples of 4 bytes, optimized for
 137          * writing large quantities of data.  Do @b not call this
 138          * function directly, use target_bulk_write_memory() instead.
 139          */
 140         int (*bulk_write_memory)(struct target *target, uint32_t address,
 141                         uint32_t count, const uint8_t *buffer);
 142
 143         int (*checksum_memory)(struct target *target, uint32_t address,
 144                         uint32_t count, uint32_t *checksum);
 145         int (*blank_check_memory)(struct target *target, uint32_t address,
 146                         uint32_t count, uint32_t *blank);
 147
 148         /*
 149          * target break-/watchpoint control
 150          * rw: 0 = write, 1 = read, 2 = access
 151          *
 152          * Target must be halted while this is invoked as this
 153          * will actually set up breakpoints on target.
 154          *
 155          * The breakpoint hardware will be set up upon adding the
 156          * first breakpoint.
 157          *
 158          * Upon GDB connection all breakpoints/watchpoints are cleared.
 159          */
 160         int (*add_breakpoint)(struct target *target, struct breakpoint *breakpoint);
 161         int (*add_context_breakpoint)(struct target *target, struct breakpoint *breakpoint);
 162         int (*add_hybrid_breakpoint)(struct target *target, struct breakpoint *breakpoint);
 163
 164         /* remove breakpoint. hw will only be updated if the target
 165          * is currently halted.
 166          * However, this method can be invoked on unresponsive targets.
 167          */
 168         int (*remove_breakpoint)(struct target *target, struct breakpoint *breakpoint);
 169
 170         /* add watchpoint ... see add_breakpoint() comment above. */
 171         int (*add_watchpoint)(struct target *target, struct watchpoint *watchpoint);
 172
 173         /* remove watchpoint. hw will only be updated if the target
 174          * is currently halted.
 175          * However, this method can be invoked on unresponsive targets.
 176          */
 177         int (*remove_watchpoint)(struct target *target, struct watchpoint *watchpoint);
 178
 179         /**
 180          * Target algorithm support.  Do @b not call this method directly,
 181          * use target_run_algorithm() instead.
 182          */
 183         int (*run_algorithm)(struct target *target, int num_mem_params,
 184                         struct mem_param *mem_params, int num_reg_params,
 185                         struct reg_param *reg_param, uint32_t entry_point,
 186                         uint32_t exit_point, int timeout_ms, void *arch_info);
 187         int (*start_algorithm)(struct target *target, int num_mem_params,
 188                         struct mem_param *mem_params, int num_reg_params,
 189                         struct reg_param *reg_param, uint32_t entry_point,
 190                         uint32_t exit_point, void *arch_info);
 191         int (*wait_algorithm)(struct target *target, int num_mem_params,
 192                         struct mem_param *mem_params, int num_reg_params,
 193                         struct reg_param *reg_param, uint32_t exit_point,
 194                         int timeout_ms, void *arch_info);
 195
 196         const struct command_registration *commands;
 197
 198         /* called when target is created */
 199         int (*target_create)(struct target *target, Jim_Interp *interp);
 200
 201         /* called for various config parameters */
 202         /* returns JIM_CONTINUE - if option not understood */
 203         /* otherwise: JIM_OK, or JIM_ERR, */
 204         int (*target_jim_configure)(struct target *target, Jim_GetOptInfo *goi);
 205
 206         /* target commands specifically handled by the target */
 207         /* returns JIM_OK, or JIM_ERR, or JIM_CONTINUE - if option not understood */
 208         int (*target_jim_commands)(struct target *target, Jim_GetOptInfo *goi);
 209
 210         /**
 211          * This method is used to perform target setup that requires
 212          * JTAG access.
 213          *
 214          * This may be called multiple times.  It is called after the
 215          * scan chain is initially validated, or later after the target
 216          * is enabled by a JRC.  It may also be called during some
 217          * parts of the reset sequence.
 218          *
 219          * For one-time initialization tasks, use target_was_examined()
 220          * and target_set_examined().  For example, probe the hardware
 221          * before setting up chip-specific state, and then set that
 222          * flag so you don't do that again.
 223          */
 224         int (*examine)(struct target *target);
 225
 226         /* Set up structures for target.
 227          *
 228          * It is illegal to talk to the target at this stage as this fn is invoked
 229          * before the JTAG chain has been examined/verified
 230          * */
 231         int (*init_target)(struct command_context *cmd_ctx, struct target *target);
 232
 233         /* translate from virtual to physical address. Default implementation is successful
 234          * no-op(i.e. virtual==physical).
 235          */
 236         int (*virt2phys)(struct target *target, uint32_t address, uint32_t *physical);
 237
 238         /* read directly from physical memory. caches are bypassed and untouched.
 239          *
 240          * If the target does not support disabling caches, leaving them untouched,
 241          * then minimally the actual physical memory location will be read even
 242          * if cache states are unchanged, flushed, etc.
 243          *
 244          * Default implementation is to call read_memory.
 245          */
 246         int (*read_phys_memory)(struct target *target, uint32_t phys_address,
 247                         uint32_t size, uint32_t count, uint8_t *buffer);
 248
 249         /*
 250          * same as read_phys_memory, except that it writes...
 251          */
 252         int (*write_phys_memory)(struct target *target, uint32_t phys_address,
 253                         uint32_t size, uint32_t count, const uint8_t *buffer);
 254
 255         int (*mmu)(struct target *target, int *enabled);
 256
 257         /* after reset is complete, the target can check if things are properly set up.
 258          *
 259          * This can be used to check if e.g. DCC memory writes have been enabled for
 260          * arm7/9 targets, which they really should except in the most contrived
 261          * circumstances.
 262          */
 263         int (*check_reset)(struct target *target);
 264 };
 265
 266 #endif /* TARGET_TYPE_H */