src/target/target/ti_dm355.cfg

   1 #
   2 # Texas Instruments DaVinci family:  TMS320DM355
   3 #
   4 if { [info exists CHIPNAME] } {
   5    set  _CHIPNAME $CHIPNAME
   6 } else {
   7    set  _CHIPNAME dm355
   8 }
   9 if { [info exists ENDIAN] } {
  10    set  _ENDIAN $ENDIAN
  11 } else {
  12    set  _ENDIAN little
  13 }
  14
  15 #
  16 # For now, expect EMU0/EMU1 jumpered LOW (not TI's default) so ARM and ETB
  17 # are enabled without making ICEpick route ARM and ETB into the JTAG chain.
  18 #
  19 # Also note:  when running without RTCK before the PLLs are set up, you
  20 # may need to slow the JTAG clock down quite a lot (under 2 MHz).
  21 #
  22
  23 # Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer
  24 if { [info exists ETB_TAPID ] } {
  25    set _ETB_TAPID $ETB_TAPID
  26 } else {
  27    set _ETB_TAPID 0x2b900f0f
  28 }
  29 jtag newtap $_CHIPNAME etb -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_ETB_TAPID
  30
  31 # Subsidiary TAP: ARM926ejs with scan chains for ARM Debug, EmbeddedICE-RT, ETM.
  32 if { [info exists CPU_TAPID ] } {
  33    set _CPU_TAPID $CPU_TAPID
  34 } else {
  35    set _CPU_TAPID 0x07926001
  36 }
  37 jtag newtap $_CHIPNAME arm -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPU_TAPID
  38
  39 # Primary TAP: ICEpick (JTAG route controller) and boundary scan
  40 if { [info exists JRC_TAPID ] } {
  41    set _JRC_TAPID $JRC_TAPID
  42 } else {
  43    set _JRC_TAPID 0x0b73b02f
  44 }
  45 jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID
  46
  47 # GDB target:  the ARM, using SRAM1 for scratch.  SRAM0 (also 16K)
  48 # and the ETB memory (4K) are other options, while trace is unused.
  49 set _TARGETNAME $_CHIPNAME.arm
  50
  51 target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
  52 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00014000 -work-area-size 0x4000 -work-area-backup 0
  53
  54 arm7_9 dbgrq enable
  55 arm7_9 fast_memory_access enable
  56 arm7_9 dcc_downloads enable
  57
  58 # trace setup
  59 # FIXME we ought to be able to say "... config $_TARGETNAME ..."
  60 # (not "config 0") facilitating additional targets (e.g. other chips)
  61 etm config 0 16 normal full etb
  62 etb config 0 $_CHIPNAME.etb
  63