8 #use combined on interfaces or targets that can't set TRST/SRST separately
9 reset_config trst_and_srst
11 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
13 if { [info exists CHIPNAME] } {
14 set _CHIPNAME $CHIPNAME
19 if { [info exists ENDIAN] } {
25 if { [info exists FLASHTAPID ] } {
26 set _FLASHTAPID $FLASHTAPID
28 set _FLASHTAPID 0x04570041
30 jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
32 if { [info exists CPUTAPID ] } {
33 set _CPUTAPID $CPUTAPID
35 set _CPUTAPID 0x25966041
37 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
39 if { [info exists BSTAPID ] } {
42 set _BSTAPID 0x1457f041
44 jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
46 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
47 target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
49 $_TARGETNAME configure -event reset-init {
50 # We can increase speed now that we know the target is halted.
54 # PFQBC enabled / DTCM & AHB wait-states disabled
57 str9x flash_config 0 4 2 0 0x80000
58 flash protect 0 0 7 off
61 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0
63 #flash bank <driver> <base> <size> <chip_width> <bus_width>
64 flash bank str9x 0x00000000 0x00080000 0 0 0
65 flash bank str9x 0x00080000 0x00008000 0 0 0
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