3 # NB! Does not work yet. Work in progress
5 if { [info exists CHIPNAME] } {
6 set _CHIPNAME $CHIPNAME
11 if { [info exists ENDIAN] } {
17 if { [info exists CPUTAPID ] } {
18 set _CPUTAPID $CPUTAPID
20 # force an error till we get a good number
21 set _CPUTAPID 0xffffffff
24 #========================================
25 # The "system jtag controller"
26 # IMX31 reference manual, page 6-28 - figure 6-14
27 if { [info exists SJCTAPID ] } {
28 set _SJCTAPID $SJCTAPID
30 set _SJCTAPID 0xffffffff
32 jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 00 irmask 0x0 -expected-id $_SJCTAPID
34 # The "SDMA" - <S>mart <DMA> controller debug tap
35 # Based on some IO pins - this can be disabled & removed
38 # SJC_MOD - controls multiplexer - disables ARM1136
39 # SDMA_BYPASS - disables SDMA -
41 if { [info exists SDMATAPID ] } {
42 set _SDMATAPID $SDMATAPID
44 set _SDMATAPID 0xffffffff
46 # Per section 40.17.1, table 40-85 the IR register is 4 bits
47 # But this conflicts with Diagram 6-13, "3bits ir and drs"
48 jtag newtap $_CHIPNAME smda -irlen 4 -ircapture 0xe -irmask 0xf -expected-id $_SJCTAPID
51 if { [info exists CPUTAPID ] } {
52 set _CPUTAPID $CPUTAPID
54 set _CPUTAPID 0xffffffff
56 # Per ARM: DDI0211J_arm1136_r1p5_trm.pdf - the ARM 1136 as a 5 bit IR register
57 jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1e irmask 0x1f -expected-id $_SJCTAPID
63 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
64 target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
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