src/target/target/at91eb40a.cfg

   1 #Script for AT91EB40a
   2
   3 #Atmel ties SRST & TRST together, at which point it makes
   4 #no sense to use TRST, but use TMS instead.
   5 #
   6 #The annoying thing with tying SRST & TRST together is that
   7 #there is no way to halt the CPU *before and during* the
   8 #SRST reset, which means that the CPU will run a number
   9 #of cycles before it can be halted(as much as milliseconds).
  10 reset_config srst_only srst_pulls_trst
  11
  12 #jtag scan chain
  13 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  14 jtag_device 4 0x1 0xf 0xe
  15
  16 #target configuration
  17 target arm7tdmi little 0 arm7tdmi-s_r4
  18
  19 # speed up memory downloads
  20 arm7_9 fast_memory_access enable
  21 arm7_9 dcc_downloads enable
  22
  23 #flash driver
  24 flash bank ecosflash 0x01000000 0x200000 2 2 0 ecos/at91eb40a.elf
  25
  26 # required for usable performance. Used for lots of
  27 # other things than flash programming.
  28 working_area 0 0x00000000 0x20000 nobackup
  29
  30 #force hardware values - we're running out of flash more
  31 #often than not. The user can disable this in his
  32 #subsequent config script.
  33 arm7_9 force_hw_bkpts enable
  34
  35 global reset_count
  36 set reset_count 0
  37
  38 proc target_0_post_reset {} {
  39         puts "Running reset init script for AT91EB40A"
  40         global reset_count
  41         # Reset script for AT91EB40a
  42         reg cpsr 0x000000D3
  43         mww 0xFFE00020 0x1
  44         mww 0xFFE00024 0x00000000
  45         mww 0xFFE00000 0x01002539
  46         mww 0xFFFFF124 0xFFFFFFFF
  47         mww 0xffff0010 0x100
  48         mww 0xffff0034 0x100
  49         set reset_count [expr $reset_count+1]
  50         echo "Testing reset $reset_count !"
  51
  52         asdfs
  53 }
  54
  55 proc target_0_pre_reset {} {
  56         global reset_count
  57         set reset_count [expr $reset_count+1]
  58         echo "Testing pre_reset $reset_count !"
  59 }