src/target/nds32.h

   1 /***************************************************************************
   2  *   Copyright (C) 2013 by Andes Technology                                *
   3  *   Hsiangkai Wang <hkwang@andestech.com>                                 *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  19  ***************************************************************************/
  20
  21 #ifndef __NDS32_H__
  22 #define __NDS32_H__
  23
  24 #include <jtag/jtag.h>
  25 #include <jtag/aice/aice_port.h>
  26 #include "target.h"
  27 #include "target_type.h"
  28 #include "register.h"
  29 #include "breakpoints.h"
  30 #include "nds32_reg.h"
  31 #include "nds32_insn.h"
  32 #include "nds32_edm.h"
  33
  34 #define CHECK_RETVAL(action)                    \
  35         do {                                    \
  36                 int __retval = (action);        \
  37                 if (__retval != ERROR_OK) {     \
  38                         LOG_DEBUG("error while calling \"%s\"", \
  39                                 # action);     \
  40                         return __retval;        \
  41                 }                               \
  42         } while (0)
  43
  44 /**
  45  * @file
  46  * Holds the interface to Andes cores.
  47  */
  48
  49 extern const char *nds32_debug_type_name[11];
  50
  51 enum nds32_debug_reason {
  52         NDS32_DEBUG_BREAK = 0,
  53         NDS32_DEBUG_BREAK_16,
  54         NDS32_DEBUG_INST_BREAK,
  55         NDS32_DEBUG_DATA_ADDR_WATCHPOINT_PRECISE,
  56         NDS32_DEBUG_DATA_VALUE_WATCHPOINT_PRECISE,
  57         NDS32_DEBUG_DATA_VALUE_WATCHPOINT_IMPRECISE,
  58         NDS32_DEBUG_DEBUG_INTERRUPT,
  59         NDS32_DEBUG_HARDWARE_SINGLE_STEP,
  60         NDS32_DEBUG_DATA_ADDR_WATCHPOINT_NEXT_PRECISE,
  61         NDS32_DEBUG_DATA_VALUE_WATCHPOINT_NEXT_PRECISE,
  62         NDS32_DEBUG_LOAD_STORE_GLOBAL_STOP,
  63 };
  64
  65 enum nds32_tdesc_type {
  66         NDS32_CORE_TDESC = 0,
  67         NDS32_SYSTEM_TDESC,
  68         NDS32_AUDIO_TDESC,
  69         NDS32_FPU_TDESC,
  70         NDS32_NUM_TDESC,
  71 };
  72
  73 #define NDS32_STRUCT_STAT_SIZE 60
  74 #define NDS32_STRUCT_TIMEVAL_SIZE 8
  75
  76 enum nds32_syscall_id {
  77         NDS32_SYSCALL_EXIT = 1,
  78         NDS32_SYSCALL_OPEN = 2,
  79         NDS32_SYSCALL_CLOSE = 3,
  80         NDS32_SYSCALL_READ = 4,
  81         NDS32_SYSCALL_WRITE = 5,
  82         NDS32_SYSCALL_LSEEK = 6,
  83         NDS32_SYSCALL_UNLINK = 7,
  84         NDS32_SYSCALL_RENAME = 3001,
  85         NDS32_SYSCALL_FSTAT = 10,
  86         NDS32_SYSCALL_STAT = 15,
  87         NDS32_SYSCALL_GETTIMEOFDAY = 19,
  88         NDS32_SYSCALL_ISATTY = 3002,
  89         NDS32_SYSCALL_SYSTEM = 3003,
  90         NDS32_SYSCALL_ERRNO = 6001,
  91 };
  92
  93 #define NDS32_COMMON_MAGIC (int)0xADE5ADE5
  94
  95 struct nds32_edm {
  96
  97         /** EDM_CFG.VER, indicate the EDM version */
  98         int version;
  99
 100         /** The number of hardware breakpoints */
 101         int breakpoint_num;
 102
 103         /** EDM_CFG.DALM, indicate if direct local memory access feature is supported or not */
 104         bool direct_access_local_memory;
 105
 106         /** Support ACC_CTL register */
 107         bool access_control;
 108
 109         /** */
 110         bool support_max_stop;
 111 };
 112
 113 struct nds32_cache {
 114
 115         /** enable cache or not */
 116         bool enable;
 117
 118         /** cache sets per way */
 119         int set;
 120
 121         /** cache ways */
 122         int way;
 123
 124         /** cache line size */
 125         int line_size;
 126
 127         /** cache locking support */
 128         bool lock_support;
 129 };
 130
 131 struct nds32_memory {
 132
 133         /** ICache */
 134         struct nds32_cache icache;
 135
 136         /** DCache */
 137         struct nds32_cache dcache;
 138
 139         /** On-chip instruction local memory base */
 140         int ilm_base;
 141
 142         /** On-chip instruction local memory size */
 143         int ilm_size;
 144
 145         /** ILM base register alignment version */
 146         int ilm_align_ver;
 147
 148         /** DLM is enabled or not */
 149         bool ilm_enable;
 150
 151         /** DLM start address */
 152         int ilm_start;
 153
 154         /** DLM end address */
 155         int ilm_end;
 156
 157         /** On-chip data local memory base */
 158         int dlm_base;
 159
 160         /** On-chip data local memory size */
 161         int dlm_size;
 162
 163         /** DLM base register alignment version */
 164         int dlm_align_ver;
 165
 166         /** DLM is enabled or not */
 167         bool dlm_enable;
 168
 169         /** DLM start address */
 170         int dlm_start;
 171
 172         /** DLM end address */
 173         int dlm_end;
 174
 175         /** Memory access method */
 176         enum aice_memory_access access_channel;
 177
 178         /** Memory access mode */
 179         enum aice_memory_mode mode;
 180
 181         /** Address translation */
 182         bool address_translation;
 183 };
 184
 185 struct nds32_cpu_version {
 186         bool performance_extension;
 187         bool _16bit_extension;
 188         bool performance_extension_2;
 189         bool cop_fpu_extension;
 190         bool string_extension;
 191
 192         int revision;
 193         int cpu_id_family;
 194         int cpu_id_version;
 195 };
 196
 197 struct nds32_mmu_config {
 198         int memory_protection;
 199         int memory_protection_version;
 200         bool fully_associative_tlb;
 201         int tlb_size;
 202         int tlb_ways;
 203         int tlb_sets;
 204         bool _8k_page_support;
 205         int extra_page_size_support;
 206         bool tlb_lock;
 207         bool hardware_page_table_walker;
 208         bool default_endian;
 209         int partition_num;
 210         bool invisible_tlb;
 211         bool vlpt;
 212         bool ntme;
 213         bool drde;
 214         int default_min_page_size;
 215         bool multiple_page_size_in_use;
 216 };
 217
 218 struct nds32_misc_config {
 219         bool edm;
 220         bool local_memory_dma;
 221         bool performance_monitor;
 222         bool high_speed_memory_port;
 223         bool debug_tracer;
 224         bool div_instruction;
 225         bool mac_instruction;
 226         int audio_isa;
 227         bool L2_cache;
 228         bool reduce_register;
 229         bool addr_24;
 230         bool interruption_level;
 231         int baseline_instruction;
 232         bool no_dx_register;
 233         bool implement_dependant_register;
 234         bool implement_dependant_sr_encoding;
 235         bool ifc;
 236         bool mcu;
 237         bool ex9;
 238         int shadow;
 239 };
 240
 241 /**
 242  * Represents a generic Andes core.
 243  */
 244 struct nds32 {
 245         int common_magic;
 246         struct reg_cache *core_cache;
 247
 248         /** Handle for the debug module. */
 249         struct nds32_edm edm;
 250
 251         /** Memory information */
 252         struct nds32_memory memory;
 253
 254         /** cpu version */
 255         struct nds32_cpu_version cpu_version;
 256
 257         /** MMU configuration */
 258         struct nds32_mmu_config mmu_config;
 259
 260         /** Misc configuration */
 261         struct nds32_misc_config misc_config;
 262
 263         /** Retrieve all core registers, for display. */
 264         int (*full_context)(struct nds32 *nds32);
 265
 266         /** Register mappings */
 267         int (*register_map)(struct nds32 *nds32, int reg_no);
 268
 269         /** Get debug exception virtual address */
 270         int (*get_debug_reason)(struct nds32 *nds32, uint32_t *reason);
 271
 272         /** Restore target registers may be modified in debug state */
 273         int (*leave_debug_state)(struct nds32 *nds32, bool enable_watchpoint);
 274
 275         /** Backup target registers may be modified in debug state */
 276         int (*enter_debug_state)(struct nds32 *nds32, bool enable_watchpoint);
 277
 278         /** Get address hitted watchpoint */
 279         int (*get_watched_address)(struct nds32 *nds32, uint32_t *address, uint32_t reason);
 280
 281         /** maximum interrupt level */
 282         uint32_t max_interrupt_level;
 283
 284         /** current interrupt level */
 285         uint32_t current_interrupt_level;
 286
 287         uint32_t watched_address;
 288
 289         /** Flag reporting whether virtual hosting is active. */
 290         bool virtual_hosting;
 291
 292         /** Flag reporting whether continue/step hits syscall or not */
 293         bool hit_syscall;
 294
 295         /** Value to be returned by virtual hosting SYS_ERRNO request. */
 296         int virtual_hosting_errno;
 297
 298         /** Flag reporting whether syscall is aborted */
 299         bool virtual_hosting_ctrl_c;
 300
 301         /** Record syscall ID for other operations to do special processing for target */
 302         int active_syscall_id;
 303
 304         /** Flag reporting whether global stop is active. */
 305         bool global_stop;
 306
 307         /** reset-halt as target examine */
 308         bool reset_halt_as_examine;
 309
 310         /** Period to wait after SRST. */
 311         uint32_t boot_time;
 312
 313         /** Flag to indicate HSS steps into ISR or not */
 314         bool step_isr_enable;
 315
 316         /** Flag to indicate register table is ready or not */
 317         bool init_arch_info_after_halted;
 318
 319         /** Flag to indicate audio-extension is enabled or not */
 320         bool audio_enable;
 321
 322         /** Flag to indicate fpu-extension is enabled or not */
 323         bool fpu_enable;
 324
 325         /** Flag to indicate if auto convert software breakpoints to
 326          *  hardware breakpoints or not in ROM */
 327         bool auto_convert_hw_bp;
 328
 329         int (*setup_virtual_hosting)(struct target *target, int enable);
 330
 331         /** Backpointer to the target. */
 332         struct target *target;
 333
 334         void *arch_info;
 335 };
 336
 337 struct nds32_reg {
 338         uint32_t num;
 339         uint32_t value;
 340         uint64_t value_64;
 341         struct target *target;
 342         struct nds32 *nds32;
 343         bool enable;
 344 };
 345
 346 extern int nds32_config(struct nds32 *nds32);
 347 extern int nds32_init_arch_info(struct target *target, struct nds32 *nds32);
 348 extern int nds32_full_context(struct nds32 *nds32);
 349 extern int nds32_arch_state(struct target *target);
 350 extern int nds32_add_software_breakpoint(struct target *target,
 351                                         struct breakpoint *breakpoint);
 352 extern int nds32_remove_software_breakpoint(struct target *target,
 353                                         struct breakpoint *breakpoint);
 354
 355 extern int nds32_get_gdb_general_reg_list(struct target *target,
 356                                         struct reg **reg_list[], int *reg_list_size);
 357 extern int nds32_get_gdb_reg_list(struct target *target,
 358                                 struct reg **reg_list[], int *reg_list_size);
 359 extern int nds32_get_gdb_target_description(struct target *target, char **xml,
 360                                         char *annex, int32_t offset, uint32_t length);
 361
 362 extern int nds32_write_buffer(struct target *target, uint32_t address,
 363                                 uint32_t size, const uint8_t *buffer);
 364 extern int nds32_read_buffer(struct target *target, uint32_t address,
 365                                 uint32_t size, uint8_t *buffer);
 366 extern int nds32_bulk_write_memory(struct target *target,
 367                                         uint32_t address, uint32_t count, const uint8_t *buffer);
 368 extern int nds32_read_memory(struct target *target, uint32_t address,
 369                                 uint32_t size, uint32_t count, uint8_t *buffer);
 370 extern int nds32_write_memory(struct target *target, uint32_t address,
 371                                 uint32_t size, uint32_t count, const uint8_t *buffer);
 372
 373 extern int nds32_init_register_table(struct nds32 *nds32);
 374 extern int nds32_init_memory_info(struct nds32 *nds32);
 375 extern int nds32_restore_context(struct target *target);
 376 extern int nds32_get_mapped_reg(struct nds32 *nds32, unsigned regnum, uint32_t *value);
 377 extern int nds32_set_mapped_reg(struct nds32 *nds32, unsigned regnum, uint32_t value);
 378
 379 extern int nds32_edm_config(struct nds32 *nds32);
 380 extern int nds32_check_extension(struct nds32 *nds32);
 381 extern int nds32_cache_sync(struct target *target, uint32_t address, uint32_t length);
 382 extern int nds32_mmu(struct target *target, int *enabled);
 383 extern int nds32_virtual_to_physical(struct target *target, uint32_t address, uint32_t *physical);
 384 extern int nds32_read_phys_memory(struct target *target, uint32_t address,
 385                                         uint32_t size, uint32_t count, uint8_t *buffer);
 386 extern int nds32_write_phys_memory(struct target *target, uint32_t address,
 387                                         uint32_t size, uint32_t count, const uint8_t *buffer);
 388 extern int nds32_soft_reset_halt(struct target *target);
 389 extern uint32_t nds32_nextpc(struct nds32 *nds32, int current, uint32_t address);
 390 extern int nds32_examine_debug_reason(struct nds32 *nds32);
 391 extern int nds32_step(struct target *target, int current,
 392                         uint32_t address, int handle_breakpoints);
 393 extern int nds32_target_state(struct nds32 *nds32, enum target_state *state);
 394 extern int nds32_halt(struct target *target);
 395 extern int nds32_poll(struct target *target);
 396 extern int nds32_resume(struct target *target, int current,
 397                         uint32_t address, int handle_breakpoints, int debug_execution);
 398 extern int nds32_assert_reset(struct target *target);
 399 extern int nds32_init(struct nds32 *nds32);
 400 extern int nds32_get_gdb_fileio_info(struct target *target, struct gdb_fileio_info *fileio_info);
 401 extern int nds32_gdb_fileio_write_memory(struct nds32 *nds32, uint32_t address,
 402                                                 uint32_t size, const uint8_t *buffer);
 403 extern int nds32_gdb_fileio_end(struct target *target, int retcode, int fileio_errno, bool ctrl_c);
 404 extern int nds32_reset_halt(struct nds32 *nds32);
 405
 406 /** Convert target handle to generic Andes target state handle. */
 407 static inline struct nds32 *target_to_nds32(struct target *target)
 408 {
 409         assert(target != NULL);
 410         return target->arch_info;
 411 }
 412
 413 /** */
 414 static inline struct aice_port_s *target_to_aice(struct target *target)
 415 {
 416         assert(target != NULL);
 417         return target->tap->priv;
 418 }
 419
 420 static inline bool is_nds32(struct nds32 *nds32)
 421 {
 422         assert(nds32 != NULL);
 423         return nds32->common_magic == NDS32_COMMON_MAGIC;
 424 }
 425
 426 static inline bool nds32_reach_max_interrupt_level(struct nds32 *nds32)
 427 {
 428         assert(nds32 != NULL);
 429         return nds32->max_interrupt_level == nds32->current_interrupt_level;
 430 }
 431
 432 #endif /* __NDS32_H__ */