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Audit and eliminate redundant #include directives in other target files.
[openocd.git] / src / target / mips_ejtag.c
1 /***************************************************************************
2 * Copyright (C) 2008 by Spencer Oliver *
3 * spen@spen-soft.co.uk *
4 * *
5 * Copyright (C) 2008 by David T.L. Wong *
6 * *
7 * This program is free software; you can redistribute it and/or modify *
8 * it under the terms of the GNU General Public License as published by *
9 * the Free Software Foundation; either version 2 of the License, or *
10 * (at your option) any later version. *
11 * *
12 * This program is distributed in the hope that it will be useful, *
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
15 * GNU General Public License for more details. *
16 * *
17 * You should have received a copy of the GNU General Public License *
18 * along with this program; if not, write to the *
19 * Free Software Foundation, Inc., *
20 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
21 ***************************************************************************/
22 #ifdef HAVE_CONFIG_H
23 #include "config.h"
24 #endif
25
26 #include "mips32.h"
27 #include "mips_ejtag.h"
28
29
30 int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, void *delete_me_and_submit_patch)
31 {
32 jtag_tap_t *tap;
33
34 tap = ejtag_info->tap;
35 if (tap==NULL)
36 return ERROR_FAIL;
37
38 if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (u32)new_instr)
39 {
40 scan_field_t field;
41 u8 t[4];
42
43 field.tap = tap;
44 field.num_bits = tap->ir_length;
45 field.out_value = t;
46 buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
47
48 field.in_value = NULL;
49
50
51
52
53 jtag_add_ir_scan(1, &field, TAP_INVALID);
54 }
55
56 return ERROR_OK;
57 }
58
59 int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode, in_handler_t handler)
60 {
61 scan_field_t field;
62
63 jtag_add_end_state(TAP_IDLE);
64
65 mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IDCODE, NULL);
66
67 field.tap = ejtag_info->tap;
68 field.num_bits = 32;
69 field.out_value = NULL;
70
71 field.in_value = (void*)idcode;
72
73
74
75
76 jtag_add_dr_scan(1, &field, TAP_INVALID);
77
78 if (jtag_execute_queue() != ERROR_OK)
79 {
80 LOG_ERROR("register read failed");
81 }
82
83 return ERROR_OK;
84 }
85
86 int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode, in_handler_t handler)
87 {
88 scan_field_t field;
89
90 jtag_add_end_state(TAP_IDLE);
91
92 mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IMPCODE, NULL);
93
94 field.tap = ejtag_info->tap;
95 field.num_bits = 32;
96 field.out_value = NULL;
97
98 field.in_value = (void*)impcode;
99
100
101
102
103 jtag_add_dr_scan(1, &field, TAP_INVALID);
104
105 if (jtag_execute_queue() != ERROR_OK)
106 {
107 LOG_ERROR("register read failed");
108 }
109
110 return ERROR_OK;
111 }
112
113 int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data)
114 {
115 jtag_tap_t *tap;
116 tap = ejtag_info->tap;
117
118 if (tap==NULL)
119 return ERROR_FAIL;
120 scan_field_t field;
121 u8 t[4];
122 int retval;
123
124 field.tap = tap;
125 field.num_bits = 32;
126 field.out_value = t;
127 buf_set_u32(field.out_value, 0, field.num_bits, *data);
128
129 field.in_value = (u8*)data;
130
131
132
133
134 jtag_add_dr_scan(1, &field, TAP_INVALID);
135
136 if ((retval = jtag_execute_queue()) != ERROR_OK)
137 {
138 LOG_ERROR("register read failed");
139 return retval;
140 }
141
142 keep_alive();
143
144 return ERROR_OK;
145 }
146
147 int mips_ejtag_step_enable(mips_ejtag_t *ejtag_info)
148 {
149 u32 code[] = {
150 MIPS32_MTC0(1,31,0), /* move $1 to COP0 DeSave */
151 MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
152 MIPS32_ORI(1,1,0x0100), /* set SSt bit in debug reg */
153 MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */
154 MIPS32_MFC0(1,31,0), /* move COP0 DeSave to $1 */
155 MIPS32_NOP,
156 MIPS32_B(NEG16(7)),
157 MIPS32_NOP,
158 };
159
160 mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \
161 0, NULL, 0, NULL, 1);
162
163 return ERROR_OK;
164 }
165 int mips_ejtag_step_disable(mips_ejtag_t *ejtag_info)
166 {
167 u32 code[] = {
168 MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
169 MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
170 MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
171 MIPS32_SW(1,0,15), /* sw $1,($15) */
172 MIPS32_SW(2,0,15), /* sw $2,($15) */
173 MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
174 MIPS32_LUI(2,0xFFFF), /* $2 = 0xfffffeff */
175 MIPS32_ORI(2,2,0xFEFF),
176 MIPS32_AND(1,1,2),
177 MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */
178 MIPS32_LW(2,0,15),
179 MIPS32_LW(1,0,15),
180 MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
181 MIPS32_NOP,
182 MIPS32_B(NEG16(15)),
183 MIPS32_NOP,
184 };
185
186 mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \
187 0, NULL, 0, NULL, 1);
188
189 return ERROR_OK;
190 }
191
192 int mips_ejtag_config_step(mips_ejtag_t *ejtag_info, int enable_step)
193 {
194 if (enable_step)
195 return mips_ejtag_step_enable(ejtag_info);
196 return mips_ejtag_step_disable(ejtag_info);
197 }
198
199 int mips_ejtag_enter_debug(mips_ejtag_t *ejtag_info)
200 {
201 u32 ejtag_ctrl;
202 jtag_add_end_state(TAP_IDLE);
203 mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
204
205 /* set debug break bit */
206 ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_JTAGBRK;
207 mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
208
209 /* break bit will be cleared by hardware */
210 ejtag_ctrl = ejtag_info->ejtag_ctrl;
211 mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
212 LOG_DEBUG("ejtag_ctrl: 0x%8.8x", ejtag_ctrl);
213 if((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0)
214 LOG_DEBUG("Failed to enter Debug Mode!");
215
216 return ERROR_OK;
217 }
218
219 int mips_ejtag_exit_debug(mips_ejtag_t *ejtag_info, int enable_interrupts)
220 {
221 u32 inst;
222 inst = MIPS32_DRET;
223
224 /* TODO : enable/disable interrrupts */
225
226 /* execute our dret instruction */
227 mips32_pracc_exec(ejtag_info, 1, &inst, 0, NULL, 0, NULL, 0);
228
229 return ERROR_OK;
230 }
231
232 int mips_ejtag_read_debug(mips_ejtag_t *ejtag_info, u32* debug_reg)
233 {
234 /* read ejtag ECR */
235 u32 code[] = {
236 MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
237 MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
238 MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
239 MIPS32_SW(1,0,15), /* sw $1,($15) */
240 MIPS32_SW(2,0,15), /* sw $2,($15) */
241 MIPS32_LUI(1,UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $1 = MIPS32_PRACC_PARAM_OUT */
242 MIPS32_ORI(1,1,LOWER16(MIPS32_PRACC_PARAM_OUT)),
243 MIPS32_MFC0(2,23,0), /* move COP0 Debug to $2 */
244 MIPS32_SW(2,0,1),
245 MIPS32_LW(2,0,15),
246 MIPS32_LW(1,0,15),
247 MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
248 MIPS32_NOP,
249 MIPS32_B(NEG16(14)),
250 MIPS32_NOP,
251 };
252
253 mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \
254 0, NULL, 1, debug_reg, 1);
255
256 return ERROR_OK;
257 }
258
259 int mips_ejtag_init(mips_ejtag_t *ejtag_info)
260 {
261 u32 ejtag_version;
262
263 mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode, NULL);
264 LOG_DEBUG("impcode: 0x%8.8x", ejtag_info->impcode);
265
266 /* get ejtag version */
267 ejtag_version = ((ejtag_info->impcode >> 29) & 0x07);
268
269 switch (ejtag_version)
270 {
271 case 0:
272 LOG_DEBUG("EJTAG: Version 1 or 2.0 Detected");
273 break;
274 case 1:
275 LOG_DEBUG("EJTAG: Version 2.5 Detected");
276 break;
277 case 2:
278 LOG_DEBUG("EJTAG: Version 2.6 Detected");
279 break;
280 case 3:
281 LOG_DEBUG("EJTAG: Version 3.1 Detected");
282 break;
283 default:
284 LOG_DEBUG("EJTAG: Unknown Version Detected");
285 break;
286 }
287 LOG_DEBUG("EJTAG: features:%s%s%s%s%s%s%s",
288 ejtag_info->impcode & (1<<28) ? " R3k": " R4k",
289 ejtag_info->impcode & (1<<24) ? " DINT": "",
290 ejtag_info->impcode & (1<<22) ? " ASID_8": "",
291 ejtag_info->impcode & (1<<21) ? " ASID_6": "",
292 ejtag_info->impcode & (1<<16) ? " MIPS16": "",
293 ejtag_info->impcode & (1<<14) ? " noDMA": " DMA",
294 ejtag_info->impcode & (1<<0) ? " MIPS64": " MIPS32"
295 );
296
297 if((ejtag_info->impcode & (1<<14)) == 0)
298 LOG_DEBUG("EJTAG: DMA Access Mode Support Enabled");
299
300 /* set initial state for ejtag control reg */
301 ejtag_info->ejtag_ctrl = EJTAG_CTRL_ROCC | EJTAG_CTRL_PRACC | EJTAG_CTRL_PROBEN | EJTAG_CTRL_SETDEV;
302
303 return ERROR_OK;
304 }
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