1 /***************************************************************************
2 * Copyright (C) 2008 by Spencer Oliver *
3 * spen@spen-soft.co.uk *
5 * Copyright (C) 2008 by David T.L. Wong *
7 * Copyright (C) 2009 by David N. Claffey <dnclaffey@gmail.com> *
9 * This program is free software; you can redistribute it and/or modify *
10 * it under the terms of the GNU General Public License as published by *
11 * the Free Software Foundation; either version 2 of the License, or *
12 * (at your option) any later version. *
14 * This program is distributed in the hope that it will be useful, *
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
17 * GNU General Public License for more details. *
19 * You should have received a copy of the GNU General Public License *
20 * along with this program; if not, write to the *
21 * Free Software Foundation, Inc., *
22 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
23 ***************************************************************************/
29 #include "mips_ejtag.h"
31 int mips_ejtag_set_instr(struct mips_ejtag
*ejtag_info
, int new_instr
, void *delete_me_and_submit_patch
)
35 tap
= ejtag_info
->tap
;
39 if (buf_get_u32(tap
->cur_instr
, 0, tap
->ir_length
) != (uint32_t)new_instr
)
41 struct scan_field field
;
44 field
.num_bits
= tap
->ir_length
;
46 buf_set_u32(field
.out_value
, 0, field
.num_bits
, new_instr
);
47 field
.in_value
= NULL
;
49 jtag_add_ir_scan(tap
, &field
, jtag_get_end_state());
55 int mips_ejtag_get_idcode(struct mips_ejtag
*ejtag_info
, uint32_t *idcode
)
57 struct scan_field field
;
59 jtag_set_end_state(TAP_IDLE
);
61 mips_ejtag_set_instr(ejtag_info
, EJTAG_INST_IDCODE
, NULL
);
64 field
.out_value
= NULL
;
65 field
.in_value
= (void*)idcode
;
67 jtag_add_dr_scan(ejtag_info
->tap
, 1, &field
, jtag_get_end_state());
69 if (jtag_execute_queue() != ERROR_OK
)
71 LOG_ERROR("register read failed");
77 int mips_ejtag_get_impcode(struct mips_ejtag
*ejtag_info
, uint32_t *impcode
)
79 struct scan_field field
;
81 jtag_set_end_state(TAP_IDLE
);
83 mips_ejtag_set_instr(ejtag_info
, EJTAG_INST_IMPCODE
, NULL
);
86 field
.out_value
= NULL
;
87 field
.in_value
= (void*)impcode
;
89 jtag_add_dr_scan(ejtag_info
->tap
, 1, &field
, jtag_get_end_state());
91 if (jtag_execute_queue() != ERROR_OK
)
93 LOG_ERROR("register read failed");
99 int mips_ejtag_drscan_32(struct mips_ejtag
*ejtag_info
, uint32_t *data
)
101 struct jtag_tap
*tap
;
102 tap
= ejtag_info
->tap
;
106 struct scan_field field
;
112 buf_set_u32(field
.out_value
, 0, field
.num_bits
, *data
);
115 jtag_add_dr_scan(tap
, 1, &field
, jtag_get_end_state());
117 if ((retval
= jtag_execute_queue()) != ERROR_OK
)
119 LOG_ERROR("register read failed");
123 *data
= buf_get_u32(field
.in_value
, 0, 32);
130 int mips_ejtag_drscan_8(struct mips_ejtag
*ejtag_info
, uint32_t *data
)
132 struct jtag_tap
*tap
;
133 tap
= ejtag_info
->tap
;
137 struct scan_field field
;
143 buf_set_u32(field
.out_value
, 0, field
.num_bits
, *data
);
146 jtag_add_dr_scan(tap
, 1, &field
, jtag_get_end_state());
148 if ((retval
= jtag_execute_queue()) != ERROR_OK
)
150 LOG_ERROR("register read failed");
154 *data
= buf_get_u32(field
.in_value
, 0, 32);
161 int mips_ejtag_step_enable(struct mips_ejtag
*ejtag_info
)
163 static const uint32_t code
[] = {
164 MIPS32_MTC0(1,31,0), /* move $1 to COP0 DeSave */
165 MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
166 MIPS32_ORI(1,1,0x0100), /* set SSt bit in debug reg */
167 MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */
169 MIPS32_MFC0(1,31,0), /* move COP0 DeSave to $1 */
172 mips32_pracc_exec(ejtag_info
, ARRAY_SIZE(code
), code
, \
173 0, NULL
, 0, NULL
, 1);
177 int mips_ejtag_step_disable(struct mips_ejtag
*ejtag_info
)
179 static const uint32_t code
[] = {
180 MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
181 MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK
)), /* $15 = MIPS32_PRACC_STACK */
182 MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK
)),
183 MIPS32_SW(1,0,15), /* sw $1,($15) */
184 MIPS32_SW(2,0,15), /* sw $2,($15) */
185 MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
186 MIPS32_LUI(2,0xFFFF), /* $2 = 0xfffffeff */
187 MIPS32_ORI(2,2,0xFEFF),
189 MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */
193 MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
196 mips32_pracc_exec(ejtag_info
, ARRAY_SIZE(code
), code
, \
197 0, NULL
, 0, NULL
, 1);
202 int mips_ejtag_config_step(struct mips_ejtag
*ejtag_info
, int enable_step
)
205 return mips_ejtag_step_enable(ejtag_info
);
206 return mips_ejtag_step_disable(ejtag_info
);
209 int mips_ejtag_enter_debug(struct mips_ejtag
*ejtag_info
)
212 jtag_set_end_state(TAP_IDLE
);
213 mips_ejtag_set_instr(ejtag_info
, EJTAG_INST_CONTROL
, NULL
);
215 /* set debug break bit */
216 ejtag_ctrl
= ejtag_info
->ejtag_ctrl
| EJTAG_CTRL_JTAGBRK
;
217 mips_ejtag_drscan_32(ejtag_info
, &ejtag_ctrl
);
219 /* break bit will be cleared by hardware */
220 ejtag_ctrl
= ejtag_info
->ejtag_ctrl
;
221 mips_ejtag_drscan_32(ejtag_info
, &ejtag_ctrl
);
222 LOG_DEBUG("ejtag_ctrl: 0x%8.8" PRIx32
"", ejtag_ctrl
);
223 if ((ejtag_ctrl
& EJTAG_CTRL_BRKST
) == 0)
224 LOG_DEBUG("Failed to enter Debug Mode!");
229 int mips_ejtag_exit_debug(struct mips_ejtag
*ejtag_info
)
234 /* execute our dret instruction */
235 mips32_pracc_exec(ejtag_info
, 1, &inst
, 0, NULL
, 0, NULL
, 0);
240 int mips_ejtag_read_debug(struct mips_ejtag
*ejtag_info
, uint32_t* debug_reg
)
243 static const uint32_t code
[] = {
244 MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
245 MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK
)), /* $15 = MIPS32_PRACC_STACK */
246 MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK
)),
247 MIPS32_SW(1,0,15), /* sw $1,($15) */
248 MIPS32_SW(2,0,15), /* sw $2,($15) */
249 MIPS32_LUI(1,UPPER16(MIPS32_PRACC_PARAM_OUT
)), /* $1 = MIPS32_PRACC_PARAM_OUT */
250 MIPS32_ORI(1,1,LOWER16(MIPS32_PRACC_PARAM_OUT
)),
251 MIPS32_MFC0(2,23,0), /* move COP0 Debug to $2 */
256 MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
259 mips32_pracc_exec(ejtag_info
, ARRAY_SIZE(code
), code
, \
260 0, NULL
, 1, debug_reg
, 1);
265 int mips_ejtag_init(struct mips_ejtag
*ejtag_info
)
267 uint32_t ejtag_version
;
269 mips_ejtag_get_impcode(ejtag_info
, &ejtag_info
->impcode
);
270 LOG_DEBUG("impcode: 0x%8.8" PRIx32
"", ejtag_info
->impcode
);
272 /* get ejtag version */
273 ejtag_version
= ((ejtag_info
->impcode
>> 29) & 0x07);
275 switch (ejtag_version
)
278 LOG_DEBUG("EJTAG: Version 1 or 2.0 Detected");
281 LOG_DEBUG("EJTAG: Version 2.5 Detected");
284 LOG_DEBUG("EJTAG: Version 2.6 Detected");
287 LOG_DEBUG("EJTAG: Version 3.1 Detected");
290 LOG_DEBUG("EJTAG: Unknown Version Detected");
293 LOG_DEBUG("EJTAG: features:%s%s%s%s%s%s%s",
294 ejtag_info
->impcode
& EJTAG_IMP_R3K
? " R3k" : " R4k",
295 ejtag_info
->impcode
& EJTAG_IMP_DINT
? " DINT" : "",
296 ejtag_info
->impcode
& (1 << 22) ? " ASID_8" : "",
297 ejtag_info
->impcode
& (1 << 21) ? " ASID_6" : "",
298 ejtag_info
->impcode
& EJTAG_IMP_MIPS16
? " MIPS16" : "",
299 ejtag_info
->impcode
& EJTAG_IMP_NODMA
? " noDMA" : " DMA",
300 ejtag_info
->impcode
& EJTAG_DCR_MIPS64
? " MIPS64" : " MIPS32");
302 if ((ejtag_info
->impcode
& EJTAG_IMP_NODMA
) == 0)
303 LOG_DEBUG("EJTAG: DMA Access Mode Support Enabled");
305 /* set initial state for ejtag control reg */
306 ejtag_info
->ejtag_ctrl
= EJTAG_CTRL_ROCC
| EJTAG_CTRL_PRACC
| EJTAG_CTRL_PROBEN
| EJTAG_CTRL_SETDEV
;
311 int mips_ejtag_fastdata_scan(struct mips_ejtag
*ejtag_info
, int write
, uint32_t *data
)
313 struct jtag_tap
*tap
;
314 tap
= ejtag_info
->tap
;
319 struct scan_field fields
[2];
321 uint8_t t
[4] = {0, 0, 0, 0};
323 /* fastdata 1-bit register */
324 fields
[0].num_bits
= 1;
325 fields
[0].out_value
= &spracc
;
326 fields
[0].in_value
= NULL
;
328 /* processor access data register 32 bit */
329 fields
[1].num_bits
= 32;
330 fields
[1].out_value
= t
;
334 fields
[1].in_value
= NULL
;
335 buf_set_u32(t
, 0, 32, *data
);
339 fields
[1].in_value
= (uint8_t *) data
;
342 jtag_add_dr_scan(tap
, 2, fields
, jtag_get_end_state());
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