src/target/mips32_pracc.h

   1 /***************************************************************************
   2  *   Copyright (C) 2008 by Spencer Oliver                                  *
   3  *   spen@spen-soft.co.uk                                                  *
   4  *                                                                         *
   5  *   Copyright (C) 2008 by David T.L. Wong                                 *
   6  *                                                                         *
   7  *   Copyright (C) 2011 by Drasko DRASKOVIC                                *
   8  *   drasko.draskovic@gmail.com                                            *
   9  *                                                                         *
  10  *   This program is free software; you can redistribute it and/or modify  *
  11  *   it under the terms of the GNU General Public License as published by  *
  12  *   the Free Software Foundation; either version 2 of the License, or     *
  13  *   (at your option) any later version.                                   *
  14  *                                                                         *
  15  *   This program is distributed in the hope that it will be useful,       *
  16  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  *   GNU General Public License for more details.                          *
  19  *                                                                         *
  20  *   You should have received a copy of the GNU General Public License     *
  21  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  22  ***************************************************************************/
  23
  24 #ifndef OPENOCD_TARGET_MIPS32_PRACC_H
  25 #define OPENOCD_TARGET_MIPS32_PRACC_H
  26
  27 #include <target/mips32.h>
  28 #include <target/mips_ejtag.h>
  29
  30 #define MIPS32_PRACC_FASTDATA_AREA              0xFF200000
  31 #define MIPS32_PRACC_FASTDATA_SIZE              16
  32 #define MIPS32_PRACC_BASE_ADDR                  0xFF200000
  33 #define MIPS32_PRACC_TEXT                       0xFF200200
  34 #define MIPS32_PRACC_PARAM_OUT                  0xFF202000
  35
  36 #define PRACC_UPPER_BASE_ADDR                   (MIPS32_PRACC_BASE_ADDR >> 16)
  37 #define PRACC_MAX_CODE                          (MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_TEXT)
  38 #define PRACC_MAX_INSTRUCTIONS                  (PRACC_MAX_CODE / 4)
  39 #define PRACC_OUT_OFFSET                        (MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_BASE_ADDR)
  40
  41 #define MIPS32_FASTDATA_HANDLER_SIZE            0x80
  42 #define UPPER16(addr)                           ((addr) >> 16)
  43 #define LOWER16(addr)                           ((addr) & 0xFFFF)
  44 #define NEG16(v)                                (((~(v)) + 1) & 0xFFFF)
  45 #define SWAP16(v)                               ((LOWER16(v) << 16) | (UPPER16(v)))
  46 /*#define NEG18(v) (((~(v)) + 1) & 0x3FFFF)*/
  47
  48 #define PRACC_BLOCK     128     /* 1 Kbyte */
  49
  50 typedef struct {
  51         uint32_t instr;
  52         uint32_t addr;
  53 } pa_list;
  54
  55 struct pracc_queue_info {
  56         struct mips_ejtag *ejtag_info;
  57         unsigned isa;
  58         int retval;
  59         int code_count;
  60         int store_count;
  61         int max_code;           /* max instructions with currently allocated memory */
  62         pa_list *pracc_list;    /* Code and store addresses at dmseg */
  63 };
  64
  65 void pracc_queue_init(struct pracc_queue_info *ctx);
  66 void pracc_add(struct pracc_queue_info *ctx, uint32_t addr, uint32_t instr);
  67 void pracc_add_li32(struct pracc_queue_info *ctx, uint32_t reg_num, uint32_t data, bool optimize);
  68 void pracc_queue_free(struct pracc_queue_info *ctx);
  69 int mips32_pracc_queue_exec(struct mips_ejtag *ejtag_info,
  70                             struct pracc_queue_info *ctx, uint32_t *buf, bool check_last);
  71
  72 int mips32_pracc_read_mem(struct mips_ejtag *ejtag_info,
  73                 uint32_t addr, int size, int count, void *buf);
  74 int mips32_pracc_write_mem(struct mips_ejtag *ejtag_info,
  75                 uint32_t addr, int size, int count, const void *buf);
  76 int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_area *source,
  77                 int write_t, uint32_t addr, int count, uint32_t *buf);
  78
  79 int mips32_pracc_read_regs(struct mips_ejtag *ejtag_info, uint32_t *regs);
  80 int mips32_pracc_write_regs(struct mips_ejtag *ejtag_info, uint32_t *regs);
  81
  82 int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ctx,
  83                                 uint32_t *param_out, bool check_last);
  84
  85 /**
  86  * \b mips32_cp0_read
  87  *
  88  * Simulates mfc0 ASM instruction (Move From C0),
  89  * i.e. implements copro C0 Register read.
  90  *
  91  * @param[in] ejtag_info
  92  * @param[in] val Storage to hold read value
  93  * @param[in] cp0_reg Number of copro C0 register we want to read
  94  * @param[in] cp0_sel Select for the given C0 register
  95  *
  96  * @return ERROR_OK on Success, ERROR_FAIL otherwise
  97  */
  98 int mips32_cp0_read(struct mips_ejtag *ejtag_info,
  99                 uint32_t *val, uint32_t cp0_reg, uint32_t cp0_sel);
 100
 101 /**
 102  * \b mips32_cp0_write
 103  *
 104  * Simulates mtc0 ASM instruction (Move To C0),
 105  * i.e. implements copro C0 Register read.
 106  *
 107  * @param[in] ejtag_info
 108  * @param[in] val Value to be written
 109  * @param[in] cp0_reg Number of copro C0 register we want to write to
 110  * @param[in] cp0_sel Select for the given C0 register
 111  *
 112  * @return ERROR_OK on Success, ERROR_FAIL otherwise
 113  */
 114 int mips32_cp0_write(struct mips_ejtag *ejtag_info,
 115                 uint32_t val, uint32_t cp0_reg, uint32_t cp0_sel);
 116
 117 static inline void pracc_swap16_array(struct mips_ejtag *ejtag_info, uint32_t *buf, int count)
 118 {
 119         if (ejtag_info->isa && ejtag_info->endianness)
 120                 for (int i = 0; i != count; i++)
 121                         buf[i] = SWAP16(buf[i]);
 122 }
 123
 124 #endif /* OPENOCD_TARGET_MIPS32_PRACC_H */