- split fileio handling into fileio part and image handling
[openocd.git] / src / target / etm.h
1 /***************************************************************************
2 * Copyright (C) 2005, 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2007 by Vincent Palatin *
6 * vincent.palatin_openocd@m4x.org *
7 * *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
12 * *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
17 * *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
23 #ifndef ETM_H
24 #define ETM_H
25
26 #include "trace.h"
27 #include "target.h"
28 #include "register.h"
29 #include "arm_jtag.h"
30
31 #include "armv4_5.h"
32
33 /* ETM registers (V1.3 protocol) */
34 enum
35 {
36 ETM_CTRL = 0x00,
37 ETM_CONFIG = 0x01,
38 ETM_TRIG_EVENT = 0x02,
39 ETM_MMD_CTRL = 0x03,
40 ETM_STATUS = 0x04,
41 ETM_SYS_CONFIG = 0x05,
42 ETM_TRACE_RESOURCE_CTRL = 0x06,
43 ETM_TRACE_EN_CTRL2 = 0x07,
44 ETM_TRACE_EN_EVENT = 0x08,
45 ETM_TRACE_EN_CTRL1 = 0x09,
46 ETM_FIFOFULL_REGION = 0x0a,
47 ETM_FIFOFULL_LEVEL = 0x0b,
48 ETM_VIEWDATA_EVENT = 0x0c,
49 ETM_VIEWDATA_CTRL1 = 0x0d,
50 ETM_VIEWDATA_CTRL2 = 0x0e,
51 ETM_VIEWDATA_CTRL3 = 0x0f,
52 ETM_ADDR_COMPARATOR_VALUE = 0x10,
53 ETM_ADDR_ACCESS_TYPE = 0x20,
54 ETM_DATA_COMPARATOR_VALUE = 0x30,
55 ETM_DATA_COMPARATOR_MASK = 0x40,
56 ETM_COUNTER_INITAL_VALUE = 0x50,
57 ETM_COUNTER_ENABLE = 0x54,
58 ETM_COUNTER_RELOAD_VALUE = 0x58,
59 ETM_COUNTER_VALUE = 0x5c,
60 ETM_SEQUENCER_CTRL = 0x60,
61 ETM_SEQUENCER_STATE = 0x67,
62 ETM_EXTERNAL_OUTPUT = 0x68,
63 ETM_CONTEXTID_COMPARATOR_VALUE = 0x6c,
64 ETM_CONTEXTID_COMPARATOR_MASK = 0x6f,
65 };
66
67 typedef struct etm_reg_s
68 {
69 int addr;
70 arm_jtag_t *jtag_info;
71 } etm_reg_t;
72
73 typedef enum
74 {
75 /* Port width */
76 ETM_PORT_4BIT = 0x00,
77 ETM_PORT_8BIT = 0x10,
78 ETM_PORT_16BIT = 0x20,
79 ETM_PORT_WIDTH_MASK = 0x70,
80 /* Port modes */
81 ETM_PORT_NORMAL = 0x00000,
82 ETM_PORT_MUXED = 0x10000,
83 ETM_PORT_DEMUXED = 0x20000,
84 ETM_PORT_MODE_MASK = 0x30000,
85 /* Clocking modes */
86 ETM_PORT_FULL_CLOCK = 0x0000,
87 ETM_PORT_HALF_CLOCK = 0x1000,
88 ETM_PORT_CLOCK_MASK = 0x1000,
89 } etm_portmode_t;
90
91 typedef enum
92 {
93 /* Data trace */
94 ETMV1_TRACE_NONE = 0x00,
95 ETMV1_TRACE_DATA = 0x01,
96 ETMV1_TRACE_ADDR = 0x02,
97 ETMV1_TRACE_MASK = 0x03,
98 /* ContextID */
99 ETMV1_CONTEXTID_NONE = 0x00,
100 ETMV1_CONTEXTID_8 = 0x10,
101 ETMV1_CONTEXTID_16 = 0x20,
102 ETMV1_CONTEXTID_32 = 0x30,
103 ETMV1_CONTEXTID_MASK = 0x30,
104 /* Misc */
105 ETMV1_CYCLE_ACCURATE = 0x100
106 } etmv1_tracemode_t;
107
108 /* forward-declare ETM context */
109 struct etm_context_s;
110
111 typedef struct etm_capture_driver_s
112 {
113 char *name;
114 int (*register_commands)(struct command_context_s *cmd_ctx);
115 int (*init)(struct etm_context_s *etm_ctx);
116 trace_status_t (*status)(struct etm_context_s *etm_ctx);
117 int (*read_trace)(struct etm_context_s *etm_ctx);
118 int (*start_capture)(struct etm_context_s *etm_ctx);
119 int (*stop_capture)(struct etm_context_s *etm_ctx);
120 } etm_capture_driver_t;
121
122 typedef struct etmv1_trace_data_s
123 {
124 u8 pipestat; /* pipeline cycle this packet belongs to */
125 u16 packet; /* packet data (4, 8 or 16 bit) */
126 int tracesync; /* 1 if tracesync was set on this packet */
127 } etmv1_trace_data_t;
128
129 /* describe a trace context
130 * if support for ETMv2 or ETMv3 is to be implemented,
131 * this will have to be split into version independent elements
132 * and a version specific part
133 */
134 typedef struct etm_context_s
135 {
136 reg_cache_t *reg_cache; /* ETM register cache */
137 etm_capture_driver_t *capture_driver; /* driver used to access ETM data */
138 void *capture_driver_priv; /* capture driver private data */
139 trace_status_t capture_status; /* current state of capture run */
140 etmv1_trace_data_t *trace_data; /* trace data */
141 u32 trace_depth; /* number of trace cycles to be analyzed, 0 if no trace data available */
142 etm_portmode_t portmode; /* normal, multiplexed or demultiplexed */
143 etmv1_tracemode_t tracemode; /* type of information the trace contains (data, addres, contextID, ...) */
144 armv4_5_state_t core_state; /* current core state (ARM, Thumb, Jazelle) */
145 // trace_image_provider_t image_provider; /* source for target opcodes */
146 u32 pipe_index; /* current trace cycle */
147 u32 data_index; /* cycle holding next data packet */
148 u32 current_pc; /* current program counter */
149 u32 pc_ok; /* full PC has been acquired */
150 u32 last_branch; /* last branch address output */
151 u32 last_ptr; /* address of the last data access */
152 u32 context_id; /* context ID of the code being traced */
153 } etm_context_t;
154
155 /* PIPESTAT values */
156 typedef enum
157 {
158 STAT_IE = 0x0,
159 STAT_ID = 0x1,
160 STAT_IN = 0x2,
161 STAT_WT = 0x3,
162 STAT_BE = 0x4,
163 STAT_BD = 0x5,
164 STAT_TR = 0x6,
165 STAT_TD = 0x7
166 } etmv1_pipestat_t;
167
168 /* branch reason values */
169 typedef enum
170 {
171 BR_NORMAL = 0x0, /* Normal PC change : periodic synchro (ETMv1.1) */
172 BR_ENABLE = 0x1, /* Trace has been enabled */
173 BR_RESTART = 0x2, /* Trace restarted after a FIFO overflow */
174 BR_NODEBUG = 0x3, /* ARM has exited for debug state */
175 BR_PERIOD = 0x4, /* Peridioc synchronization point (ETM>=v1.2)*/
176 BR_RSVD5 = 0x5, /* reserved */
177 BR_RSVD6 = 0x6, /* reserved */
178 BR_RSVD7 = 0x7, /* reserved */
179 } etmv1_branch_reason_t;
180
181 extern char *etmv1v1_branch_reason_strings[];
182
183 extern reg_cache_t* etm_build_reg_cache(target_t *target, arm_jtag_t *jtag_info, etm_context_t *etm_ctx);
184 extern int etm_read_reg(reg_t *reg);
185 extern int etm_write_reg(reg_t *reg, u32 value);
186 extern int etm_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask);
187 extern int etm_store_reg(reg_t *reg);
188 extern int etm_set_reg(reg_t *reg, u32 value);
189 extern int etm_set_reg_w_exec(reg_t *reg, u8 *buf);
190
191 int etm_register_commands(struct command_context_s *cmd_ctx);
192 int etm_register_user_commands(struct command_context_s *cmd_ctx);
193 extern etm_context_t* etm_create_context(etm_portmode_t portmode, char *capture_driver_name);
194
195 #define ERROR_ETM_INVALID_DRIVER (-1300)
196 #define ERROR_ETM_PORTMODE_NOT_SUPPORTED (-1301)
197 #define ERROR_ETM_CAPTURE_INIT_FAILED (-1302)
198
199 #endif /* ETM_H */