src/target/embeddedice.h

   1 /***************************************************************************
   2  *   Copyright (C) 2005, 2006 by Dominic Rath                              *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
   6  *   oyvind.harboe@zylin.com                                               *
   7  *                                                                         *
   8  *   Copyright (C) 2008 by Spencer Oliver                                  *
   9  *   spen@spen-soft.co.uk                                                  *
  10  *                                                                         *
  11  *   This program is free software; you can redistribute it and/or modify  *
  12  *   it under the terms of the GNU General Public License as published by  *
  13  *   the Free Software Foundation; either version 2 of the License, or     *
  14  *   (at your option) any later version.                                   *
  15  *                                                                         *
  16  *   This program is distributed in the hope that it will be useful,       *
  17  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  18  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  19  *   GNU General Public License for more details.                          *
  20  *                                                                         *
  21  *   You should have received a copy of the GNU General Public License     *
  22  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  23  ***************************************************************************/
  24
  25 #ifndef OPENOCD_TARGET_EMBEDDEDICE_H
  26 #define OPENOCD_TARGET_EMBEDDEDICE_H
  27
  28 #include "arm7_9_common.h"
  29
  30 enum {
  31         EICE_DBG_CTRL = 0,
  32         EICE_DBG_STAT = 1,
  33         EICE_COMMS_CTRL = 2,
  34         EICE_COMMS_DATA = 3,
  35         EICE_W0_ADDR_VALUE = 4,
  36         EICE_W0_ADDR_MASK = 5,
  37         EICE_W0_DATA_VALUE  = 6,
  38         EICE_W0_DATA_MASK = 7,
  39         EICE_W0_CONTROL_VALUE = 8,
  40         EICE_W0_CONTROL_MASK = 9,
  41         EICE_W1_ADDR_VALUE = 10,
  42         EICE_W1_ADDR_MASK = 11,
  43         EICE_W1_DATA_VALUE = 12,
  44         EICE_W1_DATA_MASK = 13,
  45         EICE_W1_CONTROL_VALUE = 14,
  46         EICE_W1_CONTROL_MASK = 15,
  47         EICE_VEC_CATCH = 16
  48 };
  49
  50 enum {
  51         EICE_DBG_CONTROL_ICEDIS = 5,
  52         EICE_DBG_CONTROL_MONEN = 4,
  53         EICE_DBG_CONTROL_INTDIS = 2,
  54         EICE_DBG_CONTROL_DBGRQ = 1,
  55         EICE_DBG_CONTROL_DBGACK = 0,
  56 };
  57
  58 enum {
  59         EICE_DBG_STATUS_IJBIT = 5,
  60         EICE_DBG_STATUS_ITBIT = 4,
  61         EICE_DBG_STATUS_SYSCOMP = 3,
  62         EICE_DBG_STATUS_IFEN = 2,
  63         EICE_DBG_STATUS_DBGRQ = 1,
  64         EICE_DBG_STATUS_DBGACK = 0
  65 };
  66
  67 enum {
  68         EICE_W_CTRL_ENABLE = 0x100,
  69         EICE_W_CTRL_RANGE = 0x80,
  70         EICE_W_CTRL_CHAIN = 0x40,
  71         EICE_W_CTRL_EXTERN = 0x20,
  72         EICE_W_CTRL_nTRANS = 0x10,
  73         EICE_W_CTRL_nOPC = 0x8,
  74         EICE_W_CTRL_MAS = 0x6,
  75         EICE_W_CTRL_ITBIT = 0x2,
  76         EICE_W_CTRL_nRW = 0x1
  77 };
  78
  79 enum {
  80         EICE_COMM_CTRL_WBIT = 1,
  81         EICE_COMM_CTRL_RBIT = 0
  82 };
  83
  84 struct embeddedice_reg {
  85         int addr;
  86         struct arm_jtag *jtag_info;
  87 };
  88
  89 struct reg_cache *embeddedice_build_reg_cache(struct target *target,
  90                 struct arm7_9_common *arm7_9);
  91
  92 int embeddedice_setup(struct target *target);
  93
  94 int embeddedice_read_reg(struct reg *reg);
  95 int embeddedice_read_reg_w_check(struct reg *reg,
  96                 uint8_t *check_value, uint8_t *check_mask);
  97
  98 void embeddedice_write_reg(struct reg *reg, uint32_t value);
  99 void embeddedice_store_reg(struct reg *reg);
 100
 101 void embeddedice_set_reg(struct reg *reg, uint32_t value);
 102
 103 int embeddedice_receive(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size);
 104 int embeddedice_send(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size);
 105
 106 int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeout);
 107
 108 /* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be
 109  * this faster version of embeddedice_write_reg
 110  */
 111 static inline void embeddedice_write_reg_inner(struct jtag_tap *tap, int reg_addr, uint32_t value)
 112 {
 113         uint8_t out_reg_addr = (1 << 5) | reg_addr;
 114         uint8_t out_value[4];
 115         buf_set_u32(out_value, 0, 32, value);
 116
 117         struct scan_field fields[2] = {
 118                         { .num_bits = 32, .out_value = out_value },
 119                         { .num_bits = 6, .out_value = &out_reg_addr },
 120         };
 121
 122         jtag_add_dr_scan(tap, 2, fields, TAP_IDLE);
 123 }
 124
 125 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, const uint8_t *buffer,
 126                 int little, int count);
 127
 128 #endif /* OPENOCD_TARGET_EMBEDDEDICE_H */