ARMv7-M: start using "struct arm"
[openocd.git] / src / target / armv7m.h
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2006 by Magnus Lundin *
6 * lundin@mlu.mine.nu *
7 * *
8 * Copyright (C) 2008 by Spencer Oliver *
9 * spen@spen-soft.co.uk *
10 * *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
15 * *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
20 * *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program; if not, write to the *
23 * Free Software Foundation, Inc., *
24 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 ***************************************************************************/
26 #ifndef ARMV7M_COMMON_H
27 #define ARMV7M_COMMON_H
28
29 #include "arm_adi_v5.h"
30 #include "arm.h"
31
32 /* define for enabling armv7 gdb workarounds */
33 #if 1
34 #define ARMV7_GDB_HACKS
35 #endif
36
37 #ifdef ARMV7_GDB_HACKS
38 extern uint8_t armv7m_gdb_dummy_cpsr_value[];
39 extern struct reg armv7m_gdb_dummy_cpsr_reg;
40 #endif
41
42
43 enum armv7m_mode
44 {
45 ARMV7M_MODE_THREAD = 0,
46 ARMV7M_MODE_USER_THREAD = 1,
47 ARMV7M_MODE_HANDLER = 2,
48 ARMV7M_MODE_ANY = -1
49 };
50
51 extern char *armv7m_mode_strings[];
52
53 enum armv7m_regtype
54 {
55 ARMV7M_REGISTER_CORE_GP,
56 ARMV7M_REGISTER_CORE_SP,
57 ARMV7M_REGISTER_MEMMAP
58 };
59
60 char *armv7m_exception_string(int number);
61
62 /* offsets into armv7m core register cache */
63 enum
64 {
65 /* for convenience, the first set of indices match
66 * the Cortex-M3 DCRSR selectors
67 */
68 ARMV7M_R0,
69 ARMV7M_R1,
70 ARMV7M_R2,
71 ARMV7M_R3,
72
73 ARMV7M_R4,
74 ARMV7M_R5,
75 ARMV7M_R6,
76 ARMV7M_R7,
77
78 ARMV7M_R8,
79 ARMV7M_R9,
80 ARMV7M_R10,
81 ARMV7M_R11,
82
83 ARMV7M_R12,
84 ARMV7M_R13,
85 ARMV7M_R14,
86 ARMV7M_PC = 15,
87
88 ARMV7M_xPSR = 16,
89 ARMV7M_MSP,
90 ARMV7M_PSP,
91
92 /* this next set of indices is arbitrary */
93 ARMV7M_PRIMASK,
94 ARMV7M_BASEPRI,
95 ARMV7M_FAULTMASK,
96 ARMV7M_CONTROL,
97 };
98
99 #define ARMV7M_COMMON_MAGIC 0x2A452A45
100
101 struct armv7m_common
102 {
103 struct arm arm;
104
105 int common_magic;
106 struct reg_cache *core_cache;
107 enum armv7m_mode core_mode;
108 int exception_number;
109 struct swjdp_common swjdp_info;
110
111 uint32_t demcr;
112
113 /* Direct processor core register read and writes */
114 int (*load_core_reg_u32)(struct target *target,
115 enum armv7m_regtype type, uint32_t num, uint32_t *value);
116 int (*store_core_reg_u32)(struct target *target,
117 enum armv7m_regtype type, uint32_t num, uint32_t value);
118
119 /* register cache to processor synchronization */
120 int (*read_core_reg)(struct target *target, unsigned num);
121 int (*write_core_reg)(struct target *target, unsigned num);
122
123 int (*examine_debug_reason)(struct target *target);
124 void (*post_debug_entry)(struct target *target);
125
126 void (*pre_restore_context)(struct target *target);
127 void (*post_restore_context)(struct target *target);
128 };
129
130 static inline struct armv7m_common *
131 target_to_armv7m(struct target *target)
132 {
133 return container_of(target->arch_info, struct armv7m_common, arm);
134 }
135
136 static inline bool is_armv7m(struct armv7m_common *armv7m)
137 {
138 return armv7m->common_magic == ARMV7M_COMMON_MAGIC;
139 }
140
141 struct armv7m_algorithm
142 {
143 int common_magic;
144
145 enum armv7m_mode core_mode;
146 };
147
148 struct armv7m_core_reg
149 {
150 uint32_t num;
151 enum armv7m_regtype type;
152 struct target *target;
153 struct armv7m_common *armv7m_common;
154 };
155
156 struct reg_cache *armv7m_build_reg_cache(struct target *target);
157 enum armv7m_mode armv7m_number_to_mode(int number);
158 int armv7m_mode_to_number(enum armv7m_mode mode);
159
160 int armv7m_arch_state(struct target *target);
161 int armv7m_get_gdb_reg_list(struct target *target,
162 struct reg **reg_list[], int *reg_list_size);
163
164 int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m);
165
166 int armv7m_run_algorithm(struct target *target,
167 int num_mem_params, struct mem_param *mem_params,
168 int num_reg_params, struct reg_param *reg_params,
169 uint32_t entry_point, uint32_t exit_point,
170 int timeout_ms, void *arch_info);
171
172 int armv7m_invalidate_core_regs(struct target *target);
173
174 int armv7m_restore_context(struct target *target);
175
176 int armv7m_checksum_memory(struct target *target,
177 uint32_t address, uint32_t count, uint32_t* checksum);
178 int armv7m_blank_check_memory(struct target *target,
179 uint32_t address, uint32_t count, uint32_t* blank);
180
181 int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found);
182
183 extern const struct command_registration armv7m_command_handlers[];
184
185 #endif /* ARMV7M_H */

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