target/riscv-011: Fix memory leak in handle_halt_routine()
[openocd.git] / src / target / armv7m.h
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2006 by Magnus Lundin *
6 * lundin@mlu.mine.nu *
7 * *
8 * Copyright (C) 2008 by Spencer Oliver *
9 * spen@spen-soft.co.uk *
10 * *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
15 * *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
20 * *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
23 ***************************************************************************/
24
25 #ifndef OPENOCD_TARGET_ARMV7M_H
26 #define OPENOCD_TARGET_ARMV7M_H
27
28 #include "arm_adi_v5.h"
29 #include "arm.h"
30 #include "armv7m_trace.h"
31
32 extern const int armv7m_psp_reg_map[];
33 extern const int armv7m_msp_reg_map[];
34
35 const char *armv7m_exception_string(int number);
36
37 /* offsets into armv7m core register cache */
38 enum {
39 /* for convenience, the first set of indices match
40 * the Cortex-M3/-M4 DCRSR selectors
41 */
42 ARMV7M_R0,
43 ARMV7M_R1,
44 ARMV7M_R2,
45 ARMV7M_R3,
46
47 ARMV7M_R4,
48 ARMV7M_R5,
49 ARMV7M_R6,
50 ARMV7M_R7,
51
52 ARMV7M_R8,
53 ARMV7M_R9,
54 ARMV7M_R10,
55 ARMV7M_R11,
56
57 ARMV7M_R12,
58 ARMV7M_R13,
59 ARMV7M_R14,
60 ARMV7M_PC = 15,
61
62 ARMV7M_xPSR = 16,
63 ARMV7M_MSP,
64 ARMV7M_PSP,
65
66 /* this next set of indices is arbitrary */
67 ARMV7M_PRIMASK,
68 ARMV7M_BASEPRI,
69 ARMV7M_FAULTMASK,
70 ARMV7M_CONTROL,
71
72 /* 32bit Floating-point registers */
73 ARMV7M_S0,
74 ARMV7M_S1,
75 ARMV7M_S2,
76 ARMV7M_S3,
77 ARMV7M_S4,
78 ARMV7M_S5,
79 ARMV7M_S6,
80 ARMV7M_S7,
81 ARMV7M_S8,
82 ARMV7M_S9,
83 ARMV7M_S10,
84 ARMV7M_S11,
85 ARMV7M_S12,
86 ARMV7M_S13,
87 ARMV7M_S14,
88 ARMV7M_S15,
89 ARMV7M_S16,
90 ARMV7M_S17,
91 ARMV7M_S18,
92 ARMV7M_S19,
93 ARMV7M_S20,
94 ARMV7M_S21,
95 ARMV7M_S22,
96 ARMV7M_S23,
97 ARMV7M_S24,
98 ARMV7M_S25,
99 ARMV7M_S26,
100 ARMV7M_S27,
101 ARMV7M_S28,
102 ARMV7M_S29,
103 ARMV7M_S30,
104 ARMV7M_S31,
105
106 /* 64bit Floating-point registers */
107 ARMV7M_D0,
108 ARMV7M_D1,
109 ARMV7M_D2,
110 ARMV7M_D3,
111 ARMV7M_D4,
112 ARMV7M_D5,
113 ARMV7M_D6,
114 ARMV7M_D7,
115 ARMV7M_D8,
116 ARMV7M_D9,
117 ARMV7M_D10,
118 ARMV7M_D11,
119 ARMV7M_D12,
120 ARMV7M_D13,
121 ARMV7M_D14,
122 ARMV7M_D15,
123
124 /* Floating-point status registers */
125 ARMV7M_FPSID,
126 ARMV7M_FPSCR,
127 ARMV7M_FPEXC,
128
129 ARMV7M_LAST_REG,
130 };
131
132 enum {
133 FP_NONE = 0,
134 FPv4_SP,
135 FPv5_SP,
136 FPv5_DP,
137 };
138
139 #define ARMV7M_NUM_CORE_REGS (ARMV7M_xPSR + 1)
140 #define ARMV7M_NUM_CORE_REGS_NOFP (ARMV7M_NUM_CORE_REGS + 6)
141
142 #define ARMV7M_COMMON_MAGIC 0x2A452A45
143
144 struct armv7m_common {
145 struct arm arm;
146
147 int common_magic;
148 int exception_number;
149
150 /* AP this processor is connected to in the DAP */
151 struct adiv5_ap *debug_ap;
152
153 int fp_feature;
154 uint32_t demcr;
155
156 /* stlink is a high level adapter, does not support all functions */
157 bool stlink;
158
159 struct armv7m_trace_config trace_config;
160
161 /* Direct processor core register read and writes */
162 int (*load_core_reg_u32)(struct target *target, uint32_t num, uint32_t *value);
163 int (*store_core_reg_u32)(struct target *target, uint32_t num, uint32_t value);
164
165 int (*examine_debug_reason)(struct target *target);
166 int (*post_debug_entry)(struct target *target);
167
168 void (*pre_restore_context)(struct target *target);
169 };
170
171 static inline struct armv7m_common *
172 target_to_armv7m(struct target *target)
173 {
174 return container_of(target->arch_info, struct armv7m_common, arm);
175 }
176
177 static inline bool is_armv7m(const struct armv7m_common *armv7m)
178 {
179 return armv7m->common_magic == ARMV7M_COMMON_MAGIC;
180 }
181
182 struct armv7m_algorithm {
183 int common_magic;
184
185 enum arm_mode core_mode;
186
187 uint32_t context[ARMV7M_LAST_REG]; /* ARMV7M_NUM_REGS */
188 };
189
190 struct reg_cache *armv7m_build_reg_cache(struct target *target);
191 void armv7m_free_reg_cache(struct target *target);
192
193 enum armv7m_mode armv7m_number_to_mode(int number);
194 int armv7m_mode_to_number(enum armv7m_mode mode);
195
196 int armv7m_arch_state(struct target *target);
197 int armv7m_get_gdb_reg_list(struct target *target,
198 struct reg **reg_list[], int *reg_list_size,
199 enum target_register_class reg_class);
200
201 int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m);
202
203 int armv7m_run_algorithm(struct target *target,
204 int num_mem_params, struct mem_param *mem_params,
205 int num_reg_params, struct reg_param *reg_params,
206 target_addr_t entry_point, target_addr_t exit_point,
207 int timeout_ms, void *arch_info);
208
209 int armv7m_start_algorithm(struct target *target,
210 int num_mem_params, struct mem_param *mem_params,
211 int num_reg_params, struct reg_param *reg_params,
212 target_addr_t entry_point, target_addr_t exit_point,
213 void *arch_info);
214
215 int armv7m_wait_algorithm(struct target *target,
216 int num_mem_params, struct mem_param *mem_params,
217 int num_reg_params, struct reg_param *reg_params,
218 target_addr_t exit_point, int timeout_ms,
219 void *arch_info);
220
221 int armv7m_invalidate_core_regs(struct target *target);
222
223 int armv7m_restore_context(struct target *target);
224
225 int armv7m_checksum_memory(struct target *target,
226 target_addr_t address, uint32_t count, uint32_t *checksum);
227 int armv7m_blank_check_memory(struct target *target,
228 struct target_memory_check_block *blocks, int num_blocks, uint8_t erased_value);
229
230 int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found);
231
232 extern const struct command_registration armv7m_command_handlers[];
233
234 #endif /* OPENOCD_TARGET_ARMV7M_H */