f6e3fde5c58adee65558af520d121712f71645b1
[openocd.git] / src / target / arm966e.c
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20 #ifdef HAVE_CONFIG_H
21 #include "config.h"
22 #endif
23
24 #include "arm966e.h"
25
26 #include "arm7_9_common.h"
27 #include "register.h"
28 #include "target.h"
29 #include "armv4_5.h"
30 #include "embeddedice.h"
31 #include "log.h"
32 #include "jtag.h"
33 #include "arm_jtag.h"
34
35 #include <stdlib.h>
36 #include <string.h>
37
38 #if 0
39 #define _DEBUG_INSTRUCTION_EXECUTION_
40 #endif
41
42 /* cli handling */
43 int arm966e_register_commands(struct command_context_s *cmd_ctx);
44
45 /* forward declarations */
46 int arm966e_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
47 int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
48 int arm966e_quit(void);
49
50 target_type_t arm966e_target =
51 {
52 .name = "arm966e",
53
54 .poll = arm7_9_poll,
55 .arch_state = armv4_5_arch_state,
56
57 .target_request_data = arm7_9_target_request_data,
58
59 .halt = arm7_9_halt,
60 .resume = arm7_9_resume,
61 .step = arm7_9_step,
62
63 .assert_reset = arm7_9_assert_reset,
64 .deassert_reset = arm7_9_deassert_reset,
65 .soft_reset_halt = arm7_9_soft_reset_halt,
66
67 .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
68
69 .read_memory = arm7_9_read_memory,
70 .write_memory = arm7_9_write_memory,
71 .bulk_write_memory = arm7_9_bulk_write_memory,
72 .checksum_memory = arm7_9_checksum_memory,
73 .blank_check_memory = arm7_9_blank_check_memory,
74
75 .run_algorithm = armv4_5_run_algorithm,
76
77 .add_breakpoint = arm7_9_add_breakpoint,
78 .remove_breakpoint = arm7_9_remove_breakpoint,
79 .add_watchpoint = arm7_9_add_watchpoint,
80 .remove_watchpoint = arm7_9_remove_watchpoint,
81
82 .register_commands = arm966e_register_commands,
83 .target_command = arm966e_target_command,
84 .init_target = arm966e_init_target,
85 .examine = arm9tdmi_examine,
86 .quit = arm966e_quit,
87 };
88
89 int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
90 {
91 arm9tdmi_init_target(cmd_ctx, target);
92
93 return ERROR_OK;
94 }
95
96 int arm966e_quit(void)
97 {
98
99 return ERROR_OK;
100 }
101
102 int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, int chain_pos, char *variant)
103 {
104 arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common;
105 arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common;
106
107 arm9tdmi_init_arch_info(target, arm9tdmi, chain_pos, variant);
108
109 arm9tdmi->arch_info = arm966e;
110 arm966e->common_magic = ARM966E_COMMON_MAGIC;
111
112 /* The ARM966E-S implements the ARMv5TE architecture which
113 * has the BKPT instruction, so we don't have to use a watchpoint comparator
114 */
115 arm7_9->arm_bkpt = ARMV5_BKPT(0x0);
116 arm7_9->thumb_bkpt = ARMV5_T_BKPT(0x0) & 0xffff;
117
118 return ERROR_OK;
119 }
120
121 int arm966e_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target)
122 {
123 int chain_pos;
124 char *variant = NULL;
125 arm966e_common_t *arm966e = malloc(sizeof(arm966e_common_t));
126 memset(arm966e, 0, sizeof(*arm966e));
127
128 if (argc < 4)
129 {
130 LOG_ERROR("'target arm966e' requires at least one additional argument");
131 exit(-1);
132 }
133
134 chain_pos = strtoul(args[3], NULL, 0);
135
136 if (argc >= 5)
137 variant = args[4];
138
139 LOG_DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
140
141 arm966e_init_arch_info(target, arm966e, chain_pos, variant);
142
143 return ERROR_OK;
144 }
145
146 int arm966e_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm9tdmi_common_t **arm9tdmi_p, arm966e_common_t **arm966e_p)
147 {
148 armv4_5_common_t *armv4_5 = target->arch_info;
149 arm7_9_common_t *arm7_9;
150 arm9tdmi_common_t *arm9tdmi;
151 arm966e_common_t *arm966e;
152
153 if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
154 {
155 return -1;
156 }
157
158 arm7_9 = armv4_5->arch_info;
159 if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC)
160 {
161 return -1;
162 }
163
164 arm9tdmi = arm7_9->arch_info;
165 if (arm9tdmi->common_magic != ARM9TDMI_COMMON_MAGIC)
166 {
167 return -1;
168 }
169
170 arm966e = arm9tdmi->arch_info;
171 if (arm966e->common_magic != ARM966E_COMMON_MAGIC)
172 {
173 return -1;
174 }
175
176 *armv4_5_p = armv4_5;
177 *arm7_9_p = arm7_9;
178 *arm9tdmi_p = arm9tdmi;
179 *arm966e_p = arm966e;
180
181 return ERROR_OK;
182 }
183
184 int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
185 {
186 armv4_5_common_t *armv4_5 = target->arch_info;
187 arm7_9_common_t *arm7_9 = armv4_5->arch_info;
188 arm_jtag_t *jtag_info = &arm7_9->jtag_info;
189 scan_field_t fields[3];
190 u8 reg_addr_buf = reg_addr & 0x3f;
191 u8 nr_w_buf = 0;
192
193 jtag_add_end_state(TAP_RTI);
194 arm_jtag_scann(jtag_info, 0xf);
195 arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
196
197 fields[0].device = jtag_info->chain_pos;
198 fields[0].num_bits = 32;
199 fields[0].out_value = NULL;
200 fields[0].out_mask = NULL;
201 fields[0].in_value = NULL;
202 fields[0].in_check_value = NULL;
203 fields[0].in_check_mask = NULL;
204 fields[0].in_handler = NULL;
205 fields[0].in_handler_priv = NULL;
206
207 fields[1].device = jtag_info->chain_pos;
208 fields[1].num_bits = 6;
209 fields[1].out_value = &reg_addr_buf;
210 fields[1].out_mask = NULL;
211 fields[1].in_value = NULL;
212 fields[1].in_check_value = NULL;
213 fields[1].in_check_mask = NULL;
214 fields[1].in_handler = NULL;
215 fields[1].in_handler_priv = NULL;
216
217 fields[2].device = jtag_info->chain_pos;
218 fields[2].num_bits = 1;
219 fields[2].out_value = &nr_w_buf;
220 fields[2].out_mask = NULL;
221 fields[2].in_value = NULL;
222 fields[2].in_check_value = NULL;
223 fields[2].in_check_mask = NULL;
224 fields[2].in_handler = NULL;
225 fields[2].in_handler_priv = NULL;
226
227 jtag_add_dr_scan(3, fields, -1);
228
229 fields[0].in_handler_priv = value;
230 fields[0].in_handler = arm_jtag_buf_to_u32;
231
232 jtag_add_dr_scan(3, fields, -1);
233
234 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
235 jtag_execute_queue();
236 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
237 #endif
238
239 return ERROR_OK;
240 }
241
242 int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
243 {
244 armv4_5_common_t *armv4_5 = target->arch_info;
245 arm7_9_common_t *arm7_9 = armv4_5->arch_info;
246 arm_jtag_t *jtag_info = &arm7_9->jtag_info;
247 scan_field_t fields[3];
248 u8 reg_addr_buf = reg_addr & 0x3f;
249 u8 nr_w_buf = 1;
250 u8 value_buf[4];
251
252 buf_set_u32(value_buf, 0, 32, value);
253
254 jtag_add_end_state(TAP_RTI);
255 arm_jtag_scann(jtag_info, 0xf);
256 arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
257
258 fields[0].device = jtag_info->chain_pos;
259 fields[0].num_bits = 32;
260 fields[0].out_value = value_buf;
261 fields[0].out_mask = NULL;
262 fields[0].in_value = NULL;
263 fields[0].in_check_value = NULL;
264 fields[0].in_check_mask = NULL;
265 fields[0].in_handler = NULL;
266 fields[0].in_handler_priv = NULL;
267
268 fields[1].device = jtag_info->chain_pos;
269 fields[1].num_bits = 6;
270 fields[1].out_value = &reg_addr_buf;
271 fields[1].out_mask = NULL;
272 fields[1].in_value = NULL;
273 fields[1].in_check_value = NULL;
274 fields[1].in_check_mask = NULL;
275 fields[1].in_handler = NULL;
276 fields[1].in_handler_priv = NULL;
277
278 fields[2].device = jtag_info->chain_pos;
279 fields[2].num_bits = 1;
280 fields[2].out_value = &nr_w_buf;
281 fields[2].out_mask = NULL;
282 fields[2].in_value = NULL;
283 fields[2].in_check_value = NULL;
284 fields[2].in_check_mask = NULL;
285 fields[2].in_handler = NULL;
286 fields[2].in_handler_priv = NULL;
287
288 jtag_add_dr_scan(3, fields, -1);
289
290 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
291 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
292 #endif
293
294 return ERROR_OK;
295 }
296
297 int arm966e_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
298 {
299 int retval;
300 target_t *target = get_current_target(cmd_ctx);
301 armv4_5_common_t *armv4_5;
302 arm7_9_common_t *arm7_9;
303 arm9tdmi_common_t *arm9tdmi;
304 arm966e_common_t *arm966e;
305 arm_jtag_t *jtag_info;
306
307 if (arm966e_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm966e) != ERROR_OK)
308 {
309 command_print(cmd_ctx, "current target isn't an ARM966e target");
310 return ERROR_OK;
311 }
312
313 jtag_info = &arm7_9->jtag_info;
314
315 if (target->state != TARGET_HALTED)
316 {
317 command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
318 return ERROR_OK;
319 }
320
321 /* one or more argument, access a single register (write if second argument is given */
322 if (argc >= 1)
323 {
324 int address = strtoul(args[0], NULL, 0);
325
326 if (argc == 1)
327 {
328 u32 value;
329 if ((retval = arm966e_read_cp15(target, address, &value)) != ERROR_OK)
330 {
331 command_print(cmd_ctx, "couldn't access reg %i", address);
332 return ERROR_OK;
333 }
334 jtag_execute_queue();
335
336 command_print(cmd_ctx, "%i: %8.8x", address, value);
337 }
338 else if (argc == 2)
339 {
340 u32 value = strtoul(args[1], NULL, 0);
341 if ((retval = arm966e_write_cp15(target, address, value)) != ERROR_OK)
342 {
343 command_print(cmd_ctx, "couldn't access reg %i", address);
344 return ERROR_OK;
345 }
346 command_print(cmd_ctx, "%i: %8.8x", address, value);
347 }
348 }
349
350 return ERROR_OK;
351 }
352
353 int arm966e_register_commands(struct command_context_s *cmd_ctx)
354 {
355 int retval;
356 command_t *arm966e_cmd;
357
358 retval = arm9tdmi_register_commands(cmd_ctx);
359 arm966e_cmd = register_command(cmd_ctx, NULL, "arm966e", NULL, COMMAND_ANY, "arm966e specific commands");
360 register_command(cmd_ctx, arm966e_cmd, "cp15", arm966e_handle_cp15_command, COMMAND_EXEC, "display/modify cp15 register <num> [value]");
361
362 return ERROR_OK;
363 }

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