1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
31 #define _DEBUG_INSTRUCTION_EXECUTION_
35 int arm966e_register_commands(struct command_context_s
*cmd_ctx
);
37 /* forward declarations */
38 int arm966e_target_create(struct target_s
*target
, Jim_Interp
*interp
);
39 int arm966e_init_target(struct command_context_s
*cmd_ctx
, struct target_s
*target
);
40 int arm966e_quit(void);
42 target_type_t arm966e_target
=
47 .arch_state
= armv4_5_arch_state
,
49 .target_request_data
= arm7_9_target_request_data
,
52 .resume
= arm7_9_resume
,
55 .assert_reset
= arm7_9_assert_reset
,
56 .deassert_reset
= arm7_9_deassert_reset
,
57 .soft_reset_halt
= arm7_9_soft_reset_halt
,
59 .get_gdb_reg_list
= armv4_5_get_gdb_reg_list
,
61 .read_memory
= arm7_9_read_memory
,
62 .write_memory
= arm7_9_write_memory
,
63 .bulk_write_memory
= arm7_9_bulk_write_memory
,
64 .checksum_memory
= arm7_9_checksum_memory
,
65 .blank_check_memory
= arm7_9_blank_check_memory
,
67 .run_algorithm
= armv4_5_run_algorithm
,
69 .add_breakpoint
= arm7_9_add_breakpoint
,
70 .remove_breakpoint
= arm7_9_remove_breakpoint
,
71 .add_watchpoint
= arm7_9_add_watchpoint
,
72 .remove_watchpoint
= arm7_9_remove_watchpoint
,
74 .register_commands
= arm966e_register_commands
,
75 .target_create
= arm966e_target_create
,
76 .init_target
= arm966e_init_target
,
77 .examine
= arm9tdmi_examine
,
81 int arm966e_init_target(struct command_context_s
*cmd_ctx
, struct target_s
*target
)
83 arm9tdmi_init_target(cmd_ctx
, target
);
88 int arm966e_quit(void)
93 int arm966e_init_arch_info(target_t
*target
, arm966e_common_t
*arm966e
, jtag_tap_t
*tap
)
95 arm9tdmi_common_t
*arm9tdmi
= &arm966e
->arm9tdmi_common
;
96 arm7_9_common_t
*arm7_9
= &arm9tdmi
->arm7_9_common
;
98 arm9tdmi_init_arch_info(target
, arm9tdmi
, tap
);
100 arm9tdmi
->arch_info
= arm966e
;
101 arm966e
->common_magic
= ARM966E_COMMON_MAGIC
;
103 /* The ARM966E-S implements the ARMv5TE architecture which
104 * has the BKPT instruction, so we don't have to use a watchpoint comparator
106 arm7_9
->arm_bkpt
= ARMV5_BKPT(0x0);
107 arm7_9
->thumb_bkpt
= ARMV5_T_BKPT(0x0) & 0xffff;
112 int arm966e_target_create( struct target_s
*target
, Jim_Interp
*interp
)
114 arm966e_common_t
*arm966e
= calloc(1,sizeof(arm966e_common_t
));
116 arm966e_init_arch_info(target
, arm966e
, target
->tap
);
121 int arm966e_get_arch_pointers(target_t
*target
, armv4_5_common_t
**armv4_5_p
, arm7_9_common_t
**arm7_9_p
, arm9tdmi_common_t
**arm9tdmi_p
, arm966e_common_t
**arm966e_p
)
123 armv4_5_common_t
*armv4_5
= target
->arch_info
;
124 arm7_9_common_t
*arm7_9
;
125 arm9tdmi_common_t
*arm9tdmi
;
126 arm966e_common_t
*arm966e
;
128 if (armv4_5
->common_magic
!= ARMV4_5_COMMON_MAGIC
)
133 arm7_9
= armv4_5
->arch_info
;
134 if (arm7_9
->common_magic
!= ARM7_9_COMMON_MAGIC
)
139 arm9tdmi
= arm7_9
->arch_info
;
140 if (arm9tdmi
->common_magic
!= ARM9TDMI_COMMON_MAGIC
)
145 arm966e
= arm9tdmi
->arch_info
;
146 if (arm966e
->common_magic
!= ARM966E_COMMON_MAGIC
)
151 *armv4_5_p
= armv4_5
;
153 *arm9tdmi_p
= arm9tdmi
;
154 *arm966e_p
= arm966e
;
159 int arm966e_read_cp15(target_t
*target
, int reg_addr
, u32
*value
)
161 int retval
= ERROR_OK
;
162 armv4_5_common_t
*armv4_5
= target
->arch_info
;
163 arm7_9_common_t
*arm7_9
= armv4_5
->arch_info
;
164 arm_jtag_t
*jtag_info
= &arm7_9
->jtag_info
;
165 scan_field_t fields
[3];
166 u8 reg_addr_buf
= reg_addr
& 0x3f;
169 jtag_add_end_state(TAP_IDLE
);
170 if ((retval
= arm_jtag_scann(jtag_info
, 0xf)) != ERROR_OK
)
174 arm_jtag_set_instr(jtag_info
, jtag_info
->intest_instr
, NULL
);
176 fields
[0].tap
= jtag_info
->tap
;
177 fields
[0].num_bits
= 32;
178 fields
[0].out_value
= NULL
;
179 fields
[0].in_value
= NULL
;
181 fields
[1].tap
= jtag_info
->tap
;
182 fields
[1].num_bits
= 6;
183 fields
[1].out_value
= ®_addr_buf
;
184 fields
[1].in_value
= NULL
;
186 fields
[2].tap
= jtag_info
->tap
;
187 fields
[2].num_bits
= 1;
188 fields
[2].out_value
= &nr_w_buf
;
189 fields
[2].in_value
= NULL
;
191 jtag_add_dr_scan(3, fields
, TAP_INVALID
);
194 fields
[1].in_value
= tmp
;
196 jtag_add_dr_scan_now(3, fields
, TAP_INVALID
);
198 *value
=le_to_h_u32(tmp
);
201 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
202 if ((retval
= jtag_execute_queue()) != ERROR_OK
)
206 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr
, *value
);
212 int arm966e_write_cp15(target_t
*target
, int reg_addr
, u32 value
)
214 int retval
= ERROR_OK
;
215 armv4_5_common_t
*armv4_5
= target
->arch_info
;
216 arm7_9_common_t
*arm7_9
= armv4_5
->arch_info
;
217 arm_jtag_t
*jtag_info
= &arm7_9
->jtag_info
;
218 scan_field_t fields
[3];
219 u8 reg_addr_buf
= reg_addr
& 0x3f;
223 buf_set_u32(value_buf
, 0, 32, value
);
225 jtag_add_end_state(TAP_IDLE
);
226 if ((retval
= arm_jtag_scann(jtag_info
, 0xf)) != ERROR_OK
)
230 arm_jtag_set_instr(jtag_info
, jtag_info
->intest_instr
, NULL
);
232 fields
[0].tap
= jtag_info
->tap
;
233 fields
[0].num_bits
= 32;
234 fields
[0].out_value
= value_buf
;
235 fields
[0].in_value
= NULL
;
237 fields
[1].tap
= jtag_info
->tap
;
238 fields
[1].num_bits
= 6;
239 fields
[1].out_value
= ®_addr_buf
;
240 fields
[1].in_value
= NULL
;
242 fields
[2].tap
= jtag_info
->tap
;
243 fields
[2].num_bits
= 1;
244 fields
[2].out_value
= &nr_w_buf
;
245 fields
[2].in_value
= NULL
;
247 jtag_add_dr_scan(3, fields
, TAP_INVALID
);
249 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
250 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr
, value
);
256 int arm966e_handle_cp15_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
259 target_t
*target
= get_current_target(cmd_ctx
);
260 armv4_5_common_t
*armv4_5
;
261 arm7_9_common_t
*arm7_9
;
262 arm9tdmi_common_t
*arm9tdmi
;
263 arm966e_common_t
*arm966e
;
264 arm_jtag_t
*jtag_info
;
266 if (arm966e_get_arch_pointers(target
, &armv4_5
, &arm7_9
, &arm9tdmi
, &arm966e
) != ERROR_OK
)
268 command_print(cmd_ctx
, "current target isn't an ARM966e target");
272 jtag_info
= &arm7_9
->jtag_info
;
274 if (target
->state
!= TARGET_HALTED
)
276 command_print(cmd_ctx
, "target must be stopped for \"%s\" command", cmd
);
280 /* one or more argument, access a single register (write if second argument is given */
283 int address
= strtoul(args
[0], NULL
, 0);
288 if ((retval
= arm966e_read_cp15(target
, address
, &value
)) != ERROR_OK
)
290 command_print(cmd_ctx
, "couldn't access reg %i", address
);
293 if ((retval
= jtag_execute_queue()) != ERROR_OK
)
298 command_print(cmd_ctx
, "%i: %8.8x", address
, value
);
302 u32 value
= strtoul(args
[1], NULL
, 0);
303 if ((retval
= arm966e_write_cp15(target
, address
, value
)) != ERROR_OK
)
305 command_print(cmd_ctx
, "couldn't access reg %i", address
);
308 command_print(cmd_ctx
, "%i: %8.8x", address
, value
);
315 int arm966e_register_commands(struct command_context_s
*cmd_ctx
)
318 command_t
*arm966e_cmd
;
320 retval
= arm9tdmi_register_commands(cmd_ctx
);
321 arm966e_cmd
= register_command(cmd_ctx
, NULL
, "arm966e", NULL
, COMMAND_ANY
, "arm966e specific commands");
322 register_command(cmd_ctx
, arm966e_cmd
, "cp15", arm966e_handle_cp15_command
, COMMAND_EXEC
, "display/modify cp15 register <num> [value]");
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