1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 #include "arm7_9_common.h"
33 #include "embeddedice.h"
42 #define _DEBUG_INSTRUCTION_EXECUTION_
46 int arm966e_register_commands(struct command_context_s
*cmd_ctx
);
48 /* forward declarations */
49 int arm966e_target_create(struct target_s
*target
, Jim_Interp
*interp
);
50 int arm966e_init_target(struct command_context_s
*cmd_ctx
, struct target_s
*target
);
51 int arm966e_quit(void);
53 target_type_t arm966e_target
=
58 .arch_state
= armv4_5_arch_state
,
60 .target_request_data
= arm7_9_target_request_data
,
63 .resume
= arm7_9_resume
,
66 .assert_reset
= arm7_9_assert_reset
,
67 .deassert_reset
= arm7_9_deassert_reset
,
68 .soft_reset_halt
= arm7_9_soft_reset_halt
,
70 .get_gdb_reg_list
= armv4_5_get_gdb_reg_list
,
72 .read_memory
= arm7_9_read_memory
,
73 .write_memory
= arm7_9_write_memory
,
74 .bulk_write_memory
= arm7_9_bulk_write_memory
,
75 .checksum_memory
= arm7_9_checksum_memory
,
76 .blank_check_memory
= arm7_9_blank_check_memory
,
78 .run_algorithm
= armv4_5_run_algorithm
,
80 .add_breakpoint
= arm7_9_add_breakpoint
,
81 .remove_breakpoint
= arm7_9_remove_breakpoint
,
82 .add_watchpoint
= arm7_9_add_watchpoint
,
83 .remove_watchpoint
= arm7_9_remove_watchpoint
,
85 .register_commands
= arm966e_register_commands
,
86 .target_create
= arm966e_target_create
,
87 .init_target
= arm966e_init_target
,
88 .examine
= arm9tdmi_examine
,
92 int arm966e_init_target(struct command_context_s
*cmd_ctx
, struct target_s
*target
)
94 arm9tdmi_init_target(cmd_ctx
, target
);
99 int arm966e_quit(void)
104 int arm966e_init_arch_info(target_t
*target
, arm966e_common_t
*arm966e
, jtag_tap_t
*tap
)
106 arm9tdmi_common_t
*arm9tdmi
= &arm966e
->arm9tdmi_common
;
107 arm7_9_common_t
*arm7_9
= &arm9tdmi
->arm7_9_common
;
109 arm9tdmi_init_arch_info(target
, arm9tdmi
, tap
);
111 arm9tdmi
->arch_info
= arm966e
;
112 arm966e
->common_magic
= ARM966E_COMMON_MAGIC
;
114 /* The ARM966E-S implements the ARMv5TE architecture which
115 * has the BKPT instruction, so we don't have to use a watchpoint comparator
117 arm7_9
->arm_bkpt
= ARMV5_BKPT(0x0);
118 arm7_9
->thumb_bkpt
= ARMV5_T_BKPT(0x0) & 0xffff;
123 int arm966e_target_create( struct target_s
*target
, Jim_Interp
*interp
)
125 arm966e_common_t
*arm966e
= calloc(1,sizeof(arm966e_common_t
));
127 arm966e_init_arch_info(target
, arm966e
, target
->tap
);
132 int arm966e_get_arch_pointers(target_t
*target
, armv4_5_common_t
**armv4_5_p
, arm7_9_common_t
**arm7_9_p
, arm9tdmi_common_t
**arm9tdmi_p
, arm966e_common_t
**arm966e_p
)
134 armv4_5_common_t
*armv4_5
= target
->arch_info
;
135 arm7_9_common_t
*arm7_9
;
136 arm9tdmi_common_t
*arm9tdmi
;
137 arm966e_common_t
*arm966e
;
139 if (armv4_5
->common_magic
!= ARMV4_5_COMMON_MAGIC
)
144 arm7_9
= armv4_5
->arch_info
;
145 if (arm7_9
->common_magic
!= ARM7_9_COMMON_MAGIC
)
150 arm9tdmi
= arm7_9
->arch_info
;
151 if (arm9tdmi
->common_magic
!= ARM9TDMI_COMMON_MAGIC
)
156 arm966e
= arm9tdmi
->arch_info
;
157 if (arm966e
->common_magic
!= ARM966E_COMMON_MAGIC
)
162 *armv4_5_p
= armv4_5
;
164 *arm9tdmi_p
= arm9tdmi
;
165 *arm966e_p
= arm966e
;
170 int arm966e_read_cp15(target_t
*target
, int reg_addr
, u32
*value
)
172 int retval
= ERROR_OK
;
173 armv4_5_common_t
*armv4_5
= target
->arch_info
;
174 arm7_9_common_t
*arm7_9
= armv4_5
->arch_info
;
175 arm_jtag_t
*jtag_info
= &arm7_9
->jtag_info
;
176 scan_field_t fields
[3];
177 u8 reg_addr_buf
= reg_addr
& 0x3f;
180 jtag_add_end_state(TAP_IDLE
);
181 if ((retval
= arm_jtag_scann(jtag_info
, 0xf)) != ERROR_OK
)
185 arm_jtag_set_instr(jtag_info
, jtag_info
->intest_instr
, NULL
);
187 fields
[0].tap
= jtag_info
->tap
;
188 fields
[0].num_bits
= 32;
189 fields
[0].out_value
= NULL
;
190 fields
[0].in_value
= NULL
;
192 fields
[1].tap
= jtag_info
->tap
;
193 fields
[1].num_bits
= 6;
194 fields
[1].out_value
= ®_addr_buf
;
195 fields
[1].in_value
= NULL
;
197 fields
[2].tap
= jtag_info
->tap
;
198 fields
[2].num_bits
= 1;
199 fields
[2].out_value
= &nr_w_buf
;
200 fields
[2].in_value
= NULL
;
202 jtag_add_dr_scan(3, fields
, TAP_INVALID
);
205 fields
[1].in_value
= tmp
;
207 jtag_add_dr_scan_now(3, fields
, TAP_INVALID
);
209 *value
=le_to_h_u32(tmp
);
212 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
213 if ((retval
= jtag_execute_queue()) != ERROR_OK
)
217 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr
, *value
);
223 int arm966e_write_cp15(target_t
*target
, int reg_addr
, u32 value
)
225 int retval
= ERROR_OK
;
226 armv4_5_common_t
*armv4_5
= target
->arch_info
;
227 arm7_9_common_t
*arm7_9
= armv4_5
->arch_info
;
228 arm_jtag_t
*jtag_info
= &arm7_9
->jtag_info
;
229 scan_field_t fields
[3];
230 u8 reg_addr_buf
= reg_addr
& 0x3f;
234 buf_set_u32(value_buf
, 0, 32, value
);
236 jtag_add_end_state(TAP_IDLE
);
237 if ((retval
= arm_jtag_scann(jtag_info
, 0xf)) != ERROR_OK
)
241 arm_jtag_set_instr(jtag_info
, jtag_info
->intest_instr
, NULL
);
243 fields
[0].tap
= jtag_info
->tap
;
244 fields
[0].num_bits
= 32;
245 fields
[0].out_value
= value_buf
;
246 fields
[0].in_value
= NULL
;
248 fields
[1].tap
= jtag_info
->tap
;
249 fields
[1].num_bits
= 6;
250 fields
[1].out_value
= ®_addr_buf
;
251 fields
[1].in_value
= NULL
;
253 fields
[2].tap
= jtag_info
->tap
;
254 fields
[2].num_bits
= 1;
255 fields
[2].out_value
= &nr_w_buf
;
256 fields
[2].in_value
= NULL
;
258 jtag_add_dr_scan(3, fields
, TAP_INVALID
);
260 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
261 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr
, value
);
267 int arm966e_handle_cp15_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
270 target_t
*target
= get_current_target(cmd_ctx
);
271 armv4_5_common_t
*armv4_5
;
272 arm7_9_common_t
*arm7_9
;
273 arm9tdmi_common_t
*arm9tdmi
;
274 arm966e_common_t
*arm966e
;
275 arm_jtag_t
*jtag_info
;
277 if (arm966e_get_arch_pointers(target
, &armv4_5
, &arm7_9
, &arm9tdmi
, &arm966e
) != ERROR_OK
)
279 command_print(cmd_ctx
, "current target isn't an ARM966e target");
283 jtag_info
= &arm7_9
->jtag_info
;
285 if (target
->state
!= TARGET_HALTED
)
287 command_print(cmd_ctx
, "target must be stopped for \"%s\" command", cmd
);
291 /* one or more argument, access a single register (write if second argument is given */
294 int address
= strtoul(args
[0], NULL
, 0);
299 if ((retval
= arm966e_read_cp15(target
, address
, &value
)) != ERROR_OK
)
301 command_print(cmd_ctx
, "couldn't access reg %i", address
);
304 if ((retval
= jtag_execute_queue()) != ERROR_OK
)
309 command_print(cmd_ctx
, "%i: %8.8x", address
, value
);
313 u32 value
= strtoul(args
[1], NULL
, 0);
314 if ((retval
= arm966e_write_cp15(target
, address
, value
)) != ERROR_OK
)
316 command_print(cmd_ctx
, "couldn't access reg %i", address
);
319 command_print(cmd_ctx
, "%i: %8.8x", address
, value
);
326 int arm966e_register_commands(struct command_context_s
*cmd_ctx
)
329 command_t
*arm966e_cmd
;
331 retval
= arm9tdmi_register_commands(cmd_ctx
);
332 arm966e_cmd
= register_command(cmd_ctx
, NULL
, "arm966e", NULL
, COMMAND_ANY
, "arm966e specific commands");
333 register_command(cmd_ctx
, arm966e_cmd
, "cp15", arm966e_handle_cp15_command
, COMMAND_EXEC
, "display/modify cp15 register <num> [value]");
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