src/target/arm966e.c

   1 /***************************************************************************
   2  *   Copyright (C) 2005 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Copyright (C) 2008 by Spencer Oliver                                  *
   6  *   spen@spen-soft.co.uk                                                  *
   7  *                                                                         *
   8  *   This program is free software; you can redistribute it and/or modify  *
   9  *   it under the terms of the GNU General Public License as published by  *
  10  *   the Free Software Foundation; either version 2 of the License, or     *
  11  *   (at your option) any later version.                                   *
  12  *                                                                         *
  13  *   This program is distributed in the hope that it will be useful,       *
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  16  *   GNU General Public License for more details.                          *
  17  *                                                                         *
  18  *   You should have received a copy of the GNU General Public License     *
  19  *   along with this program; if not, write to the                         *
  20  *   Free Software Foundation, Inc.,                                       *
  21  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  22  ***************************************************************************/
  23 #ifdef HAVE_CONFIG_H
  24 #include "config.h"
  25 #endif
  26
  27 #include "arm966e.h"
  28 #include "target_type.h"
  29 #include "arm_opcodes.h"
  30
  31
  32 #if 0
  33 #define _DEBUG_INSTRUCTION_EXECUTION_
  34 #endif
  35
  36 int arm966e_init_arch_info(struct target *target, struct arm966e_common *arm966e, struct jtag_tap *tap)
  37 {
  38         struct arm7_9_common *arm7_9 = &arm966e->arm7_9_common;
  39
  40         /* initialize arm7/arm9 specific info (including armv4_5) */
  41         arm9tdmi_init_arch_info(target, arm7_9, tap);
  42
  43         arm966e->common_magic = ARM966E_COMMON_MAGIC;
  44
  45         /* The ARM966E-S implements the ARMv5TE architecture which
  46          * has the BKPT instruction, so we don't have to use a watchpoint comparator
  47          */
  48         arm7_9->arm_bkpt = ARMV5_BKPT(0x0);
  49         arm7_9->thumb_bkpt = ARMV5_T_BKPT(0x0) & 0xffff;
  50
  51         return ERROR_OK;
  52 }
  53
  54 static int arm966e_target_create(struct target *target, Jim_Interp *interp)
  55 {
  56         struct arm966e_common *arm966e = calloc(1,sizeof(struct arm966e_common));
  57
  58         return arm966e_init_arch_info(target, arm966e, target->tap);
  59 }
  60
  61 static int arm966e_verify_pointer(struct command_context *cmd_ctx,
  62                 struct arm966e_common *arm966e)
  63 {
  64         if (arm966e->common_magic != ARM966E_COMMON_MAGIC) {
  65                 command_print(cmd_ctx, "target is not an ARM966");
  66                 return ERROR_TARGET_INVALID;
  67         }
  68         return ERROR_OK;
  69 }
  70
  71 /*
  72  * REVISIT:  The "read_cp15" and "write_cp15" commands could hook up
  73  * to eventual mrc() and mcr() routines ... the reg_addr values being
  74  * constructed (for CP15 only) from Opcode_1, Opcode_2, and CRn values.
  75  * See section 7.3 of the ARM966E-S TRM.
  76  */
  77
  78 static int arm966e_read_cp15(struct target *target, int reg_addr, uint32_t *value)
  79 {
  80         int retval = ERROR_OK;
  81         struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
  82         struct arm_jtag *jtag_info = &arm7_9->jtag_info;
  83         struct scan_field fields[3];
  84         uint8_t reg_addr_buf = reg_addr & 0x3f;
  85         uint8_t nr_w_buf = 0;
  86
  87         jtag_set_end_state(TAP_IDLE);
  88         if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
  89         {
  90                 return retval;
  91         }
  92         arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
  93
  94         fields[0].num_bits = 32;
  95         /* REVISIT: table 7-2 shows that bits 31-31 need to be
  96          * specified for accessing BIST registers ...
  97          */
  98         fields[0].out_value = NULL;
  99         fields[0].in_value = NULL;
 100
 101         fields[1].num_bits = 6;
 102         fields[1].out_value = &reg_addr_buf;
 103         fields[1].in_value = NULL;
 104
 105         fields[2].num_bits = 1;
 106         fields[2].out_value = &nr_w_buf;
 107         fields[2].in_value = NULL;
 108
 109         jtag_add_dr_scan(jtag_info->tap, 3, fields, jtag_get_end_state());
 110
 111         fields[1].in_value = (uint8_t *)value;
 112
 113         jtag_add_dr_scan(jtag_info->tap, 3, fields, jtag_get_end_state());
 114
 115         jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value);
 116
 117
 118 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 119         if ((retval = jtag_execute_queue()) != ERROR_OK)
 120         {
 121                 return retval;
 122         }
 123         LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
 124 #endif
 125
 126         return ERROR_OK;
 127 }
 128
 129 // EXPORTED to str9x (flash)
 130 int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value)
 131 {
 132         int retval = ERROR_OK;
 133         struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 134         struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 135         struct scan_field fields[3];
 136         uint8_t reg_addr_buf = reg_addr & 0x3f;
 137         uint8_t nr_w_buf = 1;
 138         uint8_t value_buf[4];
 139
 140         buf_set_u32(value_buf, 0, 32, value);
 141
 142         jtag_set_end_state(TAP_IDLE);
 143         if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
 144         {
 145                 return retval;
 146         }
 147         arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 148
 149         fields[0].num_bits = 32;
 150         fields[0].out_value = value_buf;
 151         fields[0].in_value = NULL;
 152
 153         fields[1].num_bits = 6;
 154         fields[1].out_value = &reg_addr_buf;
 155         fields[1].in_value = NULL;
 156
 157         fields[2].num_bits = 1;
 158         fields[2].out_value = &nr_w_buf;
 159         fields[2].in_value = NULL;
 160
 161         jtag_add_dr_scan(jtag_info->tap, 3, fields, jtag_get_end_state());
 162
 163 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 164         LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
 165 #endif
 166
 167         return ERROR_OK;
 168 }
 169
 170 COMMAND_HANDLER(arm966e_handle_cp15_command)
 171 {
 172         int retval;
 173         struct target *target = get_current_target(CMD_CTX);
 174         struct arm966e_common *arm966e = target_to_arm966(target);
 175
 176         retval = arm966e_verify_pointer(CMD_CTX, arm966e);
 177         if (retval != ERROR_OK)
 178                 return retval;
 179
 180         if (target->state != TARGET_HALTED)
 181         {
 182                 command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
 183                 return ERROR_OK;
 184         }
 185
 186         /* one or more argument, access a single register (write if second argument is given */
 187         if (CMD_ARGC >= 1)
 188         {
 189                 uint32_t address;
 190                 COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
 191
 192                 if (CMD_ARGC == 1)
 193                 {
 194                         uint32_t value;
 195                         if ((retval = arm966e_read_cp15(target, address, &value)) != ERROR_OK)
 196                         {
 197                                 command_print(CMD_CTX,
 198                                                 "couldn't access reg %" PRIi32,
 199                                                 address);
 200                                 return ERROR_OK;
 201                         }
 202                         if ((retval = jtag_execute_queue()) != ERROR_OK)
 203                         {
 204                                 return retval;
 205                         }
 206
 207                         command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32,
 208                                         address, value);
 209                 }
 210                 else if (CMD_ARGC == 2)
 211                 {
 212                         uint32_t value;
 213                         COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
 214                         if ((retval = arm966e_write_cp15(target, address, value)) != ERROR_OK)
 215                         {
 216                                 command_print(CMD_CTX,
 217                                                 "couldn't access reg %" PRIi32,
 218                                                 address);
 219                                 return ERROR_OK;
 220                         }
 221                         command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32,
 222                                         address, value);
 223                 }
 224         }
 225
 226         return ERROR_OK;
 227 }
 228
 229 static const struct command_registration arm966e_exec_command_handlers[] = {
 230         {
 231                 .name = "cp15",
 232                 .handler = arm966e_handle_cp15_command,
 233                 .mode = COMMAND_EXEC,
 234                 .usage = "regnum [value]",
 235                 .help = "display/modify cp15 register",
 236         },
 237         COMMAND_REGISTRATION_DONE
 238 };
 239
 240 const struct command_registration arm966e_command_handlers[] = {
 241         {
 242                 .chain = arm9tdmi_command_handlers,
 243         },
 244         {
 245                 .name = "arm966e",
 246                 .mode = COMMAND_ANY,
 247                 .help = "arm966e command group",
 248                 .chain = arm966e_exec_command_handlers,
 249         },
 250         COMMAND_REGISTRATION_DONE
 251 };
 252
 253 /** Holds methods for ARM966 targets. */
 254 struct target_type arm966e_target =
 255 {
 256         .name = "arm966e",
 257
 258         .poll = arm7_9_poll,
 259         .arch_state = arm_arch_state,
 260
 261         .target_request_data = arm7_9_target_request_data,
 262
 263         .halt = arm7_9_halt,
 264         .resume = arm7_9_resume,
 265         .step = arm7_9_step,
 266
 267         .assert_reset = arm7_9_assert_reset,
 268         .deassert_reset = arm7_9_deassert_reset,
 269         .soft_reset_halt = arm7_9_soft_reset_halt,
 270
 271         .get_gdb_reg_list = arm_get_gdb_reg_list,
 272
 273         .read_memory = arm7_9_read_memory,
 274         .write_memory = arm7_9_write_memory,
 275         .bulk_write_memory = arm7_9_bulk_write_memory,
 276
 277         .checksum_memory = arm_checksum_memory,
 278         .blank_check_memory = arm_blank_check_memory,
 279
 280         .run_algorithm = armv4_5_run_algorithm,
 281
 282         .add_breakpoint = arm7_9_add_breakpoint,
 283         .remove_breakpoint = arm7_9_remove_breakpoint,
 284         .add_watchpoint = arm7_9_add_watchpoint,
 285         .remove_watchpoint = arm7_9_remove_watchpoint,
 286
 287         .commands = arm966e_command_handlers,
 288         .target_create = arm966e_target_create,
 289         .init_target = arm9tdmi_init_target,
 290         .examine = arm7_9_examine,
 291         .check_reset = arm7_9_check_reset,
 292 };