Remove FSF address from GPL notices
[openocd.git] / src / target / arm966e.c
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
7 * *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
12 * *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
17 * *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
20 ***************************************************************************/
21
22 #ifdef HAVE_CONFIG_H
23 #include "config.h"
24 #endif
25
26 #include "arm966e.h"
27 #include "target_type.h"
28 #include "arm_opcodes.h"
29
30 #if 0
31 #define _DEBUG_INSTRUCTION_EXECUTION_
32 #endif
33
34 int arm966e_init_arch_info(struct target *target, struct arm966e_common *arm966e, struct jtag_tap *tap)
35 {
36 struct arm7_9_common *arm7_9 = &arm966e->arm7_9_common;
37
38 /* initialize arm7/arm9 specific info (including armv4_5) */
39 arm9tdmi_init_arch_info(target, arm7_9, tap);
40
41 arm966e->common_magic = ARM966E_COMMON_MAGIC;
42
43 /* The ARM966E-S implements the ARMv5TE architecture which
44 * has the BKPT instruction, so we don't have to use a watchpoint comparator
45 */
46 arm7_9->arm_bkpt = ARMV5_BKPT(0x0);
47 arm7_9->thumb_bkpt = ARMV5_T_BKPT(0x0) & 0xffff;
48
49 return ERROR_OK;
50 }
51
52 static int arm966e_target_create(struct target *target, Jim_Interp *interp)
53 {
54 struct arm966e_common *arm966e = calloc(1, sizeof(struct arm966e_common));
55
56 return arm966e_init_arch_info(target, arm966e, target->tap);
57 }
58
59 static int arm966e_verify_pointer(struct command_context *cmd_ctx,
60 struct arm966e_common *arm966e)
61 {
62 if (arm966e->common_magic != ARM966E_COMMON_MAGIC) {
63 command_print(cmd_ctx, "target is not an ARM966");
64 return ERROR_TARGET_INVALID;
65 }
66 return ERROR_OK;
67 }
68
69 /*
70 * REVISIT: The "read_cp15" and "write_cp15" commands could hook up
71 * to eventual mrc() and mcr() routines ... the reg_addr values being
72 * constructed (for CP15 only) from Opcode_1, Opcode_2, and CRn values.
73 * See section 7.3 of the ARM966E-S TRM.
74 */
75
76 static int arm966e_read_cp15(struct target *target, int reg_addr, uint32_t *value)
77 {
78 int retval = ERROR_OK;
79 struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
80 struct arm_jtag *jtag_info = &arm7_9->jtag_info;
81 struct scan_field fields[3];
82 uint8_t reg_addr_buf = reg_addr & 0x3f;
83 uint8_t nr_w_buf = 0;
84
85 retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
86 if (retval != ERROR_OK)
87 return retval;
88 retval = arm_jtag_set_instr(jtag_info->tap, jtag_info->intest_instr, NULL, TAP_IDLE);
89 if (retval != ERROR_OK)
90 return retval;
91
92 fields[0].num_bits = 32;
93 /* REVISIT: table 7-2 shows that bits 31-31 need to be
94 * specified for accessing BIST registers ...
95 */
96 fields[0].out_value = NULL;
97 fields[0].in_value = NULL;
98
99 fields[1].num_bits = 6;
100 fields[1].out_value = &reg_addr_buf;
101 fields[1].in_value = NULL;
102
103 fields[2].num_bits = 1;
104 fields[2].out_value = &nr_w_buf;
105 fields[2].in_value = NULL;
106
107 jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
108
109 fields[1].in_value = (uint8_t *)value;
110
111 jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
112
113 jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value);
114
115
116 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
117 retval = jtag_execute_queue();
118 if (retval != ERROR_OK)
119 return retval;
120 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
121 #endif
122
123 return ERROR_OK;
124 }
125
126 /* EXPORTED to str9x (flash) */
127 int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value)
128 {
129 int retval = ERROR_OK;
130 struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
131 struct arm_jtag *jtag_info = &arm7_9->jtag_info;
132 struct scan_field fields[3];
133 uint8_t reg_addr_buf = reg_addr & 0x3f;
134 uint8_t nr_w_buf = 1;
135 uint8_t value_buf[4];
136
137 buf_set_u32(value_buf, 0, 32, value);
138
139 retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
140 if (retval != ERROR_OK)
141 return retval;
142 retval = arm_jtag_set_instr(jtag_info->tap, jtag_info->intest_instr, NULL, TAP_IDLE);
143 if (retval != ERROR_OK)
144 return retval;
145
146 fields[0].num_bits = 32;
147 fields[0].out_value = value_buf;
148 fields[0].in_value = NULL;
149
150 fields[1].num_bits = 6;
151 fields[1].out_value = &reg_addr_buf;
152 fields[1].in_value = NULL;
153
154 fields[2].num_bits = 1;
155 fields[2].out_value = &nr_w_buf;
156 fields[2].in_value = NULL;
157
158 jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
159
160 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
161 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
162 #endif
163
164 return ERROR_OK;
165 }
166
167 COMMAND_HANDLER(arm966e_handle_cp15_command)
168 {
169 int retval;
170 struct target *target = get_current_target(CMD_CTX);
171 struct arm966e_common *arm966e = target_to_arm966(target);
172
173 retval = arm966e_verify_pointer(CMD_CTX, arm966e);
174 if (retval != ERROR_OK)
175 return retval;
176
177 if (target->state != TARGET_HALTED) {
178 command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
179 return ERROR_OK;
180 }
181
182 /* one or more argument, access a single register (write if second argument is given */
183 if (CMD_ARGC >= 1) {
184 uint32_t address;
185 COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
186
187 if (CMD_ARGC == 1) {
188 uint32_t value;
189 retval = arm966e_read_cp15(target, address, &value);
190 if (retval != ERROR_OK) {
191 command_print(CMD_CTX,
192 "couldn't access reg %" PRIi32,
193 address);
194 return ERROR_OK;
195 }
196 retval = jtag_execute_queue();
197 if (retval != ERROR_OK)
198 return retval;
199
200 command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32,
201 address, value);
202 } else if (CMD_ARGC == 2) {
203 uint32_t value;
204 COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
205 retval = arm966e_write_cp15(target, address, value);
206 if (retval != ERROR_OK) {
207 command_print(CMD_CTX,
208 "couldn't access reg %" PRIi32,
209 address);
210 return ERROR_OK;
211 }
212 command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32,
213 address, value);
214 }
215 }
216
217 return ERROR_OK;
218 }
219
220 static const struct command_registration arm966e_exec_command_handlers[] = {
221 {
222 .name = "cp15",
223 .handler = arm966e_handle_cp15_command,
224 .mode = COMMAND_EXEC,
225 .usage = "regnum [value]",
226 .help = "display/modify cp15 register",
227 },
228 COMMAND_REGISTRATION_DONE
229 };
230
231 const struct command_registration arm966e_command_handlers[] = {
232 {
233 .chain = arm9tdmi_command_handlers,
234 },
235 {
236 .name = "arm966e",
237 .mode = COMMAND_ANY,
238 .help = "arm966e command group",
239 .usage = "",
240 .chain = arm966e_exec_command_handlers,
241 },
242 COMMAND_REGISTRATION_DONE
243 };
244
245 /** Holds methods for ARM966 targets. */
246 struct target_type arm966e_target = {
247 .name = "arm966e",
248
249 .poll = arm7_9_poll,
250 .arch_state = arm_arch_state,
251
252 .target_request_data = arm7_9_target_request_data,
253
254 .halt = arm7_9_halt,
255 .resume = arm7_9_resume,
256 .step = arm7_9_step,
257
258 .assert_reset = arm7_9_assert_reset,
259 .deassert_reset = arm7_9_deassert_reset,
260 .soft_reset_halt = arm7_9_soft_reset_halt,
261
262 .get_gdb_reg_list = arm_get_gdb_reg_list,
263
264 .read_memory = arm7_9_read_memory,
265 .write_memory = arm7_9_write_memory_opt,
266
267 .checksum_memory = arm_checksum_memory,
268 .blank_check_memory = arm_blank_check_memory,
269
270 .run_algorithm = armv4_5_run_algorithm,
271
272 .add_breakpoint = arm7_9_add_breakpoint,
273 .remove_breakpoint = arm7_9_remove_breakpoint,
274 .add_watchpoint = arm7_9_add_watchpoint,
275 .remove_watchpoint = arm7_9_remove_watchpoint,
276
277 .commands = arm966e_command_handlers,
278 .target_create = arm966e_target_create,
279 .init_target = arm9tdmi_init_target,
280 .examine = arm7_9_examine,
281 .check_reset = arm7_9_check_reset,
282 };