1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
36 * See Zylin web pages or contact Zylin for more information.
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
48 #include <target/embeddedice.h>
49 #include <jtag/minidriver.h>
50 #include <jtag/interface.h>
52 #include <helper/time_support.h>
54 #include <netinet/tcp.h>
57 #include "zy1000_version.h"
59 #include <cyg/hal/hal_io.h> // low level i/o
60 #include <cyg/hal/hal_diag.h>
62 #ifdef CYGPKG_HAL_NIOS2
63 #include <cyg/hal/io.h>
64 #include <cyg/firmwareutil/firmwareutil.h>
65 #define ZYLIN_KHZ 60000
67 #define ZYLIN_KHZ 64000
70 #define ZYLIN_VERSION GIT_ZY1000_VERSION
71 #define ZYLIN_DATE __DATE__
72 #define ZYLIN_TIME __TIME__
73 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
74 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
77 /* Assume we're connecting to a revc w/60MHz clock. */
78 #define ZYLIN_KHZ 60000
82 /* The software needs to check if it's in RCLK mode or not */
83 static bool zy1000_rclk
= false;
85 static int zy1000_khz(int khz
, int *jtag_speed
)
94 /* Round speed up to nearest divisor.
97 * (64000 + 15999) / 16000 = 4
104 * (64000 + 15998) / 15999 = 5
111 speed
= (ZYLIN_KHZ
+ (khz
-1)) / khz
;
112 speed
= (speed
+ 1 ) / 2;
116 /* maximum dividend */
124 static int zy1000_speed_div(int speed
, int *khz
)
132 *khz
= ZYLIN_KHZ
/ speed
;
138 static bool readPowerDropout(void)
141 // sample and clear power dropout
142 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x80);
143 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x10, state
);
145 powerDropout
= (state
& 0x80) != 0;
150 static bool readSRST(void)
153 // sample and clear SRST sensing
154 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x00000040);
155 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x10, state
);
157 srstAsserted
= (state
& 0x40) != 0;
161 static int zy1000_srst_asserted(int *srst_asserted
)
163 *srst_asserted
= readSRST();
167 static int zy1000_power_dropout(int *dropout
)
169 *dropout
= readPowerDropout();
173 void zy1000_reset(int trst
, int srst
)
175 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst
, srst
);
177 /* flush the JTAG FIFO. Not flushing the queue before messing with
178 * reset has such interesting bugs as causing hard to reproduce
179 * RCLK bugs as RCLK will stop responding when TRST is asserted
185 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x00000001);
189 /* Danger!!! if clk != 0 when in
190 * idle in TAP_IDLE, reset halt on str912 will fail.
192 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x00000001);
197 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x00000002);
202 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x00000002);
205 if (trst
||(srst
&& (jtag_get_reset_config() & RESET_SRST_PULLS_TRST
)))
207 /* we're now in the RESET state until trst is deasserted */
208 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, TAP_RESET
);
211 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
212 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x400);
215 /* wait for srst to float back up */
216 if ((!srst
&& ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST
) == 0))||
217 (!srst
&& !trst
&& (jtag_get_reset_config() & RESET_TRST_PULLS_SRST
)))
224 // We don't want to sense our own reset, so we clear here.
225 // There is of course a timing hole where we could loose
231 LOG_USER("SRST took %dms to deassert", (int)total
);
239 start
= timeval_ms();
242 total
= timeval_ms() - start
;
248 LOG_ERROR("SRST took too long to deassert: %dms", (int)total
);
256 int zy1000_speed(int speed
)
258 /* flush JTAG master FIFO before setting speed */
266 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x100);
268 LOG_DEBUG("jtag_speed using RCLK");
272 if (speed
> 8190 || speed
< 2)
274 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. With divisor is %dkHz / even values between 8190-2, i.e. min %dHz, max %dMHz",
275 ZYLIN_KHZ
, (ZYLIN_KHZ
* 1000) / 8190, ZYLIN_KHZ
/ (2 * 1000));
276 return ERROR_INVALID_ARGUMENTS
;
281 zy1000_speed_div(speed
, &khz
);
282 LOG_USER("jtag_speed %d => JTAG clk=%d kHz", speed
, khz
);
283 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x100);
284 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x1c, speed
);
289 static bool savePower
;
292 static void setPower(bool power
)
297 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x8);
300 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x8);
304 COMMAND_HANDLER(handle_power_command
)
310 COMMAND_PARSE_ON_OFF(CMD_ARGV
[0], enable
);
315 LOG_INFO("Target power %s", savePower
? "on" : "off");
318 return ERROR_INVALID_ARGUMENTS
;
324 #if !BUILD_ZY1000_MASTER
325 static char *tcp_server
= "notspecified";
326 static int jim_zy1000_server(Jim_Interp
*interp
, int argc
, Jim_Obj
*const *argv
)
331 tcp_server
= strdup(Jim_GetString(argv
[1], NULL
));
338 /* Give TELNET a way to find out what version this is */
339 static int jim_zy1000_version(Jim_Interp
*interp
, int argc
, Jim_Obj
*const *argv
)
341 if ((argc
< 1) || (argc
> 3))
343 const char *version_str
= NULL
;
347 version_str
= ZYLIN_OPENOCD_VERSION
;
350 const char *str
= Jim_GetString(argv
[1], NULL
);
351 const char *str2
= NULL
;
353 str2
= Jim_GetString(argv
[2], NULL
);
354 if (strcmp("openocd", str
) == 0)
356 version_str
= ZYLIN_OPENOCD
;
358 else if (strcmp("zy1000", str
) == 0)
360 version_str
= ZYLIN_VERSION
;
362 else if (strcmp("date", str
) == 0)
364 version_str
= ZYLIN_DATE
;
366 else if (strcmp("time", str
) == 0)
368 version_str
= ZYLIN_TIME
;
370 else if (strcmp("pcb", str
) == 0)
372 #ifdef CYGPKG_HAL_NIOS2
378 #ifdef CYGPKG_HAL_NIOS2
379 else if (strcmp("fpga", str
) == 0)
382 /* return a list of 32 bit integers to describe the expected
385 static char *fpga_id
= "0x12345678 0x12345678 0x12345678 0x12345678";
386 uint32_t id
, timestamp
;
387 HAL_READ_UINT32(SYSID_BASE
, id
);
388 HAL_READ_UINT32(SYSID_BASE
+4, timestamp
);
389 sprintf(fpga_id
, "0x%08x 0x%08x 0x%08x 0x%08x", id
, timestamp
, SYSID_ID
, SYSID_TIMESTAMP
);
390 version_str
= fpga_id
;
391 if ((argc
>2) && (strcmp("time", str2
) == 0))
393 time_t last_mod
= timestamp
;
394 char * t
= ctime (&last_mod
) ;
407 Jim_SetResult(interp
, Jim_NewStringObj(interp
, version_str
, -1));
413 #ifdef CYGPKG_HAL_NIOS2
419 struct cyg_upgrade_info
*upgraded_file
;
422 static void report_info(void *data
, const char * format
, va_list args
)
424 char *s
= alloc_vprintf(format
, args
);
429 struct cyg_upgrade_info firmware_info
=
431 (uint8_t *)0x84000000,
437 "ZylinNiosFirmware\n",
441 static int jim_zy1000_writefirmware(Jim_Interp
*interp
, int argc
, Jim_Obj
*const *argv
)
447 const char *str
= Jim_GetString(argv
[1], &length
);
451 if ((tmpFile
= open(firmware_info
.file
, O_RDWR
| O_CREAT
| O_TRUNC
)) <= 0)
456 success
= write(tmpFile
, str
, length
) == length
;
461 if (!cyg_firmware_upgrade(NULL
, firmware_info
))
469 zylinjtag_Jim_Command_powerstatus(Jim_Interp
*interp
,
471 Jim_Obj
* const *argv
)
475 Jim_WrongNumArgs(interp
, 1, argv
, "powerstatus");
479 bool dropout
= readPowerDropout();
481 Jim_SetResult(interp
, Jim_NewIntObj(interp
, dropout
));
488 int zy1000_quit(void)
496 int interface_jtag_execute_queue(void)
502 /* We must make sure to write data read back to memory location before we return
505 zy1000_flush_readqueue();
507 /* and handle any callbacks... */
508 zy1000_flush_callbackqueue();
512 /* Only check for errors when using RCLK to speed up
515 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x10, empty
);
516 /* clear JTAG error register */
517 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x400);
519 if ((empty
&0x400) != 0)
521 LOG_WARNING("RCLK timeout");
522 /* the error is informative only as we don't want to break the firmware if there
523 * is a false positive.
525 // return ERROR_FAIL;
534 static void writeShiftValue(uint8_t *data
, int bits
);
536 // here we shuffle N bits out/in
537 static __inline
void scanBits(const uint8_t *out_value
, uint8_t *in_value
, int num_bits
, bool pause_now
, tap_state_t shiftState
, tap_state_t end_state
)
539 tap_state_t pause_state
= shiftState
;
540 for (int j
= 0; j
< num_bits
; j
+= 32)
542 int k
= num_bits
- j
;
546 /* we have more to shift out */
547 } else if (pause_now
)
549 /* this was the last to shift out this time */
550 pause_state
= end_state
;
553 // we have (num_bits + 7)/8 bytes of bits to toggle out.
554 // bits are pushed out LSB to MSB
557 if (out_value
!= NULL
)
559 for (int l
= 0; l
< k
; l
+= 8)
561 value
|=out_value
[(j
+ l
)/8]<<l
;
564 /* mask away unused bits for easier debugging */
567 value
&=~(((uint32_t)0xffffffff) << k
);
570 /* Shifting by >= 32 is not defined by the C standard
571 * and will in fact shift by &0x1f bits on nios */
574 shiftValueInner(shiftState
, pause_state
, k
, value
);
576 if (in_value
!= NULL
)
578 writeShiftValue(in_value
+ (j
/8), k
);
583 static __inline
void scanFields(int num_fields
, const struct scan_field
*fields
, tap_state_t shiftState
, tap_state_t end_state
)
585 for (int i
= 0; i
< num_fields
; i
++)
587 scanBits(fields
[i
].out_value
,
596 int interface_jtag_add_ir_scan(struct jtag_tap
*active
, const struct scan_field
*fields
, tap_state_t state
)
599 struct jtag_tap
*tap
, *nextTap
;
600 tap_state_t pause_state
= TAP_IRSHIFT
;
602 for (tap
= jtag_tap_next_enabled(NULL
); tap
!= NULL
; tap
= nextTap
)
604 nextTap
= jtag_tap_next_enabled(tap
);
609 scan_size
= tap
->ir_length
;
611 /* search the list */
614 scanFields(1, fields
, TAP_IRSHIFT
, pause_state
);
615 /* update device information */
616 buf_cpy(fields
[0].out_value
, tap
->cur_instr
, scan_size
);
621 /* if a device isn't listed, set it to BYPASS */
622 assert(scan_size
<= 32);
623 shiftValueInner(TAP_IRSHIFT
, pause_state
, scan_size
, 0xffffffff);
636 int interface_jtag_add_plain_ir_scan(int num_bits
, const uint8_t *out_bits
, uint8_t *in_bits
, tap_state_t state
)
638 scanBits(out_bits
, in_bits
, num_bits
, true, TAP_IRSHIFT
, state
);
642 int interface_jtag_add_dr_scan(struct jtag_tap
*active
, int num_fields
, const struct scan_field
*fields
, tap_state_t state
)
644 struct jtag_tap
*tap
, *nextTap
;
645 tap_state_t pause_state
= TAP_DRSHIFT
;
646 for (tap
= jtag_tap_next_enabled(NULL
); tap
!= NULL
; tap
= nextTap
)
648 nextTap
= jtag_tap_next_enabled(tap
);
654 /* Find a range of fields to write to this tap */
657 assert(!tap
->bypass
);
659 scanFields(num_fields
, fields
, TAP_DRSHIFT
, pause_state
);
662 /* Shift out a 0 for disabled tap's */
664 shiftValueInner(TAP_DRSHIFT
, pause_state
, 1, 0);
670 int interface_jtag_add_plain_dr_scan(int num_bits
, const uint8_t *out_bits
, uint8_t *in_bits
, tap_state_t state
)
672 scanBits(out_bits
, in_bits
, num_bits
, true, TAP_DRSHIFT
, state
);
676 int interface_jtag_add_tlr()
678 setCurrentState(TAP_RESET
);
683 int interface_jtag_add_reset(int req_trst
, int req_srst
)
685 zy1000_reset(req_trst
, req_srst
);
689 static int zy1000_jtag_add_clocks(int num_cycles
, tap_state_t state
, tap_state_t clockstate
)
691 /* num_cycles can be 0 */
692 setCurrentState(clockstate
);
694 /* execute num_cycles, 32 at the time. */
696 for (i
= 0; i
< num_cycles
; i
+= 32)
700 if (num_cycles
-i
< num
)
704 shiftValueInner(clockstate
, clockstate
, num
, 0);
708 /* finish in end_state */
709 setCurrentState(state
);
711 tap_state_t t
= TAP_IDLE
;
712 /* test manual drive code on any target */
714 uint8_t tms_scan
= tap_get_tms_path(t
, state
);
715 int tms_count
= tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
717 for (i
= 0; i
< tms_count
; i
++)
719 tms
= (tms_scan
>> i
) & 1;
721 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, tms
);
724 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, state
);
730 int interface_jtag_add_runtest(int num_cycles
, tap_state_t state
)
732 return zy1000_jtag_add_clocks(num_cycles
, state
, TAP_IDLE
);
735 int interface_jtag_add_clocks(int num_cycles
)
737 return zy1000_jtag_add_clocks(num_cycles
, cmd_queue_cur_state
, cmd_queue_cur_state
);
740 int interface_add_tms_seq(unsigned num_bits
, const uint8_t *seq
, enum tap_state state
)
742 /*wait for the fifo to be empty*/
745 for (unsigned i
= 0; i
< num_bits
; i
++)
749 if (((seq
[i
/8] >> (i
% 8)) & 1) == 0)
759 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, tms
);
763 if (state
!= TAP_INVALID
)
765 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, state
);
768 /* this would be normal if we are switching to SWD mode */
773 int interface_jtag_add_pathmove(int num_states
, const tap_state_t
*path
)
780 tap_state_t cur_state
= cmd_queue_cur_state
;
783 memset(seq
, 0, sizeof(seq
));
784 assert(num_states
< (int)((sizeof(seq
) * 8)));
788 if (tap_state_transition(cur_state
, false) == path
[state_count
])
792 else if (tap_state_transition(cur_state
, true) == path
[state_count
])
798 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state
), tap_state_name(path
[state_count
]));
802 seq
[state_count
/8] = seq
[state_count
/8] | (tms
<< (state_count
% 8));
804 cur_state
= path
[state_count
];
809 return interface_add_tms_seq(state_count
, seq
, cur_state
);
812 static void jtag_pre_post_bits(struct jtag_tap
*tap
, int *pre
, int *post
)
814 /* bypass bits before and after */
819 struct jtag_tap
*cur_tap
, *nextTap
;
820 for (cur_tap
= jtag_tap_next_enabled(NULL
); cur_tap
!= NULL
; cur_tap
= nextTap
)
822 nextTap
= jtag_tap_next_enabled(cur_tap
);
842 static const int embeddedice_num_bits[] = {32, 6};
846 values[1] = (1 << 5) | reg_addr;
850 embeddedice_num_bits,
855 void embeddedice_write_dcc(struct jtag_tap
*tap
, int reg_addr
, uint8_t *buffer
, int little
, int count
)
859 for (i
= 0; i
< count
; i
++)
861 embeddedice_write_reg_inner(tap
, reg_addr
, fast_target_buffer_get_u32(buffer
, little
));
867 jtag_pre_post_bits(tap
, &pre_bits
, &post_bits
);
869 if ((pre_bits
> 32) || (post_bits
+ 6 > 32))
872 for (i
= 0; i
< count
; i
++)
874 embeddedice_write_reg_inner(tap
, reg_addr
, fast_target_buffer_get_u32(buffer
, little
));
880 for (i
= 0; i
< count
; i
++)
882 /* Fewer pokes means we get to use the FIFO more efficiently */
883 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, pre_bits
, 0);
884 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, 32, fast_target_buffer_get_u32(buffer
, little
));
885 /* Danger! here we need to exit into the TAP_IDLE state to make
886 * DCC pick up this value.
888 shiftValueInner(TAP_DRSHIFT
, TAP_IDLE
, 6 + post_bits
, (reg_addr
| (1 << 5)));
897 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap
* tap
, uint32_t opcode
, uint32_t * data
, size_t count
)
899 /* bypass bits before and after */
902 jtag_pre_post_bits(tap
, &pre_bits
, &post_bits
);
905 if ((pre_bits
> 32) || (post_bits
> 32))
907 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap
*, uint32_t, uint32_t *, size_t);
908 return arm11_run_instr_data_to_core_noack_inner_default(tap
, opcode
, data
, count
);
911 static const int bits
[] = {32, 2};
912 uint32_t values
[] = {0, 0};
914 /* FIX!!!!!! the target_write_memory() API started this nasty problem
915 * with unaligned uint32_t * pointers... */
916 const uint8_t *t
= (const uint8_t *)data
;
921 /* Danger! This code doesn't update cmd_queue_cur_state, so
922 * invoking jtag_add_pathmove() before jtag_add_dr_out() after
923 * this loop would fail!
925 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, pre_bits
, 0);
933 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, 32, value
);
935 shiftValueInner(TAP_DRSHIFT
, TAP_DRPAUSE
, post_bits
, 0);
937 /* copy & paste from arm11_dbgtap.c */
938 //TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
939 /* KLUDGE! we have to flush the fifo or the Nios CPU locks up.
940 * This is probably a bug in the Avalon bus(cross clocking bridge?)
941 * or in the jtag registers module.
944 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 1);
945 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 1);
946 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
947 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
948 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
949 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 1);
950 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
951 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
952 /* we don't have to wait for the queue to empty here */
953 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, TAP_DRSHIFT
);
956 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay
[] =
958 TAP_DREXIT2
, TAP_DRUPDATE
, TAP_IDLE
, TAP_IDLE
, TAP_IDLE
, TAP_DRSELECT
, TAP_DRCAPTURE
, TAP_DRSHIFT
962 values
[0] |= (*t
++<<8);
963 values
[0] |= (*t
++<<16);
964 values
[0] |= (*t
++<<24);
972 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay
),
973 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay
);
978 values
[0] |= (*t
++<<8);
979 values
[0] |= (*t
++<<16);
980 values
[0] |= (*t
++<<24);
982 /* This will happen on the last iteration updating cmd_queue_cur_state
983 * so we don't have to track it during the common code path
991 return jtag_execute_queue();
996 static const struct command_registration zy1000_commands
[] = {
999 .handler
= handle_power_command
,
1000 .mode
= COMMAND_ANY
,
1001 .help
= "Turn power switch to target on/off. "
1002 "With no arguments, prints status.",
1003 .usage
= "('on'|'off)",
1005 #if BUILD_ZY1000_MASTER
1008 .name
= "zy1000_version",
1009 .mode
= COMMAND_ANY
,
1010 .jim_handler
= jim_zy1000_version
,
1011 .help
= "Print version info for zy1000.",
1012 .usage
= "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
1017 .name
= "zy1000_server",
1018 .mode
= COMMAND_ANY
,
1019 .jim_handler
= jim_zy1000_server
,
1020 .help
= "Tcpip address for ZY1000 server.",
1025 .name
= "powerstatus",
1026 .mode
= COMMAND_ANY
,
1027 .jim_handler
= zylinjtag_Jim_Command_powerstatus
,
1028 .help
= "Returns power status of target",
1030 #ifdef CYGPKG_HAL_NIOS2
1032 .name
= "updatezy1000firmware",
1033 .mode
= COMMAND_ANY
,
1034 .jim_handler
= jim_zy1000_writefirmware
,
1035 .help
= "writes firmware to flash",
1036 /* .usage = "some_string", */
1039 COMMAND_REGISTRATION_DONE
1043 #if !BUILD_ZY1000_MASTER || BUILD_ECOSBOARD
1044 static int tcp_ip
= -1;
1046 /* Write large packets if we can */
1047 static size_t out_pos
;
1048 static uint8_t out_buffer
[16384];
1049 static size_t in_pos
;
1050 static size_t in_write
;
1051 static uint8_t in_buffer
[16384];
1053 static bool flush_writes(void)
1055 bool ok
= (write(tcp_ip
, out_buffer
, out_pos
) == (int)out_pos
);
1060 static bool writeLong(uint32_t l
)
1063 for (i
= 0; i
< 4; i
++)
1065 uint8_t c
= (l
>> (i
*8))&0xff;
1066 out_buffer
[out_pos
++] = c
;
1067 if (out_pos
>= sizeof(out_buffer
))
1069 if (!flush_writes())
1078 static bool readLong(uint32_t *out_data
)
1082 if (!flush_writes())
1090 for (i
= 0; i
< 4; i
++)
1093 if (in_pos
== in_write
)
1097 t
= read(tcp_ip
, in_buffer
, sizeof(in_buffer
));
1102 in_write
= (size_t) t
;
1105 c
= in_buffer
[in_pos
++];
1107 data
|= (c
<< (i
*8));
1116 ZY1000_CMD_POKE
= 0x0,
1117 ZY1000_CMD_PEEK
= 0x8,
1118 ZY1000_CMD_SLEEP
= 0x1,
1119 ZY1000_CMD_WAITIDLE
= 2
1123 #if !BUILD_ZY1000_MASTER
1125 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
1126 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
1128 /* We initialize this late since we need to know the server address
1131 static void tcpip_open(void)
1136 struct sockaddr_in echoServAddr
; /* Echo server address */
1138 /* Create a reliable, stream socket using TCP */
1139 if ((tcp_ip
= socket(PF_INET
, SOCK_STREAM
, IPPROTO_TCP
)) < 0)
1141 fprintf(stderr
, "Failed to connect to zy1000 server\n");
1145 /* Construct the server address structure */
1146 memset(&echoServAddr
, 0, sizeof(echoServAddr
)); /* Zero out structure */
1147 echoServAddr
.sin_family
= AF_INET
; /* Internet address family */
1148 echoServAddr
.sin_addr
.s_addr
= inet_addr(tcp_server
); /* Server IP address */
1149 echoServAddr
.sin_port
= htons(7777); /* Server port */
1151 /* Establish the connection to the echo server */
1152 if (connect(tcp_ip
, (struct sockaddr
*) &echoServAddr
, sizeof(echoServAddr
)) < 0)
1154 fprintf(stderr
, "Failed to connect to zy1000 server\n");
1159 setsockopt(tcp_ip
, /* socket affected */
1160 IPPROTO_TCP
, /* set option at TCP level */
1161 TCP_NODELAY
, /* name of option */
1162 (char *)&flag
, /* the cast is historical cruft */
1163 sizeof(int)); /* length of option value */
1169 void zy1000_tcpout(uint32_t address
, uint32_t data
)
1172 if (!writeLong((ZY1000_CMD_POKE
<< 24) | address
)||
1175 fprintf(stderr
, "Could not write to zy1000 server\n");
1180 /* By sending the wait to the server, we avoid a readback
1181 * of status. Radically improves performance for this operation
1182 * with long ping times.
1187 if (!writeLong((ZY1000_CMD_WAITIDLE
<< 24)))
1189 fprintf(stderr
, "Could not write to zy1000 server\n");
1194 uint32_t zy1000_tcpin(uint32_t address
)
1198 zy1000_flush_readqueue();
1201 if (!writeLong((ZY1000_CMD_PEEK
<< 24) | address
)||
1204 fprintf(stderr
, "Could not read from zy1000 server\n");
1210 int interface_jtag_add_sleep(uint32_t us
)
1213 if (!writeLong((ZY1000_CMD_SLEEP
<< 24))||
1216 fprintf(stderr
, "Could not read from zy1000 server\n");
1222 /* queue a readback */
1223 #define readqueue_size 16384
1228 } readqueue
[readqueue_size
];
1230 static int readqueue_pos
= 0;
1232 /* flush the readqueue, this means reading any data that
1233 * we're expecting and store them into the final position
1235 void zy1000_flush_readqueue(void)
1237 if (readqueue_pos
== 0)
1239 /* simply debugging by allowing easy breakpoints when there
1240 * is something to do. */
1245 for (i
= 0; i
< readqueue_pos
; i
++)
1248 if (!readLong(&value
))
1250 fprintf(stderr
, "Could not read from zy1000 server\n");
1254 uint8_t *in_value
= readqueue
[i
].dest
;
1255 int k
= readqueue
[i
].bits
;
1257 // we're shifting in data to MSB, shift data to be aligned for returning the value
1260 for (int l
= 0; l
< k
; l
+= 8)
1262 in_value
[l
/8]=(value
>> l
)&0xff;
1268 /* By queuing the callback's we avoid flushing the
1269 read queue until jtag_execute_queue(). This can
1270 reduce latency dramatically for cases where
1271 callbacks are used extensively.
1273 #define callbackqueue_size 128
1274 static struct callbackentry
1276 jtag_callback_t callback
;
1277 jtag_callback_data_t data0
;
1278 jtag_callback_data_t data1
;
1279 jtag_callback_data_t data2
;
1280 jtag_callback_data_t data3
;
1281 } callbackqueue
[callbackqueue_size
];
1283 static int callbackqueue_pos
= 0;
1285 void zy1000_jtag_add_callback4(jtag_callback_t callback
, jtag_callback_data_t data0
, jtag_callback_data_t data1
, jtag_callback_data_t data2
, jtag_callback_data_t data3
)
1287 if (callbackqueue_pos
>= callbackqueue_size
)
1289 zy1000_flush_callbackqueue();
1292 callbackqueue
[callbackqueue_pos
].callback
= callback
;
1293 callbackqueue
[callbackqueue_pos
].data0
= data0
;
1294 callbackqueue
[callbackqueue_pos
].data1
= data1
;
1295 callbackqueue
[callbackqueue_pos
].data2
= data2
;
1296 callbackqueue
[callbackqueue_pos
].data3
= data3
;
1297 callbackqueue_pos
++;
1300 static int zy1000_jtag_convert_to_callback4(jtag_callback_data_t data0
, jtag_callback_data_t data1
, jtag_callback_data_t data2
, jtag_callback_data_t data3
)
1302 ((jtag_callback1_t
)data1
)(data0
);
1306 void zy1000_jtag_add_callback(jtag_callback1_t callback
, jtag_callback_data_t data0
)
1308 zy1000_jtag_add_callback4(zy1000_jtag_convert_to_callback4
, data0
, (jtag_callback_data_t
)callback
, 0, 0);
1311 void zy1000_flush_callbackqueue(void)
1313 /* we have to flush the read queue so we have access to
1314 the data the callbacks will use
1316 zy1000_flush_readqueue();
1318 for (i
= 0; i
< callbackqueue_pos
; i
++)
1320 struct callbackentry
*entry
= &callbackqueue
[i
];
1321 jtag_set_error(entry
->callback(entry
->data0
, entry
->data1
, entry
->data2
, entry
->data3
));
1323 callbackqueue_pos
= 0;
1326 static void writeShiftValue(uint8_t *data
, int bits
)
1330 if (!writeLong((ZY1000_CMD_PEEK
<< 24) | (ZY1000_JTAG_BASE
+ 0xc)))
1332 fprintf(stderr
, "Could not read from zy1000 server\n");
1336 if (readqueue_pos
>= readqueue_size
)
1338 zy1000_flush_readqueue();
1341 readqueue
[readqueue_pos
].dest
= data
;
1342 readqueue
[readqueue_pos
].bits
= bits
;
1348 static void writeShiftValue(uint8_t *data
, int bits
)
1352 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0xc, value
);
1353 VERBOSE(LOG_INFO("getShiftValue %08x", value
));
1355 // data in, LSB to MSB
1356 // we're shifting in data to MSB, shift data to be aligned for returning the value
1357 value
>>= 32 - bits
;
1359 for (int l
= 0; l
< bits
; l
+= 8)
1361 data
[l
/8]=(value
>> l
)&0xff;
1368 static char tcpip_stack
[2048];
1369 static cyg_thread tcpip_thread_object
;
1370 static cyg_handle_t tcpip_thread_handle
;
1372 static char watchdog_stack
[2048];
1373 static cyg_thread watchdog_thread_object
;
1374 static cyg_handle_t watchdog_thread_handle
;
1376 /* Infinite loop peeking & poking */
1377 static void tcpipserver(void)
1382 if (!readLong(&address
))
1384 enum ZY1000_CMD c
= (address
>> 24) & 0xff;
1385 address
&= 0xffffff;
1388 case ZY1000_CMD_POKE
:
1391 if (!readLong(&data
))
1393 address
&= ~0x80000000;
1394 ZY1000_POKE(address
+ ZY1000_JTAG_BASE
, data
);
1397 case ZY1000_CMD_PEEK
:
1400 ZY1000_PEEK(address
+ ZY1000_JTAG_BASE
, data
);
1401 if (!writeLong(data
))
1405 case ZY1000_CMD_SLEEP
:
1408 if (!readLong(&data
))
1413 case ZY1000_CMD_WAITIDLE
:
1425 static void tcpip_server(cyg_addrword_t data
)
1427 int so_reuseaddr_option
= 1;
1430 if ((fd
= socket(AF_INET
, SOCK_STREAM
, 0)) == -1)
1432 LOG_ERROR("error creating socket: %s", strerror(errno
));
1436 setsockopt(fd
, SOL_SOCKET
, SO_REUSEADDR
, (void*) &so_reuseaddr_option
,
1439 struct sockaddr_in sin
;
1440 unsigned int address_size
;
1441 address_size
= sizeof(sin
);
1442 memset(&sin
, 0, sizeof(sin
));
1443 sin
.sin_family
= AF_INET
;
1444 sin
.sin_addr
.s_addr
= INADDR_ANY
;
1445 sin
.sin_port
= htons(7777);
1447 if (bind(fd
, (struct sockaddr
*) &sin
, sizeof(sin
)) == -1)
1449 LOG_ERROR("couldn't bind to socket: %s", strerror(errno
));
1453 if (listen(fd
, 1) == -1)
1455 LOG_ERROR("couldn't listen on socket: %s", strerror(errno
));
1462 tcp_ip
= accept(fd
, (struct sockaddr
*) &sin
, &address_size
);
1469 setsockopt(tcp_ip
, /* socket affected */
1470 IPPROTO_TCP
, /* set option at TCP level */
1471 TCP_NODELAY
, /* name of option */
1472 (char *)&flag
, /* the cast is historical cruft */
1473 sizeof(int)); /* length of option value */
1475 bool save_poll
= jtag_poll_get_enabled();
1477 /* polling will screw up the "connection" */
1478 jtag_poll_set_enabled(false);
1482 jtag_poll_set_enabled(save_poll
);
1491 #ifdef WATCHDOG_BASE
1492 /* If we connect to port 8888 we must send a char every 10s or the board resets itself */
1493 static void watchdog_server(cyg_addrword_t data
)
1495 int so_reuseaddr_option
= 1;
1498 if ((fd
= socket(AF_INET
, SOCK_STREAM
, 0)) == -1)
1500 LOG_ERROR("error creating socket: %s", strerror(errno
));
1504 setsockopt(fd
, SOL_SOCKET
, SO_REUSEADDR
, (void*) &so_reuseaddr_option
,
1507 struct sockaddr_in sin
;
1508 unsigned int address_size
;
1509 address_size
= sizeof(sin
);
1510 memset(&sin
, 0, sizeof(sin
));
1511 sin
.sin_family
= AF_INET
;
1512 sin
.sin_addr
.s_addr
= INADDR_ANY
;
1513 sin
.sin_port
= htons(8888);
1515 if (bind(fd
, (struct sockaddr
*) &sin
, sizeof(sin
)) == -1)
1517 LOG_ERROR("couldn't bind to socket: %s", strerror(errno
));
1521 if (listen(fd
, 1) == -1)
1523 LOG_ERROR("couldn't listen on socket: %s", strerror(errno
));
1530 int watchdog_ip
= accept(fd
, (struct sockaddr
*) &sin
, &address_size
);
1532 /* Start watchdog, must be reset every 10 seconds. */
1533 HAL_WRITE_UINT32(WATCHDOG_BASE
+ 4, 4);
1535 if (watchdog_ip
< 0)
1537 LOG_ERROR("couldn't open watchdog socket: %s", strerror(errno
));
1542 setsockopt(watchdog_ip
, /* socket affected */
1543 IPPROTO_TCP
, /* set option at TCP level */
1544 TCP_NODELAY
, /* name of option */
1545 (char *)&flag
, /* the cast is historical cruft */
1546 sizeof(int)); /* length of option value */
1552 if (read(watchdog_ip
, &buf
, 1) == 1)
1555 HAL_WRITE_UINT32(WATCHDOG_BASE
+ 8, 0x1234);
1556 /* Echo so we can telnet in and see that resetting works */
1557 write(watchdog_ip
, &buf
, 1);
1560 /* Stop tickling the watchdog, the CPU will reset in < 10 seconds
1575 #if BUILD_ZY1000_MASTER
1576 int interface_jtag_add_sleep(uint32_t us
)
1583 #if BUILD_ZY1000_MASTER && !BUILD_ECOSBOARD
1584 volatile void *zy1000_jtag_master
;
1585 #include <sys/mman.h>
1588 int zy1000_init(void)
1591 LOG_USER("%s", ZYLIN_OPENOCD_VERSION
);
1594 if((fd
= open("/dev/mem", O_RDWR
| O_SYNC
)) == -1)
1596 LOG_ERROR("No access to /dev/mem");
1599 #ifndef REGISTERS_BASE
1600 #define REGISTERS_BASE 0x9002000
1601 #define REGISTERS_SPAN 128
1604 zy1000_jtag_master
= mmap(0, REGISTERS_SPAN
, PROT_READ
| PROT_WRITE
, MAP_SHARED
, fd
, REGISTERS_BASE
);
1606 if(zy1000_jtag_master
== (void *) -1)
1609 LOG_ERROR("No access to /dev/mem");
1616 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x30); // Turn on LED1 & LED2
1618 setPower(true); // on by default
1621 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1623 zy1000_speed(jtag_get_speed());
1627 cyg_thread_create(1, tcpip_server
, (cyg_addrword_t
) 0, "tcip/ip server",
1628 (void *) tcpip_stack
, sizeof(tcpip_stack
),
1629 &tcpip_thread_handle
, &tcpip_thread_object
);
1630 cyg_thread_resume(tcpip_thread_handle
);
1631 #ifdef WATCHDOG_BASE
1632 cyg_thread_create(1, watchdog_server
, (cyg_addrword_t
) 0, "watchdog tcip/ip server",
1633 (void *) watchdog_stack
, sizeof(watchdog_stack
),
1634 &watchdog_thread_handle
, &watchdog_thread_object
);
1635 cyg_thread_resume(watchdog_thread_handle
);
1644 struct jtag_interface zy1000_interface
=
1647 .supported
= DEBUG_CAP_TMS_SEQ
,
1648 .execute_queue
= NULL
,
1649 .speed
= zy1000_speed
,
1650 .commands
= zy1000_commands
,
1651 .init
= zy1000_init
,
1652 .quit
= zy1000_quit
,
1654 .speed_div
= zy1000_speed_div
,
1655 .power_dropout
= zy1000_power_dropout
,
1656 .srst_asserted
= zy1000_srst_asserted
,
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