update files to correct FSF address
[openocd.git] / src / jtag / zy1000 / zy1000.c
1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
18 ***************************************************************************/
19
20 /* This file supports the zy1000 debugger:
21 *
22 * http://www.ultsol.com/index.php/component/content/article/8/33-zylin-zy1000-jtag-probe
23 *
24 * The zy1000 is a standalone debugger that has a web interface and
25 * requires no drivers on the developer host as all communication
26 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
27 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
28 * accelerate the JTAG commands, while offering *very* low latency
29 * between OpenOCD and the FPGA registers.
30 *
31 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
32 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
33 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
34 *
35 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
36 * revb is using ARM7 + Xilinx.
37 *
38 * See Zylin web pages or contact Zylin for more information.
39 *
40 * The reason this code is in OpenOCD rather than OpenOCD linked with the
41 * ZY1000 code is that OpenOCD is the long road towards getting
42 * libopenocd into place. libopenocd will support both low performance,
43 * low latency systems(embedded) and high performance high latency
44 * systems(PCs).
45 */
46 #ifdef HAVE_CONFIG_H
47 #include "config.h"
48 #endif
49
50 #include <pthread.h>
51
52 #include <target/embeddedice.h>
53 #include <jtag/minidriver.h>
54 #include <jtag/interface.h>
55 #include <time.h>
56 #include <helper/time_support.h>
57
58 #include <netinet/tcp.h>
59
60 /* Assume we're connecting to a revc w/60MHz clock. */
61 #define ZYLIN_KHZ 60000
62
63 /* The software needs to check if it's in RCLK mode or not */
64 static bool zy1000_rclk;
65
66 static int zy1000_khz(int khz, int *jtag_speed)
67 {
68 if (khz == 0)
69 *jtag_speed = 0;
70 else {
71 int speed;
72 /* Round speed up to nearest divisor.
73 *
74 * E.g. 16000kHz
75 * (64000 + 15999) / 16000 = 4
76 * (4 + 1) / 2 = 2
77 * 2 * 2 = 4
78 *
79 * 64000 / 4 = 16000
80 *
81 * E.g. 15999
82 * (64000 + 15998) / 15999 = 5
83 * (5 + 1) / 2 = 3
84 * 3 * 2 = 6
85 *
86 * 64000 / 6 = 10666
87 *
88 */
89 speed = (ZYLIN_KHZ + (khz - 1)) / khz;
90 speed = (speed + 1) / 2;
91 speed *= 2;
92 if (speed > 8190) {
93 /* maximum dividend */
94 speed = 8190;
95 }
96 *jtag_speed = speed;
97 }
98 return ERROR_OK;
99 }
100
101 static int zy1000_speed_div(int speed, int *khz)
102 {
103 if (speed == 0)
104 *khz = 0;
105 else
106 *khz = ZYLIN_KHZ / speed;
107
108 return ERROR_OK;
109 }
110
111 static bool readPowerDropout(void)
112 {
113 uint32_t state;
114 /* sample and clear power dropout */
115 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
116 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
117 bool powerDropout;
118 powerDropout = (state & 0x80) != 0;
119 return powerDropout;
120 }
121
122
123 static bool readSRST(void)
124 {
125 uint32_t state;
126 /* sample and clear SRST sensing */
127 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
128 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
129 bool srstAsserted;
130 srstAsserted = (state & 0x40) != 0;
131 return srstAsserted;
132 }
133
134 static int zy1000_srst_asserted(int *srst_asserted)
135 {
136 *srst_asserted = readSRST();
137 return ERROR_OK;
138 }
139
140 static int zy1000_power_dropout(int *dropout)
141 {
142 *dropout = readPowerDropout();
143 return ERROR_OK;
144 }
145
146 /* Wait for SRST to assert or deassert */
147 static void waitSRST(bool asserted)
148 {
149 bool first = true;
150 long long start = 0;
151 long total = 0;
152 const char *mode = asserted ? "assert" : "deassert";
153
154 for (;; ) {
155 bool srstAsserted = readSRST();
156 if ((asserted && srstAsserted) || (!asserted && !srstAsserted)) {
157 if (total > 1)
158 LOG_USER("SRST took %dms to %s", (int)total, mode);
159 break;
160 }
161
162 if (first) {
163 first = false;
164 start = timeval_ms();
165 }
166
167 total = timeval_ms() - start;
168
169 keep_alive();
170
171 if (total > 5000) {
172 LOG_ERROR("SRST took too long to %s: %dms", mode, (int)total);
173 break;
174 }
175 }
176 }
177
178 void zy1000_reset(int trst, int srst)
179 {
180 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
181
182 /* flush the JTAG FIFO. Not flushing the queue before messing with
183 * reset has such interesting bugs as causing hard to reproduce
184 * RCLK bugs as RCLK will stop responding when TRST is asserted
185 */
186 waitIdle();
187
188 if (!srst)
189 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
190 else {
191 /* Danger!!! if clk != 0 when in
192 * idle in TAP_IDLE, reset halt on str912 will fail.
193 */
194 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
195
196 waitSRST(true);
197 }
198
199 if (!trst)
200 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
201 else {
202 /* assert reset */
203 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
204 }
205
206 if (trst || (srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST))) {
207 /* we're now in the RESET state until trst is deasserted */
208 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
209 } else {
210 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
211 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
212 }
213
214 /* wait for srst to float back up */
215 if ((!srst && ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST) == 0)) ||
216 (!srst && !trst && (jtag_get_reset_config() & RESET_TRST_PULLS_SRST)))
217 waitSRST(false);
218 }
219
220 int zy1000_speed(int speed)
221 {
222 /* flush JTAG master FIFO before setting speed */
223 waitIdle();
224
225 zy1000_rclk = false;
226
227 if (speed == 0) {
228 /*0 means RCLK*/
229 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
230 zy1000_rclk = true;
231 LOG_DEBUG("jtag_speed using RCLK");
232 } else {
233 if (speed > 8190 || speed < 2) {
234 LOG_USER(
235 "valid ZY1000 jtag_speed=[8190,2]. With divisor is %dkHz / even values between 8190-2, i.e. min %dHz, max %dMHz",
236 ZYLIN_KHZ,
237 (ZYLIN_KHZ * 1000) / 8190,
238 ZYLIN_KHZ / (2 * 1000));
239 return ERROR_COMMAND_SYNTAX_ERROR;
240 }
241
242 int khz;
243 speed &= ~1;
244 zy1000_speed_div(speed, &khz);
245 LOG_USER("jtag_speed %d => JTAG clk=%d kHz", speed, khz);
246 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
247 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed);
248 }
249 return ERROR_OK;
250 }
251
252 static bool savePower;
253
254 static void setPower(bool power)
255 {
256 savePower = power;
257 if (power)
258 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
259 else
260 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
261 }
262
263 COMMAND_HANDLER(handle_power_command)
264 {
265 switch (CMD_ARGC) {
266 case 1: {
267 bool enable;
268 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
269 setPower(enable);
270 /* fall through */
271 }
272 case 0:
273 LOG_INFO("Target power %s", savePower ? "on" : "off");
274 break;
275 default:
276 return ERROR_COMMAND_SYNTAX_ERROR;
277 }
278
279 return ERROR_OK;
280 }
281
282 #if !BUILD_ZY1000_MASTER
283 static char *tcp_server = "notspecified";
284 static int jim_zy1000_server(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
285 {
286 if (argc != 2)
287 return JIM_ERR;
288
289 tcp_server = strdup(Jim_GetString(argv[1], NULL));
290
291 return JIM_OK;
292 }
293 #endif
294
295 static int zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
296 int argc,
297 Jim_Obj * const *argv)
298 {
299 if (argc != 1) {
300 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
301 return JIM_ERR;
302 }
303
304 bool dropout = readPowerDropout();
305
306 Jim_SetResult(interp, Jim_NewIntObj(interp, dropout));
307
308 return JIM_OK;
309 }
310
311 int zy1000_quit(void)
312 {
313
314 return ERROR_OK;
315 }
316
317 int interface_jtag_execute_queue(void)
318 {
319 uint32_t empty;
320
321 waitIdle();
322
323 /* We must make sure to write data read back to memory location before we return
324 * from this fn
325 */
326 zy1000_flush_readqueue();
327
328 /* and handle any callbacks... */
329 zy1000_flush_callbackqueue();
330
331 if (zy1000_rclk) {
332 /* Only check for errors when using RCLK to speed up
333 * jtag over TCP/IP
334 */
335 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
336 /* clear JTAG error register */
337 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
338
339 if ((empty&0x400) != 0) {
340 LOG_WARNING("RCLK timeout");
341 /* the error is informative only as we don't want to break the firmware if there
342 * is a false positive.
343 */
344 /* return ERROR_FAIL; */
345 }
346 }
347 return ERROR_OK;
348 }
349
350 static void writeShiftValue(uint8_t *data, int bits);
351
352 /* here we shuffle N bits out/in */
353 static inline void scanBits(const uint8_t *out_value,
354 uint8_t *in_value,
355 int num_bits,
356 bool pause_now,
357 tap_state_t shiftState,
358 tap_state_t end_state)
359 {
360 tap_state_t pause_state = shiftState;
361 for (int j = 0; j < num_bits; j += 32) {
362 int k = num_bits - j;
363 if (k > 32) {
364 k = 32;
365 /* we have more to shift out */
366 } else if (pause_now) {
367 /* this was the last to shift out this time */
368 pause_state = end_state;
369 }
370
371 /* we have (num_bits + 7)/8 bytes of bits to toggle out. */
372 /* bits are pushed out LSB to MSB */
373 uint32_t value;
374 value = 0;
375 if (out_value != NULL) {
376 for (int l = 0; l < k; l += 8)
377 value |= out_value[(j + l)/8]<<l;
378 }
379 /* mask away unused bits for easier debugging */
380 if (k < 32)
381 value &= ~(((uint32_t)0xffffffff) << k);
382 else {
383 /* Shifting by >= 32 is not defined by the C standard
384 * and will in fact shift by &0x1f bits on nios */
385 }
386
387 shiftValueInner(shiftState, pause_state, k, value);
388
389 if (in_value != NULL)
390 writeShiftValue(in_value + (j/8), k);
391 }
392 }
393
394 static inline void scanFields(int num_fields,
395 const struct scan_field *fields,
396 tap_state_t shiftState,
397 tap_state_t end_state)
398 {
399 for (int i = 0; i < num_fields; i++) {
400 scanBits(fields[i].out_value,
401 fields[i].in_value,
402 fields[i].num_bits,
403 (i == num_fields-1),
404 shiftState,
405 end_state);
406 }
407 }
408
409 int interface_jtag_add_ir_scan(struct jtag_tap *active,
410 const struct scan_field *fields,
411 tap_state_t state)
412 {
413 int scan_size = 0;
414 struct jtag_tap *tap, *nextTap;
415 tap_state_t pause_state = TAP_IRSHIFT;
416
417 for (tap = jtag_tap_next_enabled(NULL); tap != NULL; tap = nextTap) {
418 nextTap = jtag_tap_next_enabled(tap);
419 if (nextTap == NULL)
420 pause_state = state;
421 scan_size = tap->ir_length;
422
423 /* search the list */
424 if (tap == active) {
425 scanFields(1, fields, TAP_IRSHIFT, pause_state);
426 /* update device information */
427 buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
428
429 tap->bypass = 0;
430 } else {
431 /* if a device isn't listed, set it to BYPASS */
432 assert(scan_size <= 32);
433 shiftValueInner(TAP_IRSHIFT, pause_state, scan_size, 0xffffffff);
434
435 /* Optimization code will check what the cur_instr is set to, so
436 * we must set it to bypass value.
437 */
438 buf_set_ones(tap->cur_instr, tap->ir_length);
439
440 tap->bypass = 1;
441 }
442 }
443
444 return ERROR_OK;
445 }
446
447 int interface_jtag_add_plain_ir_scan(int num_bits,
448 const uint8_t *out_bits,
449 uint8_t *in_bits,
450 tap_state_t state)
451 {
452 scanBits(out_bits, in_bits, num_bits, true, TAP_IRSHIFT, state);
453 return ERROR_OK;
454 }
455
456 int interface_jtag_add_dr_scan(struct jtag_tap *active,
457 int num_fields,
458 const struct scan_field *fields,
459 tap_state_t state)
460 {
461 struct jtag_tap *tap, *nextTap;
462 tap_state_t pause_state = TAP_DRSHIFT;
463 for (tap = jtag_tap_next_enabled(NULL); tap != NULL; tap = nextTap) {
464 nextTap = jtag_tap_next_enabled(tap);
465 if (nextTap == NULL)
466 pause_state = state;
467
468 /* Find a range of fields to write to this tap */
469 if (tap == active) {
470 assert(!tap->bypass);
471
472 scanFields(num_fields, fields, TAP_DRSHIFT, pause_state);
473 } else {
474 /* Shift out a 0 for disabled tap's */
475 assert(tap->bypass);
476 shiftValueInner(TAP_DRSHIFT, pause_state, 1, 0);
477 }
478 }
479 return ERROR_OK;
480 }
481
482 int interface_jtag_add_plain_dr_scan(int num_bits,
483 const uint8_t *out_bits,
484 uint8_t *in_bits,
485 tap_state_t state)
486 {
487 scanBits(out_bits, in_bits, num_bits, true, TAP_DRSHIFT, state);
488 return ERROR_OK;
489 }
490
491 int interface_jtag_add_tlr()
492 {
493 setCurrentState(TAP_RESET);
494 return ERROR_OK;
495 }
496
497 int interface_jtag_add_reset(int req_trst, int req_srst)
498 {
499 zy1000_reset(req_trst, req_srst);
500 return ERROR_OK;
501 }
502
503 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
504 {
505 /* num_cycles can be 0 */
506 setCurrentState(clockstate);
507
508 /* execute num_cycles, 32 at the time. */
509 int i;
510 for (i = 0; i < num_cycles; i += 32) {
511 int num;
512 num = 32;
513 if (num_cycles-i < num)
514 num = num_cycles-i;
515 shiftValueInner(clockstate, clockstate, num, 0);
516 }
517
518 #if !TEST_MANUAL()
519 /* finish in end_state */
520 setCurrentState(state);
521 #else
522 tap_state_t t = TAP_IDLE;
523 /* test manual drive code on any target */
524 int tms;
525 uint8_t tms_scan = tap_get_tms_path(t, state);
526 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
527
528 for (i = 0; i < tms_count; i++) {
529 tms = (tms_scan >> i) & 1;
530 waitIdle();
531 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
532 }
533 waitIdle();
534 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
535 #endif
536
537 return ERROR_OK;
538 }
539
540 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
541 {
542 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
543 }
544
545 int interface_jtag_add_clocks(int num_cycles)
546 {
547 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
548 }
549
550 int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
551 {
552 /*wait for the fifo to be empty*/
553 waitIdle();
554
555 for (unsigned i = 0; i < num_bits; i++) {
556 int tms;
557
558 if (((seq[i/8] >> (i % 8)) & 1) == 0)
559 tms = 0;
560 else
561 tms = 1;
562
563 waitIdle();
564 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
565 }
566
567 waitIdle();
568 if (state != TAP_INVALID)
569 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
570 else {
571 /* this would be normal if
572 * we are switching to SWD mode */
573 }
574 return ERROR_OK;
575 }
576
577 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
578 {
579 int state_count;
580 int tms = 0;
581
582 state_count = 0;
583
584 tap_state_t cur_state = cmd_queue_cur_state;
585
586 uint8_t seq[16];
587 memset(seq, 0, sizeof(seq));
588 assert(num_states < (int)((sizeof(seq) * 8)));
589
590 while (num_states) {
591 if (tap_state_transition(cur_state, false) == path[state_count])
592 tms = 0;
593 else if (tap_state_transition(cur_state, true) == path[state_count])
594 tms = 1;
595 else {
596 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
597 tap_state_name(cur_state), tap_state_name(path[state_count]));
598 exit(-1);
599 }
600
601 seq[state_count/8] = seq[state_count/8] | (tms << (state_count % 8));
602
603 cur_state = path[state_count];
604 state_count++;
605 num_states--;
606 }
607
608 return interface_add_tms_seq(state_count, seq, cur_state);
609 }
610
611 static void jtag_pre_post_bits(struct jtag_tap *tap, int *pre, int *post)
612 {
613 /* bypass bits before and after */
614 int pre_bits = 0;
615 int post_bits = 0;
616
617 bool found = false;
618 struct jtag_tap *cur_tap, *nextTap;
619 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap != NULL; cur_tap = nextTap) {
620 nextTap = jtag_tap_next_enabled(cur_tap);
621 if (cur_tap == tap)
622 found = true;
623 else {
624 if (found)
625 post_bits++;
626 else
627 pre_bits++;
628 }
629 }
630 *pre = pre_bits;
631 *post = post_bits;
632 }
633
634 #if 0
635 static const int embeddedice_num_bits[] = {32, 6};
636 uint32_t values[2];
637
638 values[0] = value;
639 values[1] = (1 << 5) | reg_addr;
640
641 jtag_add_dr_out(tap, 2, embeddedice_num_bits, values, TAP_IDLE);
642 #endif
643
644 void embeddedice_write_dcc(struct jtag_tap *tap,
645 int reg_addr,
646 const uint8_t *buffer,
647 int little,
648 int count)
649 {
650 #if 0
651 int i;
652 for (i = 0; i < count; i++) {
653 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer,
654 little));
655 buffer += 4;
656 }
657 #else
658 int pre_bits;
659 int post_bits;
660 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
661
662 if ((pre_bits > 32) || (post_bits + 6 > 32)) {
663 int i;
664 for (i = 0; i < count; i++) {
665 embeddedice_write_reg_inner(tap, reg_addr,
666 fast_target_buffer_get_u32(buffer, little));
667 buffer += 4;
668 }
669 } else {
670 int i;
671 for (i = 0; i < count; i++) {
672 /* Fewer pokes means we get to use the FIFO more efficiently */
673 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
674 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32,
675 fast_target_buffer_get_u32(buffer, little));
676 /* Danger! here we need to exit into the TAP_IDLE state to make
677 * DCC pick up this value.
678 */
679 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits,
680 (reg_addr | (1 << 5)));
681 buffer += 4;
682 }
683 }
684 #endif
685 }
686
687 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap *tap,
688 uint32_t opcode,
689 const uint32_t *data,
690 size_t count)
691 {
692 /* bypass bits before and after */
693 int pre_bits;
694 int post_bits;
695 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
696 post_bits += 2;
697
698 if ((pre_bits > 32) || (post_bits > 32)) {
699 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *,
700 uint32_t, const uint32_t *, size_t);
701 return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
702 } else {
703 static const int bits[] = {32, 2};
704 uint32_t values[] = {0, 0};
705
706 /* FIX!!!!!! the target_write_memory() API started this nasty problem
707 * with unaligned uint32_t * pointers... */
708 const uint8_t *t = (const uint8_t *)data;
709
710 while (--count > 0) {
711 #if 1
712 /* Danger! This code doesn't update cmd_queue_cur_state, so
713 * invoking jtag_add_pathmove() before jtag_add_dr_out() after
714 * this loop would fail!
715 */
716 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
717
718 uint32_t value;
719 value = *t++;
720 value |= (*t++<<8);
721 value |= (*t++<<16);
722 value |= (*t++<<24);
723
724 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, value);
725 /* minimum 2 bits */
726 shiftValueInner(TAP_DRSHIFT, TAP_DRPAUSE, post_bits, 0);
727
728 /* copy & paste from arm11_dbgtap.c */
729 /* TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT,
730 * TAP_DRCAPTURE, TAP_DRSHIFT */
731 /* KLUDGE! we have to flush the fifo or the Nios CPU locks up.
732 * This is probably a bug in the Avalon bus(cross clocking bridge?)
733 * or in the jtag registers module.
734 */
735 waitIdle();
736 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
737 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
738 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
739 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
740 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
741 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
742 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
743 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
744 /* we don't have to wait for the queue to empty here */
745 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_DRSHIFT);
746 waitIdle();
747 #else
748 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] = {
749 TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE,
750 TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
751 };
752
753 values[0] = *t++;
754 values[0] |= (*t++<<8);
755 values[0] |= (*t++<<16);
756 values[0] |= (*t++<<24);
757
758 jtag_add_dr_out(tap,
759 2,
760 bits,
761 values,
762 TAP_IDLE);
763
764 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
765 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
766 #endif
767 }
768
769 values[0] = *t++;
770 values[0] |= (*t++<<8);
771 values[0] |= (*t++<<16);
772 values[0] |= (*t++<<24);
773
774 /* This will happen on the last iteration updating cmd_queue_cur_state
775 * so we don't have to track it during the common code path
776 */
777 jtag_add_dr_out(tap,
778 2,
779 bits,
780 values,
781 TAP_IDLE);
782
783 return jtag_execute_queue();
784 }
785 }
786
787 static const struct command_registration zy1000_commands[] = {
788 {
789 .name = "power",
790 .handler = handle_power_command,
791 .mode = COMMAND_ANY,
792 .help = "Turn power switch to target on/off. "
793 "With no arguments, prints status.",
794 .usage = "('on'|'off)",
795 },
796 #if !BUILD_ZY1000_MASTER
797 {
798 .name = "zy1000_server",
799 .mode = COMMAND_ANY,
800 .jim_handler = jim_zy1000_server,
801 .help = "Tcpip address for ZY1000 server.",
802 .usage = "address",
803 },
804 #endif
805 {
806 .name = "powerstatus",
807 .mode = COMMAND_ANY,
808 .jim_handler = zylinjtag_Jim_Command_powerstatus,
809 .help = "Returns power status of target",
810 },
811 COMMAND_REGISTRATION_DONE
812 };
813
814 #if !BUILD_ZY1000_MASTER
815
816 static int tcp_ip = -1;
817
818 /* Write large packets if we can */
819 static size_t out_pos;
820 static uint8_t out_buffer[16384];
821 static size_t in_pos;
822 static size_t in_write;
823 static uint8_t in_buffer[16384];
824
825 static bool flush_writes(void)
826 {
827 bool ok = (write(tcp_ip, out_buffer, out_pos) == (int)out_pos);
828 out_pos = 0;
829 return ok;
830 }
831
832 static bool writeLong(uint32_t l)
833 {
834 int i;
835 for (i = 0; i < 4; i++) {
836 uint8_t c = (l >> (i*8))&0xff;
837 out_buffer[out_pos++] = c;
838 if (out_pos >= sizeof(out_buffer)) {
839 if (!flush_writes())
840 return false;
841 }
842 }
843 return true;
844 }
845
846 static bool readLong(uint32_t *out_data)
847 {
848 uint32_t data = 0;
849 int i;
850 for (i = 0; i < 4; i++) {
851 uint8_t c;
852 if (in_pos == in_write) {
853 /* If we have some data that we can send, send them before
854 * we wait for more data
855 */
856 if (out_pos > 0) {
857 if (!flush_writes())
858 return false;
859 }
860
861 /* read more */
862 int t;
863 t = read(tcp_ip, in_buffer, sizeof(in_buffer));
864 if (t < 1)
865 return false;
866 in_write = (size_t) t;
867 in_pos = 0;
868 }
869 c = in_buffer[in_pos++];
870
871 data |= (c << (i*8));
872 }
873 *out_data = data;
874 return true;
875 }
876
877 enum ZY1000_CMD {
878 ZY1000_CMD_POKE = 0x0,
879 ZY1000_CMD_PEEK = 0x8,
880 ZY1000_CMD_SLEEP = 0x1,
881 ZY1000_CMD_WAITIDLE = 2
882 };
883
884 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
885 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
886
887 /* We initialize this late since we need to know the server address
888 * first.
889 */
890 static void tcpip_open(void)
891 {
892 if (tcp_ip >= 0)
893 return;
894
895 struct sockaddr_in echoServAddr;/* Echo server address */
896
897 /* Create a reliable, stream socket using TCP */
898 tcp_ip = socket(PF_INET, SOCK_STREAM, IPPROTO_TCP);
899 if (tcp_ip < 0) {
900 fprintf(stderr, "Failed to connect to zy1000 server\n");
901 exit(-1);
902 }
903
904 /* Construct the server address structure */
905 memset(&echoServAddr, 0, sizeof(echoServAddr)); /* Zero out structure */
906 echoServAddr.sin_family = AF_INET; /* Internet address family */
907 echoServAddr.sin_addr.s_addr = inet_addr(tcp_server); /* Server IP address */
908 echoServAddr.sin_port = htons(7777); /* Server port */
909
910 /* Establish the connection to the echo server */
911 if (connect(tcp_ip, (struct sockaddr *) &echoServAddr, sizeof(echoServAddr)) < 0) {
912 fprintf(stderr, "Failed to connect to zy1000 server\n");
913 exit(-1);
914 }
915
916 int flag = 1;
917 setsockopt(tcp_ip, /* socket affected */
918 IPPROTO_TCP, /* set option at TCP level */
919 TCP_NODELAY, /* name of option */
920 (char *)&flag, /* the cast is historical cruft */
921 sizeof(int)); /* length of option value */
922
923 }
924
925 /* send a poke */
926 void zy1000_tcpout(uint32_t address, uint32_t data)
927 {
928 tcpip_open();
929 if (!writeLong((ZY1000_CMD_POKE << 24) | address) || !writeLong(data)) {
930 fprintf(stderr, "Could not write to zy1000 server\n");
931 exit(-1);
932 }
933 }
934
935 /* By sending the wait to the server, we avoid a readback
936 * of status. Radically improves performance for this operation
937 * with long ping times.
938 */
939 void waitIdle(void)
940 {
941 tcpip_open();
942 if (!writeLong((ZY1000_CMD_WAITIDLE << 24))) {
943 fprintf(stderr, "Could not write to zy1000 server\n");
944 exit(-1);
945 }
946 }
947
948 uint32_t zy1000_tcpin(uint32_t address)
949 {
950 tcpip_open();
951
952 zy1000_flush_readqueue();
953
954 uint32_t data;
955 if (!writeLong((ZY1000_CMD_PEEK << 24) | address) || !readLong(&data)) {
956 fprintf(stderr, "Could not read from zy1000 server\n");
957 exit(-1);
958 }
959 return data;
960 }
961
962 int interface_jtag_add_sleep(uint32_t us)
963 {
964 tcpip_open();
965 if (!writeLong((ZY1000_CMD_SLEEP << 24)) || !writeLong(us)) {
966 fprintf(stderr, "Could not read from zy1000 server\n");
967 exit(-1);
968 }
969 return ERROR_OK;
970 }
971
972 /* queue a readback */
973 #define readqueue_size 16384
974 static struct {
975 uint8_t *dest;
976 int bits;
977 } readqueue[readqueue_size];
978
979 static int readqueue_pos;
980
981 /* flush the readqueue, this means reading any data that
982 * we're expecting and store them into the final position
983 */
984 void zy1000_flush_readqueue(void)
985 {
986 if (readqueue_pos == 0) {
987 /* simply debugging by allowing easy breakpoints when there
988 * is something to do. */
989 return;
990 }
991 int i;
992 tcpip_open();
993 for (i = 0; i < readqueue_pos; i++) {
994 uint32_t value;
995 if (!readLong(&value)) {
996 fprintf(stderr, "Could not read from zy1000 server\n");
997 exit(-1);
998 }
999
1000 uint8_t *in_value = readqueue[i].dest;
1001 int k = readqueue[i].bits;
1002
1003 /* we're shifting in data to MSB, shift data to be aligned for returning the value */
1004 value >>= 32-k;
1005
1006 for (int l = 0; l < k; l += 8)
1007 in_value[l/8] = (value >> l)&0xff;
1008 }
1009 readqueue_pos = 0;
1010 }
1011
1012 /* By queuing the callback's we avoid flushing the
1013 * read queue until jtag_execute_queue(). This can
1014 * reduce latency dramatically for cases where
1015 * callbacks are used extensively.
1016 */
1017 #define callbackqueue_size 128
1018 static struct callbackentry {
1019 jtag_callback_t callback;
1020 jtag_callback_data_t data0;
1021 jtag_callback_data_t data1;
1022 jtag_callback_data_t data2;
1023 jtag_callback_data_t data3;
1024 } callbackqueue[callbackqueue_size];
1025
1026 static int callbackqueue_pos;
1027
1028 void zy1000_jtag_add_callback4(jtag_callback_t callback,
1029 jtag_callback_data_t data0,
1030 jtag_callback_data_t data1,
1031 jtag_callback_data_t data2,
1032 jtag_callback_data_t data3)
1033 {
1034 if (callbackqueue_pos >= callbackqueue_size)
1035 zy1000_flush_callbackqueue();
1036
1037 callbackqueue[callbackqueue_pos].callback = callback;
1038 callbackqueue[callbackqueue_pos].data0 = data0;
1039 callbackqueue[callbackqueue_pos].data1 = data1;
1040 callbackqueue[callbackqueue_pos].data2 = data2;
1041 callbackqueue[callbackqueue_pos].data3 = data3;
1042 callbackqueue_pos++;
1043
1044 /* KLUDGE!
1045 * make callbacks synchronous for now as minidriver requires callback
1046 * to be synchronous.
1047 *
1048 * We can get away with making read and writes asynchronous so we
1049 * don't completely kill performance.
1050 */
1051 zy1000_flush_callbackqueue();
1052 }
1053
1054 static int zy1000_jtag_convert_to_callback4(jtag_callback_data_t data0,
1055 jtag_callback_data_t data1,
1056 jtag_callback_data_t data2,
1057 jtag_callback_data_t data3)
1058 {
1059 ((jtag_callback1_t)data1)(data0);
1060 return ERROR_OK;
1061 }
1062
1063 void zy1000_jtag_add_callback(jtag_callback1_t callback, jtag_callback_data_t data0)
1064 {
1065 zy1000_jtag_add_callback4(zy1000_jtag_convert_to_callback4,
1066 data0,
1067 (jtag_callback_data_t)callback,
1068 0,
1069 0);
1070 }
1071
1072 void zy1000_flush_callbackqueue(void)
1073 {
1074 /* we have to flush the read queue so we have access to
1075 the data the callbacks will use
1076 */
1077 zy1000_flush_readqueue();
1078 int i;
1079 for (i = 0; i < callbackqueue_pos; i++) {
1080 struct callbackentry *entry = &callbackqueue[i];
1081 jtag_set_error(entry->callback(entry->data0, entry->data1, entry->data2,
1082 entry->data3));
1083 }
1084 callbackqueue_pos = 0;
1085 }
1086
1087 static void writeShiftValue(uint8_t *data, int bits)
1088 {
1089 waitIdle();
1090
1091 if (!writeLong((ZY1000_CMD_PEEK << 24) | (ZY1000_JTAG_BASE + 0xc))) {
1092 fprintf(stderr, "Could not read from zy1000 server\n");
1093 exit(-1);
1094 }
1095
1096 if (readqueue_pos >= readqueue_size)
1097 zy1000_flush_readqueue();
1098
1099 readqueue[readqueue_pos].dest = data;
1100 readqueue[readqueue_pos].bits = bits;
1101 readqueue_pos++;
1102
1103 /* KLUDGE!!! minidriver requires readqueue to be synchronous */
1104 zy1000_flush_readqueue();
1105 }
1106
1107 #else
1108
1109 static void writeShiftValue(uint8_t *data, int bits)
1110 {
1111 uint32_t value;
1112 waitIdle();
1113 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
1114 VERBOSE(LOG_INFO("getShiftValue %08x", value));
1115
1116 /* data in, LSB to MSB */
1117 /* we're shifting in data to MSB, shift data to be aligned for returning the value */
1118 value >>= 32 - bits;
1119
1120 for (int l = 0; l < bits; l += 8)
1121 data[l/8] = (value >> l)&0xff;
1122 }
1123
1124 #endif
1125
1126 #if BUILD_ZY1000_MASTER
1127
1128 #ifdef WATCHDOG_BASE
1129 /* If we connect to port 8888 we must send a char every 10s or the board resets itself */
1130 static void watchdog_server(cyg_addrword_t data)
1131 {
1132 int so_reuseaddr_option = 1;
1133
1134 int fd = socket(AF_INET, SOCK_STREAM, 0);
1135 if (fd == -1) {
1136 LOG_ERROR("error creating socket: %s", strerror(errno));
1137 exit(-1);
1138 }
1139
1140 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void *) &so_reuseaddr_option,
1141 sizeof(int));
1142
1143 struct sockaddr_in sin;
1144 unsigned int address_size;
1145 address_size = sizeof(sin);
1146 memset(&sin, 0, sizeof(sin));
1147 sin.sin_family = AF_INET;
1148 sin.sin_addr.s_addr = INADDR_ANY;
1149 sin.sin_port = htons(8888);
1150
1151 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1) {
1152 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1153 exit(-1);
1154 }
1155
1156 if (listen(fd, 1) == -1) {
1157 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1158 exit(-1);
1159 }
1160
1161
1162 for (;; ) {
1163 int watchdog_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1164
1165 /* Start watchdog, must be reset every 10 seconds. */
1166 HAL_WRITE_UINT32(WATCHDOG_BASE + 4, 4);
1167
1168 if (watchdog_ip < 0) {
1169 LOG_ERROR("couldn't open watchdog socket: %s", strerror(errno));
1170 exit(-1);
1171 }
1172
1173 int flag = 1;
1174 setsockopt(watchdog_ip, /* socket affected */
1175 IPPROTO_TCP, /* set option at TCP level */
1176 TCP_NODELAY, /* name of option */
1177 (char *)&flag, /* the cast is historical cruft */
1178 sizeof(int)); /* length of option value */
1179
1180
1181 char buf;
1182 for (;; ) {
1183 if (read(watchdog_ip, &buf, 1) == 1) {
1184 /* Reset timer */
1185 HAL_WRITE_UINT32(WATCHDOG_BASE + 8, 0x1234);
1186 /* Echo so we can telnet in and see that resetting works */
1187 write(watchdog_ip, &buf, 1);
1188 } else {
1189 /* Stop tickling the watchdog, the CPU will reset in < 10 seconds
1190 * now.
1191 */
1192 return;
1193 }
1194
1195 }
1196
1197 /* Never reached */
1198 }
1199 }
1200 #endif
1201
1202 #endif
1203
1204 #if BUILD_ZY1000_MASTER
1205 int interface_jtag_add_sleep(uint32_t us)
1206 {
1207 jtag_sleep(us);
1208 return ERROR_OK;
1209 }
1210 #endif
1211
1212 #if BUILD_ZY1000_MASTER
1213 volatile void *zy1000_jtag_master;
1214 #include <sys/mman.h>
1215 #endif
1216
1217 int zy1000_init(void)
1218 {
1219 #if BUILD_ZY1000_MASTER
1220 int fd = open("/dev/mem", O_RDWR | O_SYNC);
1221 if (fd == -1) {
1222 LOG_ERROR("No access to /dev/mem");
1223 return ERROR_FAIL;
1224 }
1225 #ifndef REGISTERS_BASE
1226 #define REGISTERS_BASE 0x9002000
1227 #define REGISTERS_SPAN 128
1228 #endif
1229
1230 zy1000_jtag_master = mmap(0,
1231 REGISTERS_SPAN,
1232 PROT_READ | PROT_WRITE,
1233 MAP_SHARED,
1234 fd,
1235 REGISTERS_BASE);
1236
1237 if (zy1000_jtag_master == (void *) -1) {
1238 close(fd);
1239 LOG_ERROR("No access to /dev/mem");
1240 return ERROR_FAIL;
1241 }
1242 #endif
1243
1244 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); /* Turn on LED1 & LED2 */
1245
1246 setPower(true); /* on by default */
1247
1248 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1249 zy1000_reset(0, 0);
1250
1251 return ERROR_OK;
1252 }
1253
1254 struct jtag_interface zy1000_interface = {
1255 .name = "ZY1000",
1256 .supported = DEBUG_CAP_TMS_SEQ,
1257 .execute_queue = NULL,
1258 .speed = zy1000_speed,
1259 .commands = zy1000_commands,
1260 .init = zy1000_init,
1261 .quit = zy1000_quit,
1262 .khz = zy1000_khz,
1263 .speed_div = zy1000_speed_div,
1264 .power_dropout = zy1000_power_dropout,
1265 .srst_asserted = zy1000_srst_asserted,
1266 };

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