Fix usage of timeval_ms()
[openocd.git] / src / jtag / zy1000 / zy1000.c
1 /***************************************************************************
2 * Copyright (C) 2007-2010 by √ėyvind Harboe *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
16 ***************************************************************************/
17
18 /* This file supports the zy1000 debugger:
19 *
20 * http://www.ultsol.com/index.php/component/content/article/8/33-zylin-zy1000-jtag-probe
21 *
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
28 *
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
32 *
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
35 *
36 * See Zylin web pages or contact Zylin for more information.
37 *
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
42 * systems(PCs).
43 */
44 #ifdef HAVE_CONFIG_H
45 #include "config.h"
46 #endif
47
48 #include <pthread.h>
49
50 #include <target/embeddedice.h>
51 #include <jtag/minidriver.h>
52 #include <jtag/interface.h>
53 #include <time.h>
54 #include <helper/time_support.h>
55
56 #include <netinet/tcp.h>
57
58 /* Assume we're connecting to a revc w/60MHz clock. */
59 #define ZYLIN_KHZ 60000
60
61 /* The software needs to check if it's in RCLK mode or not */
62 static bool zy1000_rclk;
63
64 static int zy1000_khz(int khz, int *jtag_speed)
65 {
66 if (khz == 0)
67 *jtag_speed = 0;
68 else {
69 int speed;
70 /* Round speed up to nearest divisor.
71 *
72 * E.g. 16000kHz
73 * (64000 + 15999) / 16000 = 4
74 * (4 + 1) / 2 = 2
75 * 2 * 2 = 4
76 *
77 * 64000 / 4 = 16000
78 *
79 * E.g. 15999
80 * (64000 + 15998) / 15999 = 5
81 * (5 + 1) / 2 = 3
82 * 3 * 2 = 6
83 *
84 * 64000 / 6 = 10666
85 *
86 */
87 speed = (ZYLIN_KHZ + (khz - 1)) / khz;
88 speed = (speed + 1) / 2;
89 speed *= 2;
90 if (speed > 8190) {
91 /* maximum dividend */
92 speed = 8190;
93 }
94 *jtag_speed = speed;
95 }
96 return ERROR_OK;
97 }
98
99 static int zy1000_speed_div(int speed, int *khz)
100 {
101 if (speed == 0)
102 *khz = 0;
103 else
104 *khz = ZYLIN_KHZ / speed;
105
106 return ERROR_OK;
107 }
108
109 static bool readPowerDropout(void)
110 {
111 uint32_t state;
112 /* sample and clear power dropout */
113 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
114 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
115 bool powerDropout;
116 powerDropout = (state & 0x80) != 0;
117 return powerDropout;
118 }
119
120
121 static bool readSRST(void)
122 {
123 uint32_t state;
124 /* sample and clear SRST sensing */
125 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
126 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
127 bool srstAsserted;
128 srstAsserted = (state & 0x40) != 0;
129 return srstAsserted;
130 }
131
132 static int zy1000_srst_asserted(int *srst_asserted)
133 {
134 *srst_asserted = readSRST();
135 return ERROR_OK;
136 }
137
138 static int zy1000_power_dropout(int *dropout)
139 {
140 *dropout = readPowerDropout();
141 return ERROR_OK;
142 }
143
144 /* Wait for SRST to assert or deassert */
145 static void waitSRST(bool asserted)
146 {
147 bool first = true;
148 int64_t start = 0;
149 int64_t total = 0;
150 const char *mode = asserted ? "assert" : "deassert";
151
152 for (;; ) {
153 bool srstAsserted = readSRST();
154 if ((asserted && srstAsserted) || (!asserted && !srstAsserted)) {
155 if (total > 1)
156 LOG_USER("SRST took %dms to %s", (int)total, mode);
157 break;
158 }
159
160 if (first) {
161 first = false;
162 start = timeval_ms();
163 }
164
165 total = timeval_ms() - start;
166
167 keep_alive();
168
169 if (total > 5000) {
170 LOG_ERROR("SRST took too long to %s: %" PRId64 "ms", mode, total);
171 break;
172 }
173 }
174 }
175
176 void zy1000_reset(int trst, int srst)
177 {
178 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
179
180 /* flush the JTAG FIFO. Not flushing the queue before messing with
181 * reset has such interesting bugs as causing hard to reproduce
182 * RCLK bugs as RCLK will stop responding when TRST is asserted
183 */
184 waitIdle();
185
186 if (!srst)
187 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
188 else {
189 /* Danger!!! if clk != 0 when in
190 * idle in TAP_IDLE, reset halt on str912 will fail.
191 */
192 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
193
194 waitSRST(true);
195 }
196
197 if (!trst)
198 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
199 else {
200 /* assert reset */
201 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
202 }
203
204 if (trst || (srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST))) {
205 /* we're now in the RESET state until trst is deasserted */
206 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
207 } else {
208 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
209 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
210 }
211
212 /* wait for srst to float back up */
213 if ((!srst && ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST) == 0)) ||
214 (!srst && !trst && (jtag_get_reset_config() & RESET_TRST_PULLS_SRST)))
215 waitSRST(false);
216 }
217
218 int zy1000_speed(int speed)
219 {
220 /* flush JTAG master FIFO before setting speed */
221 waitIdle();
222
223 zy1000_rclk = false;
224
225 if (speed == 0) {
226 /*0 means RCLK*/
227 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
228 zy1000_rclk = true;
229 LOG_DEBUG("jtag_speed using RCLK");
230 } else {
231 if (speed > 8190 || speed < 2) {
232 LOG_USER(
233 "valid ZY1000 jtag_speed=[8190,2]. With divisor is %dkHz / even values between 8190-2, i.e. min %dHz, max %dMHz",
234 ZYLIN_KHZ,
235 (ZYLIN_KHZ * 1000) / 8190,
236 ZYLIN_KHZ / (2 * 1000));
237 return ERROR_COMMAND_SYNTAX_ERROR;
238 }
239
240 int khz;
241 speed &= ~1;
242 zy1000_speed_div(speed, &khz);
243 LOG_USER("jtag_speed %d => JTAG clk=%d kHz", speed, khz);
244 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
245 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed);
246 }
247 return ERROR_OK;
248 }
249
250 static bool savePower;
251
252 static void setPower(bool power)
253 {
254 savePower = power;
255 if (power)
256 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
257 else
258 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
259 }
260
261 COMMAND_HANDLER(handle_power_command)
262 {
263 switch (CMD_ARGC) {
264 case 1: {
265 bool enable;
266 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
267 setPower(enable);
268 /* fall through */
269 }
270 case 0:
271 LOG_INFO("Target power %s", savePower ? "on" : "off");
272 break;
273 default:
274 return ERROR_COMMAND_SYNTAX_ERROR;
275 }
276
277 return ERROR_OK;
278 }
279
280 #if !BUILD_ZY1000_MASTER
281 static char *tcp_server = "notspecified";
282 static int jim_zy1000_server(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
283 {
284 if (argc != 2)
285 return JIM_ERR;
286
287 tcp_server = strdup(Jim_GetString(argv[1], NULL));
288
289 return JIM_OK;
290 }
291 #endif
292
293 static int zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
294 int argc,
295 Jim_Obj * const *argv)
296 {
297 if (argc != 1) {
298 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
299 return JIM_ERR;
300 }
301
302 bool dropout = readPowerDropout();
303
304 Jim_SetResult(interp, Jim_NewIntObj(interp, dropout));
305
306 return JIM_OK;
307 }
308
309 int zy1000_quit(void)
310 {
311
312 return ERROR_OK;
313 }
314
315 int interface_jtag_execute_queue(void)
316 {
317 uint32_t empty;
318
319 waitIdle();
320
321 /* We must make sure to write data read back to memory location before we return
322 * from this fn
323 */
324 zy1000_flush_readqueue();
325
326 /* and handle any callbacks... */
327 zy1000_flush_callbackqueue();
328
329 if (zy1000_rclk) {
330 /* Only check for errors when using RCLK to speed up
331 * jtag over TCP/IP
332 */
333 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
334 /* clear JTAG error register */
335 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
336
337 if ((empty&0x400) != 0) {
338 LOG_WARNING("RCLK timeout");
339 /* the error is informative only as we don't want to break the firmware if there
340 * is a false positive.
341 */
342 /* return ERROR_FAIL; */
343 }
344 }
345 return ERROR_OK;
346 }
347
348 static void writeShiftValue(uint8_t *data, int bits);
349
350 /* here we shuffle N bits out/in */
351 static inline void scanBits(const uint8_t *out_value,
352 uint8_t *in_value,
353 int num_bits,
354 bool pause_now,
355 tap_state_t shiftState,
356 tap_state_t end_state)
357 {
358 tap_state_t pause_state = shiftState;
359 for (int j = 0; j < num_bits; j += 32) {
360 int k = num_bits - j;
361 if (k > 32) {
362 k = 32;
363 /* we have more to shift out */
364 } else if (pause_now) {
365 /* this was the last to shift out this time */
366 pause_state = end_state;
367 }
368
369 /* we have (num_bits + 7)/8 bytes of bits to toggle out. */
370 /* bits are pushed out LSB to MSB */
371 uint32_t value;
372 value = 0;
373 if (out_value != NULL) {
374 for (int l = 0; l < k; l += 8)
375 value |= out_value[(j + l)/8]<<l;
376 }
377 /* mask away unused bits for easier debugging */
378 if (k < 32)
379 value &= ~(((uint32_t)0xffffffff) << k);
380 else {
381 /* Shifting by >= 32 is not defined by the C standard
382 * and will in fact shift by &0x1f bits on nios */
383 }
384
385 shiftValueInner(shiftState, pause_state, k, value);
386
387 if (in_value != NULL)
388 writeShiftValue(in_value + (j/8), k);
389 }
390 }
391
392 static inline void scanFields(int num_fields,
393 const struct scan_field *fields,
394 tap_state_t shiftState,
395 tap_state_t end_state)
396 {
397 for (int i = 0; i < num_fields; i++) {
398 scanBits(fields[i].out_value,
399 fields[i].in_value,
400 fields[i].num_bits,
401 (i == num_fields-1),
402 shiftState,
403 end_state);
404 }
405 }
406
407 int interface_jtag_add_ir_scan(struct jtag_tap *active,
408 const struct scan_field *fields,
409 tap_state_t state)
410 {
411 int scan_size = 0;
412 struct jtag_tap *tap, *nextTap;
413 tap_state_t pause_state = TAP_IRSHIFT;
414
415 for (tap = jtag_tap_next_enabled(NULL); tap != NULL; tap = nextTap) {
416 nextTap = jtag_tap_next_enabled(tap);
417 if (nextTap == NULL)
418 pause_state = state;
419 scan_size = tap->ir_length;
420
421 /* search the list */
422 if (tap == active) {
423 scanFields(1, fields, TAP_IRSHIFT, pause_state);
424 /* update device information */
425 buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
426
427 tap->bypass = 0;
428 } else {
429 /* if a device isn't listed, set it to BYPASS */
430 assert(scan_size <= 32);
431 shiftValueInner(TAP_IRSHIFT, pause_state, scan_size, 0xffffffff);
432
433 /* Optimization code will check what the cur_instr is set to, so
434 * we must set it to bypass value.
435 */
436 buf_set_ones(tap->cur_instr, tap->ir_length);
437
438 tap->bypass = 1;
439 }
440 }
441
442 return ERROR_OK;
443 }
444
445 int interface_jtag_add_plain_ir_scan(int num_bits,
446 const uint8_t *out_bits,
447 uint8_t *in_bits,
448 tap_state_t state)
449 {
450 scanBits(out_bits, in_bits, num_bits, true, TAP_IRSHIFT, state);
451 return ERROR_OK;
452 }
453
454 int interface_jtag_add_dr_scan(struct jtag_tap *active,
455 int num_fields,
456 const struct scan_field *fields,
457 tap_state_t state)
458 {
459 struct jtag_tap *tap, *nextTap;
460 tap_state_t pause_state = TAP_DRSHIFT;
461 for (tap = jtag_tap_next_enabled(NULL); tap != NULL; tap = nextTap) {
462 nextTap = jtag_tap_next_enabled(tap);
463 if (nextTap == NULL)
464 pause_state = state;
465
466 /* Find a range of fields to write to this tap */
467 if (tap == active) {
468 assert(!tap->bypass);
469
470 scanFields(num_fields, fields, TAP_DRSHIFT, pause_state);
471 } else {
472 /* Shift out a 0 for disabled tap's */
473 assert(tap->bypass);
474 shiftValueInner(TAP_DRSHIFT, pause_state, 1, 0);
475 }
476 }
477 return ERROR_OK;
478 }
479
480 int interface_jtag_add_plain_dr_scan(int num_bits,
481 const uint8_t *out_bits,
482 uint8_t *in_bits,
483 tap_state_t state)
484 {
485 scanBits(out_bits, in_bits, num_bits, true, TAP_DRSHIFT, state);
486 return ERROR_OK;
487 }
488
489 int interface_jtag_add_tlr()
490 {
491 setCurrentState(TAP_RESET);
492 return ERROR_OK;
493 }
494
495 int interface_jtag_add_reset(int req_trst, int req_srst)
496 {
497 zy1000_reset(req_trst, req_srst);
498 return ERROR_OK;
499 }
500
501 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
502 {
503 /* num_cycles can be 0 */
504 setCurrentState(clockstate);
505
506 /* execute num_cycles, 32 at the time. */
507 int i;
508 for (i = 0; i < num_cycles; i += 32) {
509 int num;
510 num = 32;
511 if (num_cycles-i < num)
512 num = num_cycles-i;
513 shiftValueInner(clockstate, clockstate, num, 0);
514 }
515
516 #if !TEST_MANUAL()
517 /* finish in end_state */
518 setCurrentState(state);
519 #else
520 tap_state_t t = TAP_IDLE;
521 /* test manual drive code on any target */
522 int tms;
523 uint8_t tms_scan = tap_get_tms_path(t, state);
524 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
525
526 for (i = 0; i < tms_count; i++) {
527 tms = (tms_scan >> i) & 1;
528 waitIdle();
529 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
530 }
531 waitIdle();
532 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
533 #endif
534
535 return ERROR_OK;
536 }
537
538 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
539 {
540 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
541 }
542
543 int interface_jtag_add_clocks(int num_cycles)
544 {
545 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
546 }
547
548 int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
549 {
550 /*wait for the fifo to be empty*/
551 waitIdle();
552
553 for (unsigned i = 0; i < num_bits; i++) {
554 int tms;
555
556 if (((seq[i/8] >> (i % 8)) & 1) == 0)
557 tms = 0;
558 else
559 tms = 1;
560
561 waitIdle();
562 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
563 }
564
565 waitIdle();
566 if (state != TAP_INVALID)
567 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
568 else {
569 /* this would be normal if
570 * we are switching to SWD mode */
571 }
572 return ERROR_OK;
573 }
574
575 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
576 {
577 int state_count;
578 int tms = 0;
579
580 state_count = 0;
581
582 tap_state_t cur_state = cmd_queue_cur_state;
583
584 uint8_t seq[16];
585 memset(seq, 0, sizeof(seq));
586 assert(num_states < (int)((sizeof(seq) * 8)));
587
588 while (num_states) {
589 if (tap_state_transition(cur_state, false) == path[state_count])
590 tms = 0;
591 else if (tap_state_transition(cur_state, true) == path[state_count])
592 tms = 1;
593 else {
594 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
595 tap_state_name(cur_state), tap_state_name(path[state_count]));
596 exit(-1);
597 }
598
599 seq[state_count/8] = seq[state_count/8] | (tms << (state_count % 8));
600
601 cur_state = path[state_count];
602 state_count++;
603 num_states--;
604 }
605
606 return interface_add_tms_seq(state_count, seq, cur_state);
607 }
608
609 static void jtag_pre_post_bits(struct jtag_tap *tap, int *pre, int *post)
610 {
611 /* bypass bits before and after */
612 int pre_bits = 0;
613 int post_bits = 0;
614
615 bool found = false;
616 struct jtag_tap *cur_tap, *nextTap;
617 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap != NULL; cur_tap = nextTap) {
618 nextTap = jtag_tap_next_enabled(cur_tap);
619 if (cur_tap == tap)
620 found = true;
621 else {
622 if (found)
623 post_bits++;
624 else
625 pre_bits++;
626 }
627 }
628 *pre = pre_bits;
629 *post = post_bits;
630 }
631
632 void embeddedice_write_dcc(struct jtag_tap *tap,
633 int reg_addr,
634 const uint8_t *buffer,
635 int little,
636 int count)
637 {
638 #if 0
639 int i;
640 for (i = 0; i < count; i++) {
641 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer,
642 little));
643 buffer += 4;
644 }
645 #else
646 int pre_bits;
647 int post_bits;
648 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
649
650 if ((pre_bits > 32) || (post_bits + 6 > 32)) {
651 int i;
652 for (i = 0; i < count; i++) {
653 embeddedice_write_reg_inner(tap, reg_addr,
654 fast_target_buffer_get_u32(buffer, little));
655 buffer += 4;
656 }
657 } else {
658 int i;
659 for (i = 0; i < count; i++) {
660 /* Fewer pokes means we get to use the FIFO more efficiently */
661 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
662 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32,
663 fast_target_buffer_get_u32(buffer, little));
664 /* Danger! here we need to exit into the TAP_IDLE state to make
665 * DCC pick up this value.
666 */
667 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits,
668 (reg_addr | (1 << 5)));
669 buffer += 4;
670 }
671 }
672 #endif
673 }
674
675 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap *tap,
676 uint32_t opcode,
677 const uint32_t *data,
678 size_t count)
679 {
680 /* bypass bits before and after */
681 int pre_bits;
682 int post_bits;
683 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
684 post_bits += 2;
685
686 if ((pre_bits > 32) || (post_bits > 32)) {
687 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *,
688 uint32_t, const uint32_t *, size_t);
689 return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
690 } else {
691 static const uint8_t zero;
692
693 /* FIX!!!!!! the target_write_memory() API started this nasty problem
694 * with unaligned uint32_t * pointers... */
695 const uint8_t *t = (const uint8_t *)data;
696
697 while (--count > 0) {
698 #if 1
699 /* Danger! This code doesn't update cmd_queue_cur_state, so
700 * invoking jtag_add_pathmove() before jtag_add_dr_scan() after
701 * this loop would fail!
702 */
703 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
704
705 uint32_t value;
706 value = *t++;
707 value |= (*t++<<8);
708 value |= (*t++<<16);
709 value |= (*t++<<24);
710
711 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, value);
712 /* minimum 2 bits */
713 shiftValueInner(TAP_DRSHIFT, TAP_DRPAUSE, post_bits, 0);
714
715 /* copy & paste from arm11_dbgtap.c */
716 /* TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT,
717 * TAP_DRCAPTURE, TAP_DRSHIFT */
718 /* KLUDGE! we have to flush the fifo or the Nios CPU locks up.
719 * This is probably a bug in the Avalon bus(cross clocking bridge?)
720 * or in the jtag registers module.
721 */
722 waitIdle();
723 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
724 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
725 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
726 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
727 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
728 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
729 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
730 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
731 /* we don't have to wait for the queue to empty here */
732 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_DRSHIFT);
733 waitIdle();
734 #else
735 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] = {
736 TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE,
737 TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
738 };
739
740 struct scan_field fields[2] = {
741 { .num_bits = 32, .out_value = t },
742 { .num_bits = 2, .out_value = &zero },
743 };
744 t += 4;
745
746 jtag_add_dr_scan(tap,
747 2,
748 fields,
749 TAP_IDLE);
750
751 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
752 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
753 #endif
754 }
755
756 struct scan_field fields[2] = {
757 { .num_bits = 32, .out_value = t },
758 { .num_bits = 2, .out_value = &zero },
759 };
760
761 /* This will happen on the last iteration updating cmd_queue_cur_state
762 * so we don't have to track it during the common code path
763 */
764 jtag_add_dr_scan(tap,
765 2,
766 fields,
767 TAP_IDLE);
768
769 return jtag_execute_queue();
770 }
771 }
772
773 static const struct command_registration zy1000_commands[] = {
774 {
775 .name = "power",
776 .handler = handle_power_command,
777 .mode = COMMAND_ANY,
778 .help = "Turn power switch to target on/off. "
779 "With no arguments, prints status.",
780 .usage = "('on'|'off)",
781 },
782 #if !BUILD_ZY1000_MASTER
783 {
784 .name = "zy1000_server",
785 .mode = COMMAND_ANY,
786 .jim_handler = jim_zy1000_server,
787 .help = "Tcpip address for ZY1000 server.",
788 .usage = "address",
789 },
790 #endif
791 {
792 .name = "powerstatus",
793 .mode = COMMAND_ANY,
794 .jim_handler = zylinjtag_Jim_Command_powerstatus,
795 .help = "Returns power status of target",
796 },
797 COMMAND_REGISTRATION_DONE
798 };
799
800 #if !BUILD_ZY1000_MASTER
801
802 static int tcp_ip = -1;
803
804 /* Write large packets if we can */
805 static size_t out_pos;
806 static uint8_t out_buffer[16384];
807 static size_t in_pos;
808 static size_t in_write;
809 static uint8_t in_buffer[16384];
810
811 static bool flush_writes(void)
812 {
813 bool ok = (write(tcp_ip, out_buffer, out_pos) == (int)out_pos);
814 out_pos = 0;
815 return ok;
816 }
817
818 static bool writeLong(uint32_t l)
819 {
820 int i;
821 for (i = 0; i < 4; i++) {
822 uint8_t c = (l >> (i*8))&0xff;
823 out_buffer[out_pos++] = c;
824 if (out_pos >= sizeof(out_buffer)) {
825 if (!flush_writes())
826 return false;
827 }
828 }
829 return true;
830 }
831
832 static bool readLong(uint32_t *out_data)
833 {
834 uint32_t data = 0;
835 int i;
836 for (i = 0; i < 4; i++) {
837 uint8_t c;
838 if (in_pos == in_write) {
839 /* If we have some data that we can send, send them before
840 * we wait for more data
841 */
842 if (out_pos > 0) {
843 if (!flush_writes())
844 return false;
845 }
846
847 /* read more */
848 int t;
849 t = read(tcp_ip, in_buffer, sizeof(in_buffer));
850 if (t < 1)
851 return false;
852 in_write = (size_t) t;
853 in_pos = 0;
854 }
855 c = in_buffer[in_pos++];
856
857 data |= (c << (i*8));
858 }
859 *out_data = data;
860 return true;
861 }
862
863 enum ZY1000_CMD {
864 ZY1000_CMD_POKE = 0x0,
865 ZY1000_CMD_PEEK = 0x8,
866 ZY1000_CMD_SLEEP = 0x1,
867 ZY1000_CMD_WAITIDLE = 2
868 };
869
870 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
871 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
872
873 /* We initialize this late since we need to know the server address
874 * first.
875 */
876 static void tcpip_open(void)
877 {
878 if (tcp_ip >= 0)
879 return;
880
881 struct sockaddr_in echoServAddr;/* Echo server address */
882
883 /* Create a reliable, stream socket using TCP */
884 tcp_ip = socket(PF_INET, SOCK_STREAM, IPPROTO_TCP);
885 if (tcp_ip < 0) {
886 fprintf(stderr, "Failed to connect to zy1000 server\n");
887 exit(-1);
888 }
889
890 /* Construct the server address structure */
891 memset(&echoServAddr, 0, sizeof(echoServAddr)); /* Zero out structure */
892 echoServAddr.sin_family = AF_INET; /* Internet address family */
893 echoServAddr.sin_addr.s_addr = inet_addr(tcp_server); /* Server IP address */
894 echoServAddr.sin_port = htons(7777); /* Server port */
895
896 /* Establish the connection to the echo server */
897 if (connect(tcp_ip, (struct sockaddr *) &echoServAddr, sizeof(echoServAddr)) < 0) {
898 fprintf(stderr, "Failed to connect to zy1000 server\n");
899 exit(-1);
900 }
901
902 int flag = 1;
903 setsockopt(tcp_ip, /* socket affected */
904 IPPROTO_TCP, /* set option at TCP level */
905 TCP_NODELAY, /* name of option */
906 (char *)&flag, /* the cast is historical cruft */
907 sizeof(int)); /* length of option value */
908
909 }
910
911 /* send a poke */
912 void zy1000_tcpout(uint32_t address, uint32_t data)
913 {
914 tcpip_open();
915 if (!writeLong((ZY1000_CMD_POKE << 24) | address) || !writeLong(data)) {
916 fprintf(stderr, "Could not write to zy1000 server\n");
917 exit(-1);
918 }
919 }
920
921 /* By sending the wait to the server, we avoid a readback
922 * of status. Radically improves performance for this operation
923 * with long ping times.
924 */
925 void waitIdle(void)
926 {
927 tcpip_open();
928 if (!writeLong((ZY1000_CMD_WAITIDLE << 24))) {
929 fprintf(stderr, "Could not write to zy1000 server\n");
930 exit(-1);
931 }
932 }
933
934 uint32_t zy1000_tcpin(uint32_t address)
935 {
936 tcpip_open();
937
938 zy1000_flush_readqueue();
939
940 uint32_t data;
941 if (!writeLong((ZY1000_CMD_PEEK << 24) | address) || !readLong(&data)) {
942 fprintf(stderr, "Could not read from zy1000 server\n");
943 exit(-1);
944 }
945 return data;
946 }
947
948 int interface_jtag_add_sleep(uint32_t us)
949 {
950 tcpip_open();
951 if (!writeLong((ZY1000_CMD_SLEEP << 24)) || !writeLong(us)) {
952 fprintf(stderr, "Could not read from zy1000 server\n");
953 exit(-1);
954 }
955 return ERROR_OK;
956 }
957
958 /* queue a readback */
959 #define readqueue_size 16384
960 static struct {
961 uint8_t *dest;
962 int bits;
963 } readqueue[readqueue_size];
964
965 static int readqueue_pos;
966
967 /* flush the readqueue, this means reading any data that
968 * we're expecting and store them into the final position
969 */
970 void zy1000_flush_readqueue(void)
971 {
972 if (readqueue_pos == 0) {
973 /* simply debugging by allowing easy breakpoints when there
974 * is something to do. */
975 return;
976 }
977 int i;
978 tcpip_open();
979 for (i = 0; i < readqueue_pos; i++) {
980 uint32_t value;
981 if (!readLong(&value)) {
982 fprintf(stderr, "Could not read from zy1000 server\n");
983 exit(-1);
984 }
985
986 uint8_t *in_value = readqueue[i].dest;
987 int k = readqueue[i].bits;
988
989 /* we're shifting in data to MSB, shift data to be aligned for returning the value */
990 value >>= 32-k;
991
992 for (int l = 0; l < k; l += 8)
993 in_value[l/8] = (value >> l)&0xff;
994 }
995 readqueue_pos = 0;
996 }
997
998 /* By queuing the callback's we avoid flushing the
999 * read queue until jtag_execute_queue(). This can
1000 * reduce latency dramatically for cases where
1001 * callbacks are used extensively.
1002 */
1003 #define callbackqueue_size 128
1004 static struct callbackentry {
1005 jtag_callback_t callback;
1006 jtag_callback_data_t data0;
1007 jtag_callback_data_t data1;
1008 jtag_callback_data_t data2;
1009 jtag_callback_data_t data3;
1010 } callbackqueue[callbackqueue_size];
1011
1012 static int callbackqueue_pos;
1013
1014 void zy1000_jtag_add_callback4(jtag_callback_t callback,
1015 jtag_callback_data_t data0,
1016 jtag_callback_data_t data1,
1017 jtag_callback_data_t data2,
1018 jtag_callback_data_t data3)
1019 {
1020 if (callbackqueue_pos >= callbackqueue_size)
1021 zy1000_flush_callbackqueue();
1022
1023 callbackqueue[callbackqueue_pos].callback = callback;
1024 callbackqueue[callbackqueue_pos].data0 = data0;
1025 callbackqueue[callbackqueue_pos].data1 = data1;
1026 callbackqueue[callbackqueue_pos].data2 = data2;
1027 callbackqueue[callbackqueue_pos].data3 = data3;
1028 callbackqueue_pos++;
1029
1030 /* KLUDGE!
1031 * make callbacks synchronous for now as minidriver requires callback
1032 * to be synchronous.
1033 *
1034 * We can get away with making read and writes asynchronous so we
1035 * don't completely kill performance.
1036 */
1037 zy1000_flush_callbackqueue();
1038 }
1039
1040 static int zy1000_jtag_convert_to_callback4(jtag_callback_data_t data0,
1041 jtag_callback_data_t data1,
1042 jtag_callback_data_t data2,
1043 jtag_callback_data_t data3)
1044 {
1045 ((jtag_callback1_t)data1)(data0);
1046 return ERROR_OK;
1047 }
1048
1049 void zy1000_jtag_add_callback(jtag_callback1_t callback, jtag_callback_data_t data0)
1050 {
1051 zy1000_jtag_add_callback4(zy1000_jtag_convert_to_callback4,
1052 data0,
1053 (jtag_callback_data_t)callback,
1054 0,
1055 0);
1056 }
1057
1058 void zy1000_flush_callbackqueue(void)
1059 {
1060 /* we have to flush the read queue so we have access to
1061 the data the callbacks will use
1062 */
1063 zy1000_flush_readqueue();
1064 int i;
1065 for (i = 0; i < callbackqueue_pos; i++) {
1066 struct callbackentry *entry = &callbackqueue[i];
1067 jtag_set_error(entry->callback(entry->data0, entry->data1, entry->data2,
1068 entry->data3));
1069 }
1070 callbackqueue_pos = 0;
1071 }
1072
1073 static void writeShiftValue(uint8_t *data, int bits)
1074 {
1075 waitIdle();
1076
1077 if (!writeLong((ZY1000_CMD_PEEK << 24) | (ZY1000_JTAG_BASE + 0xc))) {
1078 fprintf(stderr, "Could not read from zy1000 server\n");
1079 exit(-1);
1080 }
1081
1082 if (readqueue_pos >= readqueue_size)
1083 zy1000_flush_readqueue();
1084
1085 readqueue[readqueue_pos].dest = data;
1086 readqueue[readqueue_pos].bits = bits;
1087 readqueue_pos++;
1088
1089 /* KLUDGE!!! minidriver requires readqueue to be synchronous */
1090 zy1000_flush_readqueue();
1091 }
1092
1093 #else
1094
1095 static void writeShiftValue(uint8_t *data, int bits)
1096 {
1097 uint32_t value;
1098 waitIdle();
1099 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
1100 VERBOSE(LOG_INFO("getShiftValue %08x", value));
1101
1102 /* data in, LSB to MSB */
1103 /* we're shifting in data to MSB, shift data to be aligned for returning the value */
1104 value >>= 32 - bits;
1105
1106 for (int l = 0; l < bits; l += 8)
1107 data[l/8] = (value >> l)&0xff;
1108 }
1109
1110 #endif
1111
1112 #if BUILD_ZY1000_MASTER
1113
1114 #ifdef WATCHDOG_BASE
1115 /* If we connect to port 8888 we must send a char every 10s or the board resets itself */
1116 static void watchdog_server(cyg_addrword_t data)
1117 {
1118 int so_reuseaddr_option = 1;
1119
1120 int fd = socket(AF_INET, SOCK_STREAM, 0);
1121 if (fd == -1) {
1122 LOG_ERROR("error creating socket: %s", strerror(errno));
1123 exit(-1);
1124 }
1125
1126 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void *) &so_reuseaddr_option,
1127 sizeof(int));
1128
1129 struct sockaddr_in sin;
1130 unsigned int address_size;
1131 address_size = sizeof(sin);
1132 memset(&sin, 0, sizeof(sin));
1133 sin.sin_family = AF_INET;
1134 sin.sin_addr.s_addr = INADDR_ANY;
1135 sin.sin_port = htons(8888);
1136
1137 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1) {
1138 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1139 exit(-1);
1140 }
1141
1142 if (listen(fd, 1) == -1) {
1143 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1144 exit(-1);
1145 }
1146
1147
1148 for (;; ) {
1149 int watchdog_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1150
1151 /* Start watchdog, must be reset every 10 seconds. */
1152 HAL_WRITE_UINT32(WATCHDOG_BASE + 4, 4);
1153
1154 if (watchdog_ip < 0) {
1155 LOG_ERROR("couldn't open watchdog socket: %s", strerror(errno));
1156 exit(-1);
1157 }
1158
1159 int flag = 1;
1160 setsockopt(watchdog_ip, /* socket affected */
1161 IPPROTO_TCP, /* set option at TCP level */
1162 TCP_NODELAY, /* name of option */
1163 (char *)&flag, /* the cast is historical cruft */
1164 sizeof(int)); /* length of option value */
1165
1166
1167 char buf;
1168 for (;; ) {
1169 if (read(watchdog_ip, &buf, 1) == 1) {
1170 /* Reset timer */
1171 HAL_WRITE_UINT32(WATCHDOG_BASE + 8, 0x1234);
1172 /* Echo so we can telnet in and see that resetting works */
1173 write(watchdog_ip, &buf, 1);
1174 } else {
1175 /* Stop tickling the watchdog, the CPU will reset in < 10 seconds
1176 * now.
1177 */
1178 return;
1179 }
1180
1181 }
1182
1183 /* Never reached */
1184 }
1185 }
1186 #endif
1187
1188 #endif
1189
1190 #if BUILD_ZY1000_MASTER
1191 int interface_jtag_add_sleep(uint32_t us)
1192 {
1193 jtag_sleep(us);
1194 return ERROR_OK;
1195 }
1196 #endif
1197
1198 #if BUILD_ZY1000_MASTER
1199 volatile void *zy1000_jtag_master;
1200 #include <sys/mman.h>
1201 #endif
1202
1203 int zy1000_init(void)
1204 {
1205 #if BUILD_ZY1000_MASTER
1206 int fd = open("/dev/mem", O_RDWR | O_SYNC);
1207 if (fd == -1) {
1208 LOG_ERROR("No access to /dev/mem");
1209 return ERROR_FAIL;
1210 }
1211 #ifndef REGISTERS_BASE
1212 #define REGISTERS_BASE 0x9002000
1213 #define REGISTERS_SPAN 128
1214 #endif
1215
1216 zy1000_jtag_master = mmap(0,
1217 REGISTERS_SPAN,
1218 PROT_READ | PROT_WRITE,
1219 MAP_SHARED,
1220 fd,
1221 REGISTERS_BASE);
1222
1223 if (zy1000_jtag_master == (void *) -1) {
1224 close(fd);
1225 LOG_ERROR("No access to /dev/mem");
1226 return ERROR_FAIL;
1227 }
1228 #endif
1229
1230 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); /* Turn on LED1 & LED2 */
1231
1232 setPower(true); /* on by default */
1233
1234 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1235 zy1000_reset(0, 0);
1236
1237 return ERROR_OK;
1238 }
1239
1240 struct jtag_interface zy1000_interface = {
1241 .name = "ZY1000",
1242 .supported = DEBUG_CAP_TMS_SEQ,
1243 .execute_queue = NULL,
1244 .speed = zy1000_speed,
1245 .commands = zy1000_commands,
1246 .init = zy1000_init,
1247 .quit = zy1000_quit,
1248 .khz = zy1000_khz,
1249 .speed_div = zy1000_speed_div,
1250 .power_dropout = zy1000_power_dropout,
1251 .srst_asserted = zy1000_srst_asserted,
1252 };