13685f85e821da7106248a6285fef6891be63192
[openocd.git] / src / jtag / zy1000 / zy1000.c
1 /***************************************************************************
2 * Copyright (C) 2007-2010 by √ėyvind Harboe *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
19
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
21 *
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
28 *
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
32 *
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
35 *
36 * See Zylin web pages or contact Zylin for more information.
37 *
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
42 * systems(PCs).
43 */
44 #ifdef HAVE_CONFIG_H
45 #include "config.h"
46 #endif
47
48 #include <target/embeddedice.h>
49 #include <jtag/minidriver.h>
50 #include <jtag/interface.h>
51 #include <time.h>
52 #include <helper/time_support.h>
53
54 #include <netinet/tcp.h>
55
56 #if BUILD_ECOSBOARD
57 #include "zy1000_version.h"
58
59 #include <cyg/hal/hal_io.h> // low level i/o
60 #include <cyg/hal/hal_diag.h>
61
62 #ifdef CYGPKG_HAL_NIOS2
63 #include <cyg/hal/io.h>
64 #include <cyg/firmwareutil/firmwareutil.h>
65 #endif
66
67 #define ZYLIN_VERSION GIT_ZY1000_VERSION
68 #define ZYLIN_DATE __DATE__
69 #define ZYLIN_TIME __TIME__
70 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
71 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
72
73 #endif
74
75 static int zy1000_khz(int khz, int *jtag_speed)
76 {
77 if (khz == 0)
78 {
79 *jtag_speed = 0;
80 }
81 else
82 {
83 *jtag_speed = 64000/khz;
84 }
85 return ERROR_OK;
86 }
87
88 static int zy1000_speed_div(int speed, int *khz)
89 {
90 if (speed == 0)
91 {
92 *khz = 0;
93 }
94 else
95 {
96 *khz = 64000/speed;
97 }
98
99 return ERROR_OK;
100 }
101
102 static bool readPowerDropout(void)
103 {
104 uint32_t state;
105 // sample and clear power dropout
106 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
107 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
108 bool powerDropout;
109 powerDropout = (state & 0x80) != 0;
110 return powerDropout;
111 }
112
113
114 static bool readSRST(void)
115 {
116 uint32_t state;
117 // sample and clear SRST sensing
118 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
119 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
120 bool srstAsserted;
121 srstAsserted = (state & 0x40) != 0;
122 return srstAsserted;
123 }
124
125 static int zy1000_srst_asserted(int *srst_asserted)
126 {
127 *srst_asserted = readSRST();
128 return ERROR_OK;
129 }
130
131 static int zy1000_power_dropout(int *dropout)
132 {
133 *dropout = readPowerDropout();
134 return ERROR_OK;
135 }
136
137 void zy1000_reset(int trst, int srst)
138 {
139 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
140
141 /* flush the JTAG FIFO. Not flushing the queue before messing with
142 * reset has such interesting bugs as causing hard to reproduce
143 * RCLK bugs as RCLK will stop responding when TRST is asserted
144 */
145 waitIdle();
146
147 if (!srst)
148 {
149 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
150 }
151 else
152 {
153 /* Danger!!! if clk != 0 when in
154 * idle in TAP_IDLE, reset halt on str912 will fail.
155 */
156 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
157 }
158
159 if (!trst)
160 {
161 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
162 }
163 else
164 {
165 /* assert reset */
166 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
167 }
168
169 if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
170 {
171 /* we're now in the RESET state until trst is deasserted */
172 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
173 } else
174 {
175 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
176 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
177 }
178
179 /* wait for srst to float back up */
180 if ((!srst && ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST) == 0))||
181 (!srst && !trst && (jtag_get_reset_config() & RESET_TRST_PULLS_SRST)))
182 {
183 bool first = true;
184 long long start = 0;
185 long total = 0;
186 for (;;)
187 {
188 // We don't want to sense our own reset, so we clear here.
189 // There is of course a timing hole where we could loose
190 // a "real" reset.
191 if (!readSRST())
192 {
193 if (total > 1)
194 {
195 LOG_USER("SRST took %dms to deassert", (int)total);
196 }
197 break;
198 }
199
200 if (first)
201 {
202 first = false;
203 start = timeval_ms();
204 }
205
206 total = timeval_ms() - start;
207
208 keep_alive();
209
210 if (total > 5000)
211 {
212 LOG_ERROR("SRST took too long to deassert: %dms", (int)total);
213 break;
214 }
215 }
216
217 }
218 }
219
220 int zy1000_speed(int speed)
221 {
222 /* flush JTAG master FIFO before setting speed */
223 waitIdle();
224
225 if (speed == 0)
226 {
227 /*0 means RCLK*/
228 speed = 0;
229 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
230 LOG_DEBUG("jtag_speed using RCLK");
231 }
232 else
233 {
234 if (speed > 8190 || speed < 2)
235 {
236 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. Divisor is 64MHz / even values between 8190-2, i.e. min 7814Hz, max 32MHz");
237 return ERROR_INVALID_ARGUMENTS;
238 }
239
240 LOG_USER("jtag_speed %d => JTAG clk=%f", speed, 64.0/(float)speed);
241 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
242 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed&~1);
243 }
244 return ERROR_OK;
245 }
246
247 static bool savePower;
248
249
250 static void setPower(bool power)
251 {
252 savePower = power;
253 if (power)
254 {
255 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
256 } else
257 {
258 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
259 }
260 }
261
262 COMMAND_HANDLER(handle_power_command)
263 {
264 switch (CMD_ARGC)
265 {
266 case 1: {
267 bool enable;
268 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
269 setPower(enable);
270 // fall through
271 }
272 case 0:
273 LOG_INFO("Target power %s", savePower ? "on" : "off");
274 break;
275 default:
276 return ERROR_INVALID_ARGUMENTS;
277 }
278
279 return ERROR_OK;
280 }
281
282 #if !BUILD_ECOSBOARD
283 static char *tcp_server = "notspecified";
284 static int jim_zy1000_server(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
285 {
286 if (argc != 2)
287 return JIM_ERR;
288
289 tcp_server = strdup(Jim_GetString(argv[1], NULL));
290
291 return JIM_OK;
292 }
293 #endif
294
295 #if BUILD_ECOSBOARD
296 /* Give TELNET a way to find out what version this is */
297 static int jim_zy1000_version(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
298 {
299 if ((argc < 1) || (argc > 3))
300 return JIM_ERR;
301 const char *version_str = NULL;
302
303 if (argc == 1)
304 {
305 version_str = ZYLIN_OPENOCD_VERSION;
306 } else
307 {
308 const char *str = Jim_GetString(argv[1], NULL);
309 const char *str2 = NULL;
310 if (argc > 2)
311 str2 = Jim_GetString(argv[2], NULL);
312 if (strcmp("openocd", str) == 0)
313 {
314 version_str = ZYLIN_OPENOCD;
315 }
316 else if (strcmp("zy1000", str) == 0)
317 {
318 version_str = ZYLIN_VERSION;
319 }
320 else if (strcmp("date", str) == 0)
321 {
322 version_str = ZYLIN_DATE;
323 }
324 else if (strcmp("time", str) == 0)
325 {
326 version_str = ZYLIN_TIME;
327 }
328 else if (strcmp("pcb", str) == 0)
329 {
330 #ifdef CYGPKG_HAL_NIOS2
331 version_str="c";
332 #else
333 version_str="b";
334 #endif
335 }
336 #ifdef CYGPKG_HAL_NIOS2
337 else if (strcmp("fpga", str) == 0)
338 {
339
340 /* return a list of 32 bit integers to describe the expected
341 * and actual FPGA
342 */
343 static char *fpga_id = "0x12345678 0x12345678 0x12345678 0x12345678";
344 uint32_t id, timestamp;
345 HAL_READ_UINT32(SYSID_BASE, id);
346 HAL_READ_UINT32(SYSID_BASE+4, timestamp);
347 sprintf(fpga_id, "0x%08x 0x%08x 0x%08x 0x%08x", id, timestamp, SYSID_ID, SYSID_TIMESTAMP);
348 version_str = fpga_id;
349 if ((argc>2) && (strcmp("time", str2) == 0))
350 {
351 time_t last_mod = timestamp;
352 char * t = ctime (&last_mod) ;
353 t[strlen(t)-1] = 0;
354 version_str = t;
355 }
356 }
357 #endif
358
359 else
360 {
361 return JIM_ERR;
362 }
363 }
364
365 Jim_SetResult(interp, Jim_NewStringObj(interp, version_str, -1));
366
367 return JIM_OK;
368 }
369 #endif
370
371 #ifdef CYGPKG_HAL_NIOS2
372
373
374 struct info_forward
375 {
376 void *data;
377 struct cyg_upgrade_info *upgraded_file;
378 };
379
380 static void report_info(void *data, const char * format, va_list args)
381 {
382 char *s = alloc_vprintf(format, args);
383 LOG_USER_N("%s", s);
384 free(s);
385 }
386
387 struct cyg_upgrade_info firmware_info =
388 {
389 (uint8_t *)0x84000000,
390 "/ram/firmware.phi",
391 "Firmware",
392 0x0300000,
393 0x1f00000 -
394 0x0300000,
395 "ZylinNiosFirmware\n",
396 report_info,
397 };
398
399 static int jim_zy1000_writefirmware(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
400 {
401 if (argc != 2)
402 return JIM_ERR;
403
404 int length;
405 const char *str = Jim_GetString(argv[1], &length);
406
407 /* */
408 int tmpFile;
409 if ((tmpFile = open(firmware_info.file, O_RDWR | O_CREAT | O_TRUNC)) <= 0)
410 {
411 return JIM_ERR;
412 }
413 bool success;
414 success = write(tmpFile, str, length) == length;
415 close(tmpFile);
416 if (!success)
417 return JIM_ERR;
418
419 if (!cyg_firmware_upgrade(NULL, firmware_info))
420 return JIM_ERR;
421
422 return JIM_OK;
423 }
424 #endif
425
426 static int
427 zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
428 int argc,
429 Jim_Obj * const *argv)
430 {
431 if (argc != 1)
432 {
433 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
434 return JIM_ERR;
435 }
436
437 bool dropout = readPowerDropout();
438
439 Jim_SetResult(interp, Jim_NewIntObj(interp, dropout));
440
441 return JIM_OK;
442 }
443
444
445
446 int zy1000_quit(void)
447 {
448
449 return ERROR_OK;
450 }
451
452
453
454 int interface_jtag_execute_queue(void)
455 {
456 uint32_t empty;
457
458 waitIdle();
459 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
460 /* clear JTAG error register */
461 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
462
463 if ((empty&0x400) != 0)
464 {
465 LOG_WARNING("RCLK timeout");
466 /* the error is informative only as we don't want to break the firmware if there
467 * is a false positive.
468 */
469 // return ERROR_FAIL;
470 }
471 return ERROR_OK;
472 }
473
474
475
476
477
478 static uint32_t getShiftValue(void)
479 {
480 uint32_t value;
481 waitIdle();
482 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
483 VERBOSE(LOG_INFO("getShiftValue %08x", value));
484 return value;
485 }
486 #if 0
487 static uint32_t getShiftValueFlip(void)
488 {
489 uint32_t value;
490 waitIdle();
491 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x18, value);
492 VERBOSE(LOG_INFO("getShiftValue %08x (flipped)", value));
493 return value;
494 }
495 #endif
496
497 #if 0
498 static void shiftValueInnerFlip(const tap_state_t state, const tap_state_t endState, int repeat, uint32_t value)
499 {
500 VERBOSE(LOG_INFO("shiftValueInner %s %s %d %08x (flipped)", tap_state_name(state), tap_state_name(endState), repeat, value));
501 uint32_t a,b;
502 a = state;
503 b = endState;
504 ZY1000_POKE(ZY1000_JTAG_BASE + 0xc, value);
505 ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (1 << 15) | (repeat << 8) | (a << 4) | b);
506 VERBOSE(getShiftValueFlip());
507 }
508 #endif
509
510 // here we shuffle N bits out/in
511 static __inline void scanBits(const uint8_t *out_value, uint8_t *in_value, int num_bits, bool pause, tap_state_t shiftState, tap_state_t end_state)
512 {
513 tap_state_t pause_state = shiftState;
514 for (int j = 0; j < num_bits; j += 32)
515 {
516 int k = num_bits - j;
517 if (k > 32)
518 {
519 k = 32;
520 /* we have more to shift out */
521 } else if (pause)
522 {
523 /* this was the last to shift out this time */
524 pause_state = end_state;
525 }
526
527 // we have (num_bits + 7)/8 bytes of bits to toggle out.
528 // bits are pushed out LSB to MSB
529 uint32_t value;
530 value = 0;
531 if (out_value != NULL)
532 {
533 for (int l = 0; l < k; l += 8)
534 {
535 value|=out_value[(j + l)/8]<<l;
536 }
537 }
538 /* mask away unused bits for easier debugging */
539 if (k < 32)
540 {
541 value&=~(((uint32_t)0xffffffff) << k);
542 } else
543 {
544 /* Shifting by >= 32 is not defined by the C standard
545 * and will in fact shift by &0x1f bits on nios */
546 }
547
548 shiftValueInner(shiftState, pause_state, k, value);
549
550 if (in_value != NULL)
551 {
552 // data in, LSB to MSB
553 value = getShiftValue();
554 // we're shifting in data to MSB, shift data to be aligned for returning the value
555 value >>= 32-k;
556
557 for (int l = 0; l < k; l += 8)
558 {
559 in_value[(j + l)/8]=(value >> l)&0xff;
560 }
561 }
562 }
563 }
564
565 static __inline void scanFields(int num_fields, const struct scan_field *fields, tap_state_t shiftState, tap_state_t end_state)
566 {
567 for (int i = 0; i < num_fields; i++)
568 {
569 scanBits(fields[i].out_value,
570 fields[i].in_value,
571 fields[i].num_bits,
572 (i == num_fields-1),
573 shiftState,
574 end_state);
575 }
576 }
577
578 int interface_jtag_add_ir_scan(struct jtag_tap *active, const struct scan_field *fields, tap_state_t state)
579 {
580 int scan_size = 0;
581 struct jtag_tap *tap, *nextTap;
582 tap_state_t pause_state = TAP_IRSHIFT;
583
584 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
585 {
586 nextTap = jtag_tap_next_enabled(tap);
587 if (nextTap==NULL)
588 {
589 pause_state = state;
590 }
591 scan_size = tap->ir_length;
592
593 /* search the list */
594 if (tap == active)
595 {
596 scanFields(1, fields, TAP_IRSHIFT, pause_state);
597 /* update device information */
598 buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
599
600 tap->bypass = 0;
601 } else
602 {
603 /* if a device isn't listed, set it to BYPASS */
604 assert(scan_size <= 32);
605 shiftValueInner(TAP_IRSHIFT, pause_state, scan_size, 0xffffffff);
606
607 tap->bypass = 1;
608 }
609 }
610
611 return ERROR_OK;
612 }
613
614
615
616
617
618 int interface_jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
619 {
620 scanBits(out_bits, in_bits, num_bits, true, TAP_IRSHIFT, state);
621 return ERROR_OK;
622 }
623
624 int interface_jtag_add_dr_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
625 {
626 struct jtag_tap *tap, *nextTap;
627 tap_state_t pause_state = TAP_DRSHIFT;
628 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
629 {
630 nextTap = jtag_tap_next_enabled(tap);
631 if (nextTap==NULL)
632 {
633 pause_state = state;
634 }
635
636 /* Find a range of fields to write to this tap */
637 if (tap == active)
638 {
639 assert(!tap->bypass);
640
641 scanFields(num_fields, fields, TAP_DRSHIFT, pause_state);
642 } else
643 {
644 /* Shift out a 0 for disabled tap's */
645 assert(tap->bypass);
646 shiftValueInner(TAP_DRSHIFT, pause_state, 1, 0);
647 }
648 }
649 return ERROR_OK;
650 }
651
652 int interface_jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
653 {
654 scanBits(out_bits, in_bits, num_bits, true, TAP_DRSHIFT, state);
655 return ERROR_OK;
656 }
657
658 int interface_jtag_add_tlr()
659 {
660 setCurrentState(TAP_RESET);
661 return ERROR_OK;
662 }
663
664
665 int interface_jtag_add_reset(int req_trst, int req_srst)
666 {
667 zy1000_reset(req_trst, req_srst);
668 return ERROR_OK;
669 }
670
671 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
672 {
673 /* num_cycles can be 0 */
674 setCurrentState(clockstate);
675
676 /* execute num_cycles, 32 at the time. */
677 int i;
678 for (i = 0; i < num_cycles; i += 32)
679 {
680 int num;
681 num = 32;
682 if (num_cycles-i < num)
683 {
684 num = num_cycles-i;
685 }
686 shiftValueInner(clockstate, clockstate, num, 0);
687 }
688
689 #if !TEST_MANUAL()
690 /* finish in end_state */
691 setCurrentState(state);
692 #else
693 tap_state_t t = TAP_IDLE;
694 /* test manual drive code on any target */
695 int tms;
696 uint8_t tms_scan = tap_get_tms_path(t, state);
697 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
698
699 for (i = 0; i < tms_count; i++)
700 {
701 tms = (tms_scan >> i) & 1;
702 waitIdle();
703 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
704 }
705 waitIdle();
706 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
707 #endif
708
709 return ERROR_OK;
710 }
711
712 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
713 {
714 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
715 }
716
717 int interface_jtag_add_clocks(int num_cycles)
718 {
719 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
720 }
721
722 int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
723 {
724 /*wait for the fifo to be empty*/
725 waitIdle();
726
727 for (unsigned i = 0; i < num_bits; i++)
728 {
729 int tms;
730
731 if (((seq[i/8] >> (i % 8)) & 1) == 0)
732 {
733 tms = 0;
734 }
735 else
736 {
737 tms = 1;
738 }
739
740 waitIdle();
741 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
742 }
743
744 waitIdle();
745 if (state != TAP_INVALID)
746 {
747 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
748 } else
749 {
750 /* this would be normal if we are switching to SWD mode */
751 }
752 return ERROR_OK;
753 }
754
755 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
756 {
757 int state_count;
758 int tms = 0;
759
760 state_count = 0;
761
762 tap_state_t cur_state = cmd_queue_cur_state;
763
764 uint8_t seq[16];
765 memset(seq, 0, sizeof(seq));
766 assert(num_states < (int)((sizeof(seq) * 8)));
767
768 while (num_states)
769 {
770 if (tap_state_transition(cur_state, false) == path[state_count])
771 {
772 tms = 0;
773 }
774 else if (tap_state_transition(cur_state, true) == path[state_count])
775 {
776 tms = 1;
777 }
778 else
779 {
780 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state), tap_state_name(path[state_count]));
781 exit(-1);
782 }
783
784 seq[state_count/8] = seq[state_count/8] | (tms << (state_count % 8));
785
786 cur_state = path[state_count];
787 state_count++;
788 num_states--;
789 }
790
791 return interface_add_tms_seq(state_count, seq, cur_state);
792 }
793
794 static void jtag_pre_post_bits(struct jtag_tap *tap, int *pre, int *post)
795 {
796 /* bypass bits before and after */
797 int pre_bits = 0;
798 int post_bits = 0;
799
800 bool found = false;
801 struct jtag_tap *cur_tap, *nextTap;
802 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
803 {
804 nextTap = jtag_tap_next_enabled(cur_tap);
805 if (cur_tap == tap)
806 {
807 found = true;
808 } else
809 {
810 if (found)
811 {
812 post_bits++;
813 } else
814 {
815 pre_bits++;
816 }
817 }
818 }
819 *pre = pre_bits;
820 *post = post_bits;
821 }
822
823 /*
824 static const int embeddedice_num_bits[] = {32, 6};
825 uint32_t values[2];
826
827 values[0] = value;
828 values[1] = (1 << 5) | reg_addr;
829
830 jtag_add_dr_out(tap,
831 2,
832 embeddedice_num_bits,
833 values,
834 TAP_IDLE);
835 */
836
837 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
838 {
839 #if 0
840 int i;
841 for (i = 0; i < count; i++)
842 {
843 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
844 buffer += 4;
845 }
846 #else
847 int pre_bits;
848 int post_bits;
849 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
850
851 if ((pre_bits > 32) || (post_bits + 6 > 32))
852 {
853 int i;
854 for (i = 0; i < count; i++)
855 {
856 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
857 buffer += 4;
858 }
859 } else
860 {
861 int i;
862 for (i = 0; i < count; i++)
863 {
864 /* Fewer pokes means we get to use the FIFO more efficiently */
865 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
866 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
867 /* Danger! here we need to exit into the TAP_IDLE state to make
868 * DCC pick up this value.
869 */
870 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits, (reg_addr | (1 << 5)));
871 buffer += 4;
872 }
873 }
874 #endif
875 }
876
877
878
879 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count)
880 {
881 #if 0
882 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count);
883 return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
884 #else
885 static const int bits[] = {32, 2};
886 uint32_t values[] = {0, 0};
887
888 /* FIX!!!!!! the target_write_memory() API started this nasty problem
889 * with unaligned uint32_t * pointers... */
890 const uint8_t *t = (const uint8_t *)data;
891
892
893 /* bypass bits before and after */
894 int pre_bits;
895 int post_bits;
896 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
897
898 bool found = false;
899 struct jtag_tap *cur_tap, *nextTap;
900 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
901 {
902 nextTap = jtag_tap_next_enabled(cur_tap);
903 if (cur_tap == tap)
904 {
905 found = true;
906 } else
907 {
908 if (found)
909 {
910 post_bits++;
911 } else
912 {
913 pre_bits++;
914 }
915 }
916 }
917
918 post_bits+=2;
919
920
921 while (--count > 0)
922 {
923 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
924
925 uint32_t value;
926 value = *t++;
927 value |= (*t++<<8);
928 value |= (*t++<<16);
929 value |= (*t++<<24);
930
931 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, value);
932 /* minimum 2 bits */
933 shiftValueInner(TAP_DRSHIFT, TAP_DRPAUSE, post_bits, 0);
934
935 #if 1
936 /* copy & paste from arm11_dbgtap.c */
937 //TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
938
939 waitIdle();
940 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
941 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
942 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
943 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
944 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
945 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
946 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
947 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
948 /* we don't have to wait for the queue to empty here. waitIdle(); */
949 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_DRSHIFT);
950 #else
951 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
952 {
953 TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
954 };
955
956 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
957 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
958 #endif
959 }
960
961 values[0] = *t++;
962 values[0] |= (*t++<<8);
963 values[0] |= (*t++<<16);
964 values[0] |= (*t++<<24);
965
966 /* This will happen on the last iteration updating the current tap state
967 * so we don't have to track it during the common code path */
968 jtag_add_dr_out(tap,
969 2,
970 bits,
971 values,
972 TAP_IDLE);
973
974 return jtag_execute_queue();
975 #endif
976 }
977
978
979 static const struct command_registration zy1000_commands[] = {
980 {
981 .name = "power",
982 .handler = handle_power_command,
983 .mode = COMMAND_ANY,
984 .help = "Turn power switch to target on/off. "
985 "With no arguments, prints status.",
986 .usage = "('on'|'off)",
987 },
988 #if BUILD_ECOSBOARD
989 {
990 .name = "zy1000_version",
991 .mode = COMMAND_ANY,
992 .jim_handler = jim_zy1000_version,
993 .help = "Print version info for zy1000.",
994 .usage = "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
995 },
996 #else
997 {
998 .name = "zy1000_server",
999 .mode = COMMAND_ANY,
1000 .jim_handler = jim_zy1000_server,
1001 .help = "Tcpip address for ZY1000 server.",
1002 .usage = "address",
1003 },
1004 #endif
1005 {
1006 .name = "powerstatus",
1007 .mode = COMMAND_ANY,
1008 .jim_handler = zylinjtag_Jim_Command_powerstatus,
1009 .help = "Returns power status of target",
1010 },
1011 #ifdef CYGPKG_HAL_NIOS2
1012 {
1013 .name = "updatezy1000firmware",
1014 .mode = COMMAND_ANY,
1015 .jim_handler = jim_zy1000_writefirmware,
1016 .help = "writes firmware to flash",
1017 /* .usage = "some_string", */
1018 },
1019 #endif
1020 COMMAND_REGISTRATION_DONE
1021 };
1022
1023
1024 static int tcp_ip = -1;
1025
1026 /* Write large packets if we can */
1027 static size_t out_pos;
1028 static uint8_t out_buffer[16384];
1029 static size_t in_pos;
1030 static size_t in_write;
1031 static uint8_t in_buffer[16384];
1032
1033 static bool flush_writes(void)
1034 {
1035 bool ok = (write(tcp_ip, out_buffer, out_pos) == (int)out_pos);
1036 out_pos = 0;
1037 return ok;
1038 }
1039
1040 static bool writeLong(uint32_t l)
1041 {
1042 int i;
1043 for (i = 0; i < 4; i++)
1044 {
1045 uint8_t c = (l >> (i*8))&0xff;
1046 out_buffer[out_pos++] = c;
1047 if (out_pos >= sizeof(out_buffer))
1048 {
1049 if (!flush_writes())
1050 {
1051 return false;
1052 }
1053 }
1054 }
1055 return true;
1056 }
1057
1058 static bool readLong(uint32_t *out_data)
1059 {
1060 if (out_pos > 0)
1061 {
1062 if (!flush_writes())
1063 {
1064 return false;
1065 }
1066 }
1067
1068 uint32_t data = 0;
1069 int i;
1070 for (i = 0; i < 4; i++)
1071 {
1072 uint8_t c;
1073 if (in_pos == in_write)
1074 {
1075 /* read more */
1076 int t;
1077 t = read(tcp_ip, in_buffer, sizeof(in_buffer));
1078 if (t < 1)
1079 {
1080 return false;
1081 }
1082 in_write = (size_t) t;
1083 in_pos = 0;
1084 }
1085 c = in_buffer[in_pos++];
1086
1087 data |= (c << (i*8));
1088 }
1089 *out_data = data;
1090 return true;
1091 }
1092
1093 enum ZY1000_CMD
1094 {
1095 ZY1000_CMD_POKE = 0x0,
1096 ZY1000_CMD_PEEK = 0x8,
1097 ZY1000_CMD_SLEEP = 0x1,
1098 };
1099
1100
1101 #if !BUILD_ECOSBOARD
1102
1103 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
1104 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
1105
1106 /* We initialize this late since we need to know the server address
1107 * first.
1108 */
1109 static void tcpip_open(void)
1110 {
1111 if (tcp_ip >= 0)
1112 return;
1113
1114 struct sockaddr_in echoServAddr; /* Echo server address */
1115
1116 /* Create a reliable, stream socket using TCP */
1117 if ((tcp_ip = socket(PF_INET, SOCK_STREAM, IPPROTO_TCP)) < 0)
1118 {
1119 fprintf(stderr, "Failed to connect to zy1000 server\n");
1120 exit(-1);
1121 }
1122
1123 /* Construct the server address structure */
1124 memset(&echoServAddr, 0, sizeof(echoServAddr)); /* Zero out structure */
1125 echoServAddr.sin_family = AF_INET; /* Internet address family */
1126 echoServAddr.sin_addr.s_addr = inet_addr(tcp_server); /* Server IP address */
1127 echoServAddr.sin_port = htons(7777); /* Server port */
1128
1129 /* Establish the connection to the echo server */
1130 if (connect(tcp_ip, (struct sockaddr *) &echoServAddr, sizeof(echoServAddr)) < 0)
1131 {
1132 fprintf(stderr, "Failed to connect to zy1000 server\n");
1133 exit(-1);
1134 }
1135
1136 int flag = 1;
1137 setsockopt(tcp_ip, /* socket affected */
1138 IPPROTO_TCP, /* set option at TCP level */
1139 TCP_NODELAY, /* name of option */
1140 (char *)&flag, /* the cast is historical cruft */
1141 sizeof(int)); /* length of option value */
1142
1143 }
1144
1145
1146 /* send a poke */
1147 void zy1000_tcpout(uint32_t address, uint32_t data)
1148 {
1149 tcpip_open();
1150 if (!writeLong((ZY1000_CMD_POKE << 24) | address)||
1151 !writeLong(data))
1152 {
1153 fprintf(stderr, "Could not write to zy1000 server\n");
1154 exit(-1);
1155 }
1156 }
1157
1158 uint32_t zy1000_tcpin(uint32_t address)
1159 {
1160 tcpip_open();
1161 uint32_t data;
1162 if (!writeLong((ZY1000_CMD_PEEK << 24) | address)||
1163 !readLong(&data))
1164 {
1165 fprintf(stderr, "Could not read from zy1000 server\n");
1166 exit(-1);
1167 }
1168 return data;
1169 }
1170
1171 int interface_jtag_add_sleep(uint32_t us)
1172 {
1173 tcpip_open();
1174 if (!writeLong((ZY1000_CMD_SLEEP << 24))||
1175 !writeLong(us))
1176 {
1177 fprintf(stderr, "Could not read from zy1000 server\n");
1178 exit(-1);
1179 }
1180 return ERROR_OK;
1181 }
1182
1183
1184 #endif
1185
1186 #if BUILD_ECOSBOARD
1187 static char tcpip_stack[2048];
1188 static cyg_thread tcpip_thread_object;
1189 static cyg_handle_t tcpip_thread_handle;
1190
1191 static char watchdog_stack[2048];
1192 static cyg_thread watchdog_thread_object;
1193 static cyg_handle_t watchdog_thread_handle;
1194
1195 /* Infinite loop peeking & poking */
1196 static void tcpipserver(void)
1197 {
1198 for (;;)
1199 {
1200 uint32_t address;
1201 if (!readLong(&address))
1202 return;
1203 enum ZY1000_CMD c = (address >> 24) & 0xff;
1204 address &= 0xffffff;
1205 switch (c)
1206 {
1207 case ZY1000_CMD_POKE:
1208 {
1209 uint32_t data;
1210 if (!readLong(&data))
1211 return;
1212 address &= ~0x80000000;
1213 ZY1000_POKE(address + ZY1000_JTAG_BASE, data);
1214 break;
1215 }
1216 case ZY1000_CMD_PEEK:
1217 {
1218 uint32_t data;
1219 ZY1000_PEEK(address + ZY1000_JTAG_BASE, data);
1220 if (!writeLong(data))
1221 return;
1222 break;
1223 }
1224 case ZY1000_CMD_SLEEP:
1225 {
1226 uint32_t data;
1227 if (!readLong(&data))
1228 return;
1229 jtag_sleep(data);
1230 break;
1231 }
1232 default:
1233 return;
1234 }
1235 }
1236 }
1237
1238
1239 static void tcpip_server(cyg_addrword_t data)
1240 {
1241 int so_reuseaddr_option = 1;
1242
1243 int fd;
1244 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1245 {
1246 LOG_ERROR("error creating socket: %s", strerror(errno));
1247 exit(-1);
1248 }
1249
1250 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1251 sizeof(int));
1252
1253 struct sockaddr_in sin;
1254 unsigned int address_size;
1255 address_size = sizeof(sin);
1256 memset(&sin, 0, sizeof(sin));
1257 sin.sin_family = AF_INET;
1258 sin.sin_addr.s_addr = INADDR_ANY;
1259 sin.sin_port = htons(7777);
1260
1261 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1262 {
1263 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1264 exit(-1);
1265 }
1266
1267 if (listen(fd, 1) == -1)
1268 {
1269 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1270 exit(-1);
1271 }
1272
1273
1274 for (;;)
1275 {
1276 tcp_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1277 if (tcp_ip < 0)
1278 {
1279 continue;
1280 }
1281
1282 int flag = 1;
1283 setsockopt(tcp_ip, /* socket affected */
1284 IPPROTO_TCP, /* set option at TCP level */
1285 TCP_NODELAY, /* name of option */
1286 (char *)&flag, /* the cast is historical cruft */
1287 sizeof(int)); /* length of option value */
1288
1289 bool save_poll = jtag_poll_get_enabled();
1290
1291 /* polling will screw up the "connection" */
1292 jtag_poll_set_enabled(false);
1293
1294 tcpipserver();
1295
1296 jtag_poll_set_enabled(save_poll);
1297
1298 close(tcp_ip);
1299
1300 }
1301 close(fd);
1302
1303 }
1304
1305 #ifdef WATCHDOG_BASE
1306 /* If we connect to port 8888 we must send a char every 10s or the board resets itself */
1307 static void watchdog_server(cyg_addrword_t data)
1308 {
1309 int so_reuseaddr_option = 1;
1310
1311 int fd;
1312 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1313 {
1314 LOG_ERROR("error creating socket: %s", strerror(errno));
1315 exit(-1);
1316 }
1317
1318 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1319 sizeof(int));
1320
1321 struct sockaddr_in sin;
1322 unsigned int address_size;
1323 address_size = sizeof(sin);
1324 memset(&sin, 0, sizeof(sin));
1325 sin.sin_family = AF_INET;
1326 sin.sin_addr.s_addr = INADDR_ANY;
1327 sin.sin_port = htons(8888);
1328
1329 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1330 {
1331 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1332 exit(-1);
1333 }
1334
1335 if (listen(fd, 1) == -1)
1336 {
1337 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1338 exit(-1);
1339 }
1340
1341
1342 for (;;)
1343 {
1344 int watchdog_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1345
1346 /* Start watchdog, must be reset every 10 seconds. */
1347 HAL_WRITE_UINT32(WATCHDOG_BASE + 4, 4);
1348
1349 if (watchdog_ip < 0)
1350 {
1351 LOG_ERROR("couldn't open watchdog socket: %s", strerror(errno));
1352 exit(-1);
1353 }
1354
1355 int flag = 1;
1356 setsockopt(watchdog_ip, /* socket affected */
1357 IPPROTO_TCP, /* set option at TCP level */
1358 TCP_NODELAY, /* name of option */
1359 (char *)&flag, /* the cast is historical cruft */
1360 sizeof(int)); /* length of option value */
1361
1362
1363 char buf;
1364 for (;;)
1365 {
1366 if (read(watchdog_ip, &buf, 1) == 1)
1367 {
1368 /* Reset timer */
1369 HAL_WRITE_UINT32(WATCHDOG_BASE + 8, 0x1234);
1370 /* Echo so we can telnet in and see that resetting works */
1371 write(watchdog_ip, &buf, 1);
1372 } else
1373 {
1374 /* Stop tickling the watchdog, the CPU will reset in < 10 seconds
1375 * now.
1376 */
1377 return;
1378 }
1379
1380 }
1381
1382 /* Never reached */
1383 }
1384 }
1385 #endif
1386
1387 int interface_jtag_add_sleep(uint32_t us)
1388 {
1389 jtag_sleep(us);
1390 return ERROR_OK;
1391 }
1392
1393 #endif
1394
1395
1396 int zy1000_init(void)
1397 {
1398 #if BUILD_ECOSBOARD
1399 LOG_USER("%s", ZYLIN_OPENOCD_VERSION);
1400 #endif
1401
1402 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); // Turn on LED1 & LED2
1403
1404 setPower(true); // on by default
1405
1406
1407 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1408 zy1000_reset(0, 0);
1409 zy1000_speed(jtag_get_speed());
1410
1411
1412 #if BUILD_ECOSBOARD
1413 cyg_thread_create(1, tcpip_server, (cyg_addrword_t) 0, "tcip/ip server",
1414 (void *) tcpip_stack, sizeof(tcpip_stack),
1415 &tcpip_thread_handle, &tcpip_thread_object);
1416 cyg_thread_resume(tcpip_thread_handle);
1417 #ifdef WATCHDOG_BASE
1418 cyg_thread_create(1, watchdog_server, (cyg_addrword_t) 0, "watchdog tcip/ip server",
1419 (void *) watchdog_stack, sizeof(watchdog_stack),
1420 &watchdog_thread_handle, &watchdog_thread_object);
1421 cyg_thread_resume(watchdog_thread_handle);
1422 #endif
1423 #endif
1424
1425 return ERROR_OK;
1426 }
1427
1428
1429
1430 struct jtag_interface zy1000_interface =
1431 {
1432 .name = "ZY1000",
1433 .supported = DEBUG_CAP_TMS_SEQ,
1434 .execute_queue = NULL,
1435 .speed = zy1000_speed,
1436 .commands = zy1000_commands,
1437 .init = zy1000_init,
1438 .quit = zy1000_quit,
1439 .khz = zy1000_khz,
1440 .speed_div = zy1000_speed_div,
1441 .power_dropout = zy1000_power_dropout,
1442 .srst_asserted = zy1000_srst_asserted,
1443 };
1444