src/jtag/drivers/usb_blaster/README.CheapClone

   1 USB Blaster Cheap Clone
   2 =======================
   3
   4 The Altera USB Blaster has a cheap clone, based on :
   5  - a Cypress CY7C68013A-56PVXC as the main chip
   6  - a 74HC244D as the output latch
   7  - a 24 MHz quartz
   8  - a EEPROM 24C64BN
   9
  10 The schematics (cut down to essential) is :
  11
  12                            /-----------------+----------------------\
  13      +--------------+      |                 |                      |
  14 USB--|  CY7C68013A  |      |  +----------+   |                      |
  15      |              |      |  | 74HC244D |   |                      |
  16      .              .      |  |          |   |                      |
  17      .              .      \--o 1     20 o   |     10 pins header   |
  18      |           47 o-- TCK --o 2     19 o---/        +-------+     |
  19      |           46 o-- TDO --o 3     18 o-- TCK -----o 1   2 o     |
  20      |           45 o-- TMS --o 4     17 o-- TDO -----o 3   4 o     |
  21      |           44 o         o 5     16 o-- TMS -----o 5   6 o     |
  22      |           43 o--       o 6     15 o            o 7   8 o     |
  23      |           42 o--       o 7     14 o         +--o 9  10 o     |
  24      |           41 o-- TDI --o 8     13 o-- ?     |  +-------+     |
  25      .           40 o-- nOE \ o 9     12 o-- TDI --+                |
  26      .              .       | o 10    11 o                          |
  27      o 28        29 o       | |          |                          |
  28      |              |       | +----------+                          |
  29      +--------------+       \                                       |
  30                              ---------------------------------------/
  31
  32 From this one can deduce that :
  33  - the cypress emulates the Altera chip
  34  - as the cypress pins used are 41-47, all output/input are controlled by 8051
  35    PortA.
  36  - as the 8051 is clocked at 24Mhz, and because each USB byte is handled by the
  37    8051, assuming a 40 instruction cycles per USB packet, the maximum throughput
  38    would be around 500 kHz.
  39
  40 Pinout
  41 ======
  42  Port A.0: nOE (output enable of 74HC244D)
  43  Port A.1: TDI
  44  Port A.5: TMS
  45  Port A.6: TDO
  46  Port A.7: TCK
  47
  48 Throughput considerations
  49 =========================
  50 Mesurements on a scope reveal that :
  51  - for bitbang mode, the throughtput is 56.5 kbits/s
  52    (as each clock transition is mesured at 17.7us)
  53  - for byteshift mode, the throughput is 107.7 kbits/s
  54    (as 63 bits TDI transmission is mesured in 585 us)
  55
  56 Let's suppose that to upload a 32 bits value, it is necessary to :
  57  - move from IDLE to DR-SHIFT : 3 bitbang (3 TMS transitions)
  58  - input the 32 bits of data : 1 byteshift (24 bits) + 8 bitbang (8 bits)
  59  - move from DR-SHIFT to IDLE : 5 bitbang (5 TMS transitions)
  60 So for this 32 bits of data, the time would be :
  61    3 * 17.7us + 1 * 585us/63*24 + 5 * 17.7us
  62  = 53.1us + 222us + 88.5us
  63  = 363us
  64
  65 Throughtput in bit/s: 32 * (1 / 363E-6) = 88000 bits/s
  66 Throughtput in bytes/s: 11kBytes/s
  67
  68 Conclusion
  69 ==========
  70 Contrary to the original USB Blaster, the cheap clone will never reach high
  71 transfer speeds over JTAG.