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[openocd.git] / src / jtag / drivers / stlink_usb.c
1 /***************************************************************************
2 * SWIM contributions by Ake Rehnman *
3 * Copyright (C) 2017 Ake Rehnman *
4 * ake.rehnman(at)gmail.com *
5 * *
6 * Copyright (C) 2011-2012 by Mathias Kuester *
7 * Mathias Kuester <kesmtp@freenet.de> *
8 * *
9 * Copyright (C) 2012 by Spencer Oliver *
10 * spen@spen-soft.co.uk *
11 * *
12 * This code is based on https://github.com/texane/stlink *
13 * *
14 * This program is free software; you can redistribute it and/or modify *
15 * it under the terms of the GNU General Public License as published by *
16 * the Free Software Foundation; either version 2 of the License, or *
17 * (at your option) any later version. *
18 * *
19 * This program is distributed in the hope that it will be useful, *
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
22 * GNU General Public License for more details. *
23 * *
24 * You should have received a copy of the GNU General Public License *
25 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
26 ***************************************************************************/
27
28 #ifdef HAVE_CONFIG_H
29 #include "config.h"
30 #endif
31
32 /* project specific includes */
33 #include <helper/binarybuffer.h>
34 #include <jtag/interface.h>
35 #include <jtag/hla/hla_layout.h>
36 #include <jtag/hla/hla_transport.h>
37 #include <jtag/hla/hla_interface.h>
38 #include <target/target.h>
39
40 #include <target/cortex_m.h>
41
42 #include "libusb_common.h"
43
44 #define ENDPOINT_IN 0x80
45 #define ENDPOINT_OUT 0x00
46
47 #define STLINK_WRITE_TIMEOUT 1000
48 #define STLINK_READ_TIMEOUT 1000
49
50 #define STLINK_NULL_EP 0
51 #define STLINK_RX_EP (1|ENDPOINT_IN)
52 #define STLINK_TX_EP (2|ENDPOINT_OUT)
53 #define STLINK_TRACE_EP (3|ENDPOINT_IN)
54
55 #define STLINK_V2_1_TX_EP (1|ENDPOINT_OUT)
56 #define STLINK_V2_1_TRACE_EP (2|ENDPOINT_IN)
57
58 #define STLINK_SG_SIZE (31)
59 #define STLINK_DATA_SIZE (4096)
60 #define STLINK_CMD_SIZE_V2 (16)
61 #define STLINK_CMD_SIZE_V1 (10)
62
63 #define STLINK_V1_PID (0x3744)
64 #define STLINK_V2_PID (0x3748)
65 #define STLINK_V2_1_PID (0x374B)
66 #define STLINK_V2_1_NO_MSD_PID (0x3752)
67
68 /* the current implementation of the stlink limits
69 * 8bit read/writes to max 64 bytes. */
70 #define STLINK_MAX_RW8 (64)
71
72 /* "WAIT" responses will be retried (with exponential backoff) at
73 * most this many times before failing to caller.
74 */
75 #define MAX_WAIT_RETRIES 8
76
77 enum stlink_jtag_api_version {
78 STLINK_JTAG_API_V1 = 1,
79 STLINK_JTAG_API_V2,
80 };
81
82 /** */
83 struct stlink_usb_version {
84 /** */
85 int stlink;
86 /** */
87 int jtag;
88 /** */
89 int swim;
90 /** highest supported jtag api version */
91 enum stlink_jtag_api_version jtag_api_max;
92 /** one bit for each feature supported. See macros STLINK_F_* */
93 uint32_t flags;
94 };
95
96 /** */
97 struct stlink_usb_handle_s {
98 /** */
99 struct jtag_libusb_device_handle *fd;
100 /** */
101 struct libusb_transfer *trans;
102 /** */
103 uint8_t rx_ep;
104 /** */
105 uint8_t tx_ep;
106 /** */
107 uint8_t trace_ep;
108 /** */
109 uint8_t cmdbuf[STLINK_SG_SIZE];
110 /** */
111 uint8_t cmdidx;
112 /** */
113 uint8_t direction;
114 /** */
115 uint8_t databuf[STLINK_DATA_SIZE];
116 /** */
117 uint32_t max_mem_packet;
118 /** */
119 enum hl_transports transport;
120 /** */
121 struct stlink_usb_version version;
122 /** */
123 uint16_t vid;
124 /** */
125 uint16_t pid;
126 /** this is the currently used jtag api */
127 enum stlink_jtag_api_version jtag_api;
128 /** */
129 struct {
130 /** whether SWO tracing is enabled or not */
131 bool enabled;
132 /** trace module source clock */
133 uint32_t source_hz;
134 } trace;
135 /** reconnect is needed next time we try to query the
136 * status */
137 bool reconnect_pending;
138 };
139
140 #define STLINK_SWIM_ERR_OK 0x00
141 #define STLINK_SWIM_BUSY 0x01
142 #define STLINK_DEBUG_ERR_OK 0x80
143 #define STLINK_DEBUG_ERR_FAULT 0x81
144 #define STLINK_SWD_AP_WAIT 0x10
145 #define STLINK_SWD_AP_FAULT 0x11
146 #define STLINK_SWD_AP_ERROR 0x12
147 #define STLINK_SWD_AP_PARITY_ERROR 0x13
148 #define STLINK_JTAG_WRITE_ERROR 0x0c
149 #define STLINK_JTAG_WRITE_VERIF_ERROR 0x0d
150 #define STLINK_SWD_DP_WAIT 0x14
151 #define STLINK_SWD_DP_FAULT 0x15
152 #define STLINK_SWD_DP_ERROR 0x16
153 #define STLINK_SWD_DP_PARITY_ERROR 0x17
154
155 #define STLINK_SWD_AP_WDATA_ERROR 0x18
156 #define STLINK_SWD_AP_STICKY_ERROR 0x19
157 #define STLINK_SWD_AP_STICKYORUN_ERROR 0x1a
158
159 #define STLINK_CORE_RUNNING 0x80
160 #define STLINK_CORE_HALTED 0x81
161 #define STLINK_CORE_STAT_UNKNOWN -1
162
163 #define STLINK_GET_VERSION 0xF1
164 #define STLINK_DEBUG_COMMAND 0xF2
165 #define STLINK_DFU_COMMAND 0xF3
166 #define STLINK_SWIM_COMMAND 0xF4
167 #define STLINK_GET_CURRENT_MODE 0xF5
168 #define STLINK_GET_TARGET_VOLTAGE 0xF7
169
170 #define STLINK_DEV_DFU_MODE 0x00
171 #define STLINK_DEV_MASS_MODE 0x01
172 #define STLINK_DEV_DEBUG_MODE 0x02
173 #define STLINK_DEV_SWIM_MODE 0x03
174 #define STLINK_DEV_BOOTLOADER_MODE 0x04
175 #define STLINK_DEV_UNKNOWN_MODE -1
176
177 #define STLINK_DFU_EXIT 0x07
178
179 /*
180 STLINK_SWIM_ENTER_SEQ
181 1.3ms low then 750Hz then 1.5kHz
182
183 STLINK_SWIM_GEN_RST
184 STM8 DM pulls reset pin low 50us
185
186 STLINK_SWIM_SPEED
187 uint8_t (0=low|1=high)
188
189 STLINK_SWIM_WRITEMEM
190 uint16_t length
191 uint32_t address
192
193 STLINK_SWIM_RESET
194 send syncronization seq (16us low, response 64 clocks low)
195 */
196 #define STLINK_SWIM_ENTER 0x00
197 #define STLINK_SWIM_EXIT 0x01
198 #define STLINK_SWIM_READ_CAP 0x02
199 #define STLINK_SWIM_SPEED 0x03
200 #define STLINK_SWIM_ENTER_SEQ 0x04
201 #define STLINK_SWIM_GEN_RST 0x05
202 #define STLINK_SWIM_RESET 0x06
203 #define STLINK_SWIM_ASSERT_RESET 0x07
204 #define STLINK_SWIM_DEASSERT_RESET 0x08
205 #define STLINK_SWIM_READSTATUS 0x09
206 #define STLINK_SWIM_WRITEMEM 0x0a
207 #define STLINK_SWIM_READMEM 0x0b
208 #define STLINK_SWIM_READBUF 0x0c
209
210 #define STLINK_DEBUG_ENTER_JTAG 0x00
211 #define STLINK_DEBUG_GETSTATUS 0x01
212 #define STLINK_DEBUG_FORCEDEBUG 0x02
213 #define STLINK_DEBUG_APIV1_RESETSYS 0x03
214 #define STLINK_DEBUG_APIV1_READALLREGS 0x04
215 #define STLINK_DEBUG_APIV1_READREG 0x05
216 #define STLINK_DEBUG_APIV1_WRITEREG 0x06
217 #define STLINK_DEBUG_READMEM_32BIT 0x07
218 #define STLINK_DEBUG_WRITEMEM_32BIT 0x08
219 #define STLINK_DEBUG_RUNCORE 0x09
220 #define STLINK_DEBUG_STEPCORE 0x0a
221 #define STLINK_DEBUG_APIV1_SETFP 0x0b
222 #define STLINK_DEBUG_READMEM_8BIT 0x0c
223 #define STLINK_DEBUG_WRITEMEM_8BIT 0x0d
224 #define STLINK_DEBUG_APIV1_CLEARFP 0x0e
225 #define STLINK_DEBUG_APIV1_WRITEDEBUGREG 0x0f
226 #define STLINK_DEBUG_APIV1_SETWATCHPOINT 0x10
227
228 #define STLINK_DEBUG_ENTER_JTAG 0x00
229 #define STLINK_DEBUG_ENTER_SWD 0xa3
230
231 #define STLINK_DEBUG_APIV1_ENTER 0x20
232 #define STLINK_DEBUG_EXIT 0x21
233 #define STLINK_DEBUG_READCOREID 0x22
234
235 #define STLINK_DEBUG_APIV2_ENTER 0x30
236 #define STLINK_DEBUG_APIV2_READ_IDCODES 0x31
237 #define STLINK_DEBUG_APIV2_RESETSYS 0x32
238 #define STLINK_DEBUG_APIV2_READREG 0x33
239 #define STLINK_DEBUG_APIV2_WRITEREG 0x34
240 #define STLINK_DEBUG_APIV2_WRITEDEBUGREG 0x35
241 #define STLINK_DEBUG_APIV2_READDEBUGREG 0x36
242
243 #define STLINK_DEBUG_APIV2_READALLREGS 0x3A
244 #define STLINK_DEBUG_APIV2_GETLASTRWSTATUS 0x3B
245 #define STLINK_DEBUG_APIV2_DRIVE_NRST 0x3C
246
247 #define STLINK_DEBUG_APIV2_START_TRACE_RX 0x40
248 #define STLINK_DEBUG_APIV2_STOP_TRACE_RX 0x41
249 #define STLINK_DEBUG_APIV2_GET_TRACE_NB 0x42
250 #define STLINK_DEBUG_APIV2_SWD_SET_FREQ 0x43
251 #define STLINK_DEBUG_APIV2_JTAG_SET_FREQ 0x44
252
253 #define STLINK_DEBUG_APIV2_READMEM_16BIT 0x47
254 #define STLINK_DEBUG_APIV2_WRITEMEM_16BIT 0x48
255
256 #define STLINK_DEBUG_APIV2_DRIVE_NRST_LOW 0x00
257 #define STLINK_DEBUG_APIV2_DRIVE_NRST_HIGH 0x01
258 #define STLINK_DEBUG_APIV2_DRIVE_NRST_PULSE 0x02
259
260 #define STLINK_TRACE_SIZE 4096
261 #define STLINK_TRACE_MAX_HZ 2000000
262
263 /** */
264 enum stlink_mode {
265 STLINK_MODE_UNKNOWN = 0,
266 STLINK_MODE_DFU,
267 STLINK_MODE_MASS,
268 STLINK_MODE_DEBUG_JTAG,
269 STLINK_MODE_DEBUG_SWD,
270 STLINK_MODE_DEBUG_SWIM
271 };
272
273 #define REQUEST_SENSE 0x03
274 #define REQUEST_SENSE_LENGTH 18
275
276 /*
277 * Map the relevant features, quirks and workaround for specific firmware
278 * version of stlink
279 */
280 #define STLINK_F_HAS_TRACE (1UL << 0)
281 #define STLINK_F_HAS_SWD_SET_FREQ (1UL << 1)
282 #define STLINK_F_HAS_JTAG_SET_FREQ (1UL << 2)
283 #define STLINK_F_HAS_MEM_16BIT (1UL << 3)
284
285 /* aliases */
286 #define STLINK_F_HAS_TARGET_VOLT STLINK_F_HAS_TRACE
287
288 struct speed_map {
289 int speed;
290 int speed_divisor;
291 };
292
293 /* SWD clock speed */
294 static const struct speed_map stlink_khz_to_speed_map_swd[] = {
295 {4000, 0},
296 {1800, 1}, /* default */
297 {1200, 2},
298 {950, 3},
299 {480, 7},
300 {240, 15},
301 {125, 31},
302 {100, 40},
303 {50, 79},
304 {25, 158},
305 {15, 265},
306 {5, 798}
307 };
308
309 /* JTAG clock speed */
310 static const struct speed_map stlink_khz_to_speed_map_jtag[] = {
311 {18000, 2},
312 {9000, 4},
313 {4500, 8},
314 {2250, 16},
315 {1125, 32}, /* default */
316 {562, 64},
317 {281, 128},
318 {140, 256}
319 };
320
321 static void stlink_usb_init_buffer(void *handle, uint8_t direction, uint32_t size);
322 static int stlink_swim_status(void *handle);
323
324 /** */
325 static int stlink_usb_xfer_v1_get_status(void *handle)
326 {
327 struct stlink_usb_handle_s *h = handle;
328
329 assert(handle != NULL);
330
331 /* read status */
332 memset(h->cmdbuf, 0, STLINK_SG_SIZE);
333
334 if (jtag_libusb_bulk_read(h->fd, h->rx_ep, (char *)h->cmdbuf,
335 13, STLINK_READ_TIMEOUT) != 13)
336 return ERROR_FAIL;
337
338 uint32_t t1;
339
340 t1 = buf_get_u32(h->cmdbuf, 0, 32);
341
342 /* check for USBS */
343 if (t1 != 0x53425355)
344 return ERROR_FAIL;
345 /*
346 * CSW status:
347 * 0 success
348 * 1 command failure
349 * 2 phase error
350 */
351 if (h->cmdbuf[12] != 0)
352 return ERROR_FAIL;
353
354 return ERROR_OK;
355 }
356
357 /** */
358 static int stlink_usb_xfer_rw(void *handle, int cmdsize, const uint8_t *buf, int size)
359 {
360 struct stlink_usb_handle_s *h = handle;
361
362 assert(handle != NULL);
363
364 if (jtag_libusb_bulk_write(h->fd, h->tx_ep, (char *)h->cmdbuf, cmdsize,
365 STLINK_WRITE_TIMEOUT) != cmdsize) {
366 return ERROR_FAIL;
367 }
368
369 if (h->direction == h->tx_ep && size) {
370 if (jtag_libusb_bulk_write(h->fd, h->tx_ep, (char *)buf,
371 size, STLINK_WRITE_TIMEOUT) != size) {
372 LOG_DEBUG("bulk write failed");
373 return ERROR_FAIL;
374 }
375 } else if (h->direction == h->rx_ep && size) {
376 if (jtag_libusb_bulk_read(h->fd, h->rx_ep, (char *)buf,
377 size, STLINK_READ_TIMEOUT) != size) {
378 LOG_DEBUG("bulk read failed");
379 return ERROR_FAIL;
380 }
381 }
382
383 return ERROR_OK;
384 }
385
386 /** */
387 static int stlink_usb_xfer_v1_get_sense(void *handle)
388 {
389 int res;
390 struct stlink_usb_handle_s *h = handle;
391
392 assert(handle != NULL);
393
394 stlink_usb_init_buffer(handle, h->rx_ep, 16);
395
396 h->cmdbuf[h->cmdidx++] = REQUEST_SENSE;
397 h->cmdbuf[h->cmdidx++] = 0;
398 h->cmdbuf[h->cmdidx++] = 0;
399 h->cmdbuf[h->cmdidx++] = 0;
400 h->cmdbuf[h->cmdidx++] = REQUEST_SENSE_LENGTH;
401
402 res = stlink_usb_xfer_rw(handle, REQUEST_SENSE_LENGTH, h->databuf, 16);
403
404 if (res != ERROR_OK)
405 return res;
406
407 if (stlink_usb_xfer_v1_get_status(handle) != ERROR_OK)
408 return ERROR_FAIL;
409
410 return ERROR_OK;
411 }
412
413 /*
414 transfers block in cmdbuf
415 <size> indicates number of bytes in the following
416 data phase.
417 */
418 static int stlink_usb_xfer(void *handle, const uint8_t *buf, int size)
419 {
420 int err, cmdsize = STLINK_CMD_SIZE_V2;
421 struct stlink_usb_handle_s *h = handle;
422
423 assert(handle != NULL);
424
425 if (h->version.stlink == 1) {
426 cmdsize = STLINK_SG_SIZE;
427 /* put length in bCBWCBLength */
428 h->cmdbuf[14] = h->cmdidx-15;
429 }
430
431 err = stlink_usb_xfer_rw(handle, cmdsize, buf, size);
432
433 if (err != ERROR_OK)
434 return err;
435
436 if (h->version.stlink == 1) {
437 if (stlink_usb_xfer_v1_get_status(handle) != ERROR_OK) {
438 /* check csw status */
439 if (h->cmdbuf[12] == 1) {
440 LOG_DEBUG("get sense");
441 if (stlink_usb_xfer_v1_get_sense(handle) != ERROR_OK)
442 return ERROR_FAIL;
443 }
444 return ERROR_FAIL;
445 }
446 }
447
448 return ERROR_OK;
449 }
450
451 /**
452 Converts an STLINK status code held in the first byte of a response
453 to an openocd error, logs any error/wait status as debug output.
454 */
455 static int stlink_usb_error_check(void *handle)
456 {
457 struct stlink_usb_handle_s *h = handle;
458
459 assert(handle != NULL);
460
461 if (h->transport == HL_TRANSPORT_SWIM) {
462 switch (h->databuf[0]) {
463 case STLINK_SWIM_ERR_OK:
464 return ERROR_OK;
465 case STLINK_SWIM_BUSY:
466 return ERROR_WAIT;
467 default:
468 LOG_DEBUG("unknown/unexpected STLINK status code 0x%x", h->databuf[0]);
469 return ERROR_FAIL;
470 }
471 }
472
473 /* TODO: no error checking yet on api V1 */
474 if (h->jtag_api == STLINK_JTAG_API_V1)
475 h->databuf[0] = STLINK_DEBUG_ERR_OK;
476
477 switch (h->databuf[0]) {
478 case STLINK_DEBUG_ERR_OK:
479 return ERROR_OK;
480 case STLINK_DEBUG_ERR_FAULT:
481 LOG_DEBUG("SWD fault response (0x%x)", STLINK_DEBUG_ERR_FAULT);
482 return ERROR_FAIL;
483 case STLINK_SWD_AP_WAIT:
484 LOG_DEBUG("wait status SWD_AP_WAIT (0x%x)", STLINK_SWD_AP_WAIT);
485 return ERROR_WAIT;
486 case STLINK_SWD_DP_WAIT:
487 LOG_DEBUG("wait status SWD_DP_WAIT (0x%x)", STLINK_SWD_DP_WAIT);
488 return ERROR_WAIT;
489 case STLINK_JTAG_WRITE_ERROR:
490 LOG_DEBUG("Write error");
491 return ERROR_FAIL;
492 case STLINK_JTAG_WRITE_VERIF_ERROR:
493 LOG_DEBUG("Write verify error, ignoring");
494 return ERROR_OK;
495 case STLINK_SWD_AP_FAULT:
496 /* git://git.ac6.fr/openocd commit 657e3e885b9ee10
497 * returns ERROR_OK with the comment:
498 * Change in error status when reading outside RAM.
499 * This fix allows CDT plugin to visualize memory.
500 */
501 LOG_DEBUG("STLINK_SWD_AP_FAULT");
502 return ERROR_FAIL;
503 case STLINK_SWD_AP_ERROR:
504 LOG_DEBUG("STLINK_SWD_AP_ERROR");
505 return ERROR_FAIL;
506 case STLINK_SWD_AP_PARITY_ERROR:
507 LOG_DEBUG("STLINK_SWD_AP_PARITY_ERROR");
508 return ERROR_FAIL;
509 case STLINK_SWD_DP_FAULT:
510 LOG_DEBUG("STLINK_SWD_DP_FAULT");
511 return ERROR_FAIL;
512 case STLINK_SWD_DP_ERROR:
513 LOG_DEBUG("STLINK_SWD_DP_ERROR");
514 return ERROR_FAIL;
515 case STLINK_SWD_DP_PARITY_ERROR:
516 LOG_DEBUG("STLINK_SWD_DP_PARITY_ERROR");
517 return ERROR_FAIL;
518 case STLINK_SWD_AP_WDATA_ERROR:
519 LOG_DEBUG("STLINK_SWD_AP_WDATA_ERROR");
520 return ERROR_FAIL;
521 case STLINK_SWD_AP_STICKY_ERROR:
522 LOG_DEBUG("STLINK_SWD_AP_STICKY_ERROR");
523 return ERROR_FAIL;
524 case STLINK_SWD_AP_STICKYORUN_ERROR:
525 LOG_DEBUG("STLINK_SWD_AP_STICKYORUN_ERROR");
526 return ERROR_FAIL;
527 default:
528 LOG_DEBUG("unknown/unexpected STLINK status code 0x%x", h->databuf[0]);
529 return ERROR_FAIL;
530 }
531 }
532
533
534 /** Issue an STLINK command via USB transfer, with retries on any wait status responses.
535
536 Works for commands where the STLINK_DEBUG status is returned in the first
537 byte of the response packet. For SWIM a SWIM_READSTATUS is requested instead.
538
539 Returns an openocd result code.
540 */
541 static int stlink_cmd_allow_retry(void *handle, const uint8_t *buf, int size)
542 {
543 int retries = 0;
544 int res;
545 struct stlink_usb_handle_s *h = handle;
546
547 while (1) {
548 if ((h->transport != HL_TRANSPORT_SWIM) || !retries) {
549 res = stlink_usb_xfer(handle, buf, size);
550 if (res != ERROR_OK)
551 return res;
552 }
553
554 if (h->transport == HL_TRANSPORT_SWIM) {
555 res = stlink_swim_status(handle);
556 if (res != ERROR_OK)
557 return res;
558 }
559
560 res = stlink_usb_error_check(handle);
561 if (res == ERROR_WAIT && retries < MAX_WAIT_RETRIES) {
562 usleep((1<<retries++) * 1000);
563 continue;
564 }
565 return res;
566 }
567 }
568
569 /** */
570 static int stlink_usb_read_trace(void *handle, const uint8_t *buf, int size)
571 {
572 struct stlink_usb_handle_s *h = handle;
573
574 assert(handle != NULL);
575
576 assert(h->version.flags & STLINK_F_HAS_TRACE);
577
578 if (jtag_libusb_bulk_read(h->fd, h->trace_ep, (char *)buf,
579 size, STLINK_READ_TIMEOUT) != size) {
580 LOG_ERROR("bulk trace read failed");
581 return ERROR_FAIL;
582 }
583
584 return ERROR_OK;
585 }
586
587 /*
588 this function writes transfer length in
589 the right place in the cb
590 */
591 static void stlink_usb_set_cbw_transfer_datalength(void *handle, uint32_t size)
592 {
593 struct stlink_usb_handle_s *h = handle;
594
595 buf_set_u32(h->cmdbuf+8, 0, 32, size);
596 }
597
598 static void stlink_usb_xfer_v1_create_cmd(void *handle, uint8_t direction, uint32_t size)
599 {
600 struct stlink_usb_handle_s *h = handle;
601
602 /* fill the send buffer */
603 strcpy((char *)h->cmdbuf, "USBC");
604 h->cmdidx += 4;
605 /* csw tag not used */
606 buf_set_u32(h->cmdbuf+h->cmdidx, 0, 32, 0);
607 h->cmdidx += 4;
608 /* cbw data transfer length (in the following data phase in or out) */
609 buf_set_u32(h->cmdbuf+h->cmdidx, 0, 32, size);
610 h->cmdidx += 4;
611 /* cbw flags */
612 h->cmdbuf[h->cmdidx++] = (direction == h->rx_ep ? ENDPOINT_IN : ENDPOINT_OUT);
613 h->cmdbuf[h->cmdidx++] = 0; /* lun */
614 /* cdb clength (is filled in at xfer) */
615 h->cmdbuf[h->cmdidx++] = 0;
616 }
617
618 /** */
619 static void stlink_usb_init_buffer(void *handle, uint8_t direction, uint32_t size)
620 {
621 struct stlink_usb_handle_s *h = handle;
622
623 h->direction = direction;
624
625 h->cmdidx = 0;
626
627 memset(h->cmdbuf, 0, STLINK_SG_SIZE);
628 memset(h->databuf, 0, STLINK_DATA_SIZE);
629
630 if (h->version.stlink == 1)
631 stlink_usb_xfer_v1_create_cmd(handle, direction, size);
632 }
633
634 /** */
635 static int stlink_usb_version(void *handle)
636 {
637 int res;
638 uint32_t flags;
639 uint16_t v;
640 struct stlink_usb_handle_s *h = handle;
641
642 assert(handle != NULL);
643
644 stlink_usb_init_buffer(handle, h->rx_ep, 6);
645
646 h->cmdbuf[h->cmdidx++] = STLINK_GET_VERSION;
647
648 res = stlink_usb_xfer(handle, h->databuf, 6);
649
650 if (res != ERROR_OK)
651 return res;
652
653 v = (h->databuf[0] << 8) | h->databuf[1];
654
655 h->version.stlink = (v >> 12) & 0x0f;
656 h->version.jtag = (v >> 6) & 0x3f;
657 h->version.swim = v & 0x3f;
658 h->vid = buf_get_u32(h->databuf, 16, 16);
659 h->pid = buf_get_u32(h->databuf, 32, 16);
660
661 flags = 0;
662 switch (h->version.stlink) {
663 case 1:
664 /* ST-LINK/V1 from J11 switch to api-v2 (and support SWD) */
665 if (h->version.jtag >= 11)
666 h->version.jtag_api_max = STLINK_JTAG_API_V2;
667 else
668 h->version.jtag_api_max = STLINK_JTAG_API_V1;
669
670 break;
671 case 2:
672 /* all ST-LINK/V2 and ST-Link/V2.1 use api-v2 */
673 h->version.jtag_api_max = STLINK_JTAG_API_V2;
674
675 /* API for trace from J13 */
676 /* API for target voltage from J13 */
677 if (h->version.jtag >= 13)
678 flags |= STLINK_F_HAS_TRACE;
679
680 /* API to set SWD frequency from J22 */
681 if (h->version.jtag >= 22)
682 flags |= STLINK_F_HAS_SWD_SET_FREQ;
683
684 /* API to set JTAG frequency from J24 */
685 if (h->version.jtag >= 24)
686 flags |= STLINK_F_HAS_JTAG_SET_FREQ;
687
688 /* API to read/write memory at 16 bit from J26 */
689 if (h->version.jtag >= 26)
690 flags |= STLINK_F_HAS_MEM_16BIT;
691
692 break;
693 default:
694 break;
695 }
696 h->version.flags = flags;
697
698 LOG_INFO("STLINK v%d JTAG v%d API v%d SWIM v%d VID 0x%04X PID 0x%04X",
699 h->version.stlink,
700 h->version.jtag,
701 (h->version.jtag_api_max == STLINK_JTAG_API_V1) ? 1 : 2,
702 h->version.swim,
703 h->vid,
704 h->pid);
705
706 return ERROR_OK;
707 }
708
709 static int stlink_usb_check_voltage(void *handle, float *target_voltage)
710 {
711 struct stlink_usb_handle_s *h = handle;
712 uint32_t adc_results[2];
713
714 /* no error message, simply quit with error */
715 if (!(h->version.flags & STLINK_F_HAS_TARGET_VOLT))
716 return ERROR_COMMAND_NOTFOUND;
717
718 stlink_usb_init_buffer(handle, h->rx_ep, 8);
719
720 h->cmdbuf[h->cmdidx++] = STLINK_GET_TARGET_VOLTAGE;
721
722 int result = stlink_usb_xfer(handle, h->databuf, 8);
723
724 if (result != ERROR_OK)
725 return result;
726
727 /* convert result */
728 adc_results[0] = le_to_h_u32(h->databuf);
729 adc_results[1] = le_to_h_u32(h->databuf + 4);
730
731 *target_voltage = 0;
732
733 if (adc_results[0])
734 *target_voltage = 2 * ((float)adc_results[1]) * (float)(1.2 / adc_results[0]);
735
736 LOG_INFO("Target voltage: %f", (double)*target_voltage);
737
738 return ERROR_OK;
739 }
740
741 static int stlink_usb_set_swdclk(void *handle, uint16_t clk_divisor)
742 {
743 struct stlink_usb_handle_s *h = handle;
744
745 assert(handle != NULL);
746
747 if (!(h->version.flags & STLINK_F_HAS_SWD_SET_FREQ))
748 return ERROR_COMMAND_NOTFOUND;
749
750 stlink_usb_init_buffer(handle, h->rx_ep, 2);
751
752 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
753 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_SWD_SET_FREQ;
754 h_u16_to_le(h->cmdbuf+h->cmdidx, clk_divisor);
755 h->cmdidx += 2;
756
757 int result = stlink_cmd_allow_retry(handle, h->databuf, 2);
758
759 if (result != ERROR_OK)
760 return result;
761
762 return ERROR_OK;
763 }
764
765 static int stlink_usb_set_jtagclk(void *handle, uint16_t clk_divisor)
766 {
767 struct stlink_usb_handle_s *h = handle;
768
769 assert(handle != NULL);
770
771 if (!(h->version.flags & STLINK_F_HAS_JTAG_SET_FREQ))
772 return ERROR_COMMAND_NOTFOUND;
773
774 stlink_usb_init_buffer(handle, h->rx_ep, 2);
775
776 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
777 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_JTAG_SET_FREQ;
778 h_u16_to_le(h->cmdbuf+h->cmdidx, clk_divisor);
779 h->cmdidx += 2;
780
781 int result = stlink_cmd_allow_retry(handle, h->databuf, 2);
782
783 if (result != ERROR_OK)
784 return result;
785
786 return ERROR_OK;
787 }
788
789 /** */
790 static int stlink_usb_current_mode(void *handle, uint8_t *mode)
791 {
792 int res;
793 struct stlink_usb_handle_s *h = handle;
794
795 assert(handle != NULL);
796
797 stlink_usb_init_buffer(handle, h->rx_ep, 2);
798
799 h->cmdbuf[h->cmdidx++] = STLINK_GET_CURRENT_MODE;
800
801 res = stlink_usb_xfer(handle, h->databuf, 2);
802
803 if (res != ERROR_OK)
804 return res;
805
806 *mode = h->databuf[0];
807
808 return ERROR_OK;
809 }
810
811 /** */
812 static int stlink_usb_mode_enter(void *handle, enum stlink_mode type)
813 {
814 int rx_size = 0;
815 struct stlink_usb_handle_s *h = handle;
816
817 assert(handle != NULL);
818
819 /* on api V2 we are able the read the latest command
820 * status
821 * TODO: we need the test on api V1 too
822 */
823 if (h->jtag_api == STLINK_JTAG_API_V2)
824 rx_size = 2;
825
826 stlink_usb_init_buffer(handle, h->rx_ep, rx_size);
827
828 switch (type) {
829 case STLINK_MODE_DEBUG_JTAG:
830 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
831 if (h->jtag_api == STLINK_JTAG_API_V1)
832 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV1_ENTER;
833 else
834 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_ENTER;
835 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_ENTER_JTAG;
836 break;
837 case STLINK_MODE_DEBUG_SWD:
838 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
839 if (h->jtag_api == STLINK_JTAG_API_V1)
840 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV1_ENTER;
841 else
842 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_ENTER;
843 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_ENTER_SWD;
844 break;
845 case STLINK_MODE_DEBUG_SWIM:
846 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
847 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_ENTER;
848 /* no answer for this function... */
849 rx_size = 0;
850 break;
851 case STLINK_MODE_DFU:
852 case STLINK_MODE_MASS:
853 default:
854 return ERROR_FAIL;
855 }
856
857 return stlink_cmd_allow_retry(handle, h->databuf, rx_size);
858 }
859
860 /** */
861 static int stlink_usb_mode_leave(void *handle, enum stlink_mode type)
862 {
863 int res;
864 struct stlink_usb_handle_s *h = handle;
865
866 assert(handle != NULL);
867
868 stlink_usb_init_buffer(handle, STLINK_NULL_EP, 0);
869
870 switch (type) {
871 case STLINK_MODE_DEBUG_JTAG:
872 case STLINK_MODE_DEBUG_SWD:
873 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
874 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_EXIT;
875 break;
876 case STLINK_MODE_DEBUG_SWIM:
877 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
878 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_EXIT;
879 break;
880 case STLINK_MODE_DFU:
881 h->cmdbuf[h->cmdidx++] = STLINK_DFU_COMMAND;
882 h->cmdbuf[h->cmdidx++] = STLINK_DFU_EXIT;
883 break;
884 case STLINK_MODE_MASS:
885 default:
886 return ERROR_FAIL;
887 }
888
889 res = stlink_usb_xfer(handle, 0, 0);
890
891 if (res != ERROR_OK)
892 return res;
893
894 return ERROR_OK;
895 }
896
897 static int stlink_usb_assert_srst(void *handle, int srst);
898
899 static enum stlink_mode stlink_get_mode(enum hl_transports t)
900 {
901 switch (t) {
902 case HL_TRANSPORT_SWD:
903 return STLINK_MODE_DEBUG_SWD;
904 case HL_TRANSPORT_JTAG:
905 return STLINK_MODE_DEBUG_JTAG;
906 case HL_TRANSPORT_SWIM:
907 return STLINK_MODE_DEBUG_SWIM;
908 default:
909 return STLINK_MODE_UNKNOWN;
910 }
911 }
912
913 /** */
914 static int stlink_usb_init_mode(void *handle, bool connect_under_reset)
915 {
916 int res;
917 uint8_t mode;
918 enum stlink_mode emode;
919 struct stlink_usb_handle_s *h = handle;
920
921 assert(handle != NULL);
922
923 res = stlink_usb_current_mode(handle, &mode);
924
925 if (res != ERROR_OK)
926 return res;
927
928 LOG_DEBUG("MODE: 0x%02X", mode);
929
930 /* try to exit current mode */
931 switch (mode) {
932 case STLINK_DEV_DFU_MODE:
933 emode = STLINK_MODE_DFU;
934 break;
935 case STLINK_DEV_DEBUG_MODE:
936 emode = STLINK_MODE_DEBUG_SWD;
937 break;
938 case STLINK_DEV_SWIM_MODE:
939 emode = STLINK_MODE_DEBUG_SWIM;
940 break;
941 case STLINK_DEV_BOOTLOADER_MODE:
942 case STLINK_DEV_MASS_MODE:
943 default:
944 emode = STLINK_MODE_UNKNOWN;
945 break;
946 }
947
948 if (emode != STLINK_MODE_UNKNOWN) {
949 res = stlink_usb_mode_leave(handle, emode);
950
951 if (res != ERROR_OK)
952 return res;
953 }
954
955 res = stlink_usb_current_mode(handle, &mode);
956
957 if (res != ERROR_OK)
958 return res;
959
960 /* we check the target voltage here as an aid to debugging connection problems.
961 * the stlink requires the target Vdd to be connected for reliable debugging.
962 * this cmd is supported in all modes except DFU
963 */
964 if (mode != STLINK_DEV_DFU_MODE) {
965
966 float target_voltage;
967
968 /* check target voltage (if supported) */
969 res = stlink_usb_check_voltage(h, &target_voltage);
970
971 if (res != ERROR_OK) {
972 if (res != ERROR_COMMAND_NOTFOUND)
973 LOG_ERROR("voltage check failed");
974 /* attempt to continue as it is not a catastrophic failure */
975 } else {
976 /* check for a sensible target voltage, operating range is 1.65-5.5v
977 * according to datasheet */
978 if (target_voltage < 1.5)
979 LOG_ERROR("target voltage may be too low for reliable debugging");
980 }
981 }
982
983 LOG_DEBUG("MODE: 0x%02X", mode);
984
985 /* set selected mode */
986 emode = stlink_get_mode(h->transport);
987
988 if (emode == STLINK_MODE_UNKNOWN) {
989 LOG_ERROR("selected mode (transport) not supported");
990 return ERROR_FAIL;
991 }
992
993 /* preliminary SRST assert:
994 * We want SRST is asserted before activating debug signals (mode_enter).
995 * As the required mode has not been set, the adapter may not know what pin to use.
996 * Tested firmware STLINK v2 JTAG v29 API v2 SWIM v0 uses T_NRST pin by default
997 * Tested firmware STLINK v2 JTAG v27 API v2 SWIM v6 uses T_NRST pin by default
998 * after power on, SWIM_RST stays unchanged */
999 if (connect_under_reset && emode != STLINK_MODE_DEBUG_SWIM)
1000 stlink_usb_assert_srst(handle, 0);
1001 /* do not check the return status here, we will
1002 proceed and enter the desired mode below
1003 and try asserting srst again. */
1004
1005 res = stlink_usb_mode_enter(handle, emode);
1006 if (res != ERROR_OK)
1007 return res;
1008
1009 /* assert SRST again: a little bit late but now the adapter knows for sure what pin to use */
1010 if (connect_under_reset) {
1011 res = stlink_usb_assert_srst(handle, 0);
1012 if (res != ERROR_OK)
1013 return res;
1014 }
1015
1016 res = stlink_usb_current_mode(handle, &mode);
1017
1018 if (res != ERROR_OK)
1019 return res;
1020
1021 LOG_DEBUG("MODE: 0x%02X", mode);
1022
1023 return ERROR_OK;
1024 }
1025
1026 /* request status from last swim request */
1027 static int stlink_swim_status(void *handle)
1028 {
1029 struct stlink_usb_handle_s *h = handle;
1030 int res;
1031
1032 stlink_usb_init_buffer(handle, h->rx_ep, 4);
1033 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1034 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_READSTATUS;
1035 res = stlink_usb_xfer(handle, h->databuf, 4);
1036 if (res != ERROR_OK)
1037 return res;
1038 return ERROR_OK;
1039 }
1040 /*
1041 the purpose of this function is unknown...
1042 capabilites? anyway for swim v6 it returns
1043 0001020600000000
1044 */
1045 __attribute__((unused))
1046 static int stlink_swim_cap(void *handle, uint8_t *cap)
1047 {
1048 struct stlink_usb_handle_s *h = handle;
1049 int res;
1050
1051 stlink_usb_init_buffer(handle, h->rx_ep, 8);
1052 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1053 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_READ_CAP;
1054 h->cmdbuf[h->cmdidx++] = 0x01;
1055 res = stlink_usb_xfer(handle, h->databuf, 8);
1056 if (res != ERROR_OK)
1057 return res;
1058 memcpy(cap, h->databuf, 8);
1059 return ERROR_OK;
1060 }
1061
1062 /* debug dongle assert/deassert sreset line */
1063 static int stlink_swim_assert_reset(void *handle, int reset)
1064 {
1065 struct stlink_usb_handle_s *h = handle;
1066 int res;
1067
1068 stlink_usb_init_buffer(handle, h->rx_ep, 0);
1069 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1070 if (!reset)
1071 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_ASSERT_RESET;
1072 else
1073 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_DEASSERT_RESET;
1074 res = stlink_cmd_allow_retry(handle, h->databuf, 0);
1075 if (res != ERROR_OK)
1076 return res;
1077 return ERROR_OK;
1078 }
1079
1080 /*
1081 send swim enter seq
1082 1.3ms low then 750Hz then 1.5kHz
1083 */
1084 static int stlink_swim_enter(void *handle)
1085 {
1086 struct stlink_usb_handle_s *h = handle;
1087 int res;
1088
1089 stlink_usb_init_buffer(handle, h->rx_ep, 0);
1090 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1091 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_ENTER_SEQ;
1092 res = stlink_cmd_allow_retry(handle, h->databuf, 0);
1093 if (res != ERROR_OK)
1094 return res;
1095 return ERROR_OK;
1096 }
1097
1098 /* switch high/low speed swim */
1099 static int stlink_swim_speed(void *handle, int speed)
1100 {
1101 struct stlink_usb_handle_s *h = handle;
1102 int res;
1103
1104 stlink_usb_init_buffer(handle, h->rx_ep, 0);
1105 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1106 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_SPEED;
1107 if (speed)
1108 h->cmdbuf[h->cmdidx++] = 1;
1109 else
1110 h->cmdbuf[h->cmdidx++] = 0;
1111 res = stlink_cmd_allow_retry(handle, h->databuf, 0);
1112 if (res != ERROR_OK)
1113 return res;
1114 return ERROR_OK;
1115 }
1116
1117 /*
1118 initiate srst from swim.
1119 nrst is pulled low for 50us.
1120 */
1121 static int stlink_swim_generate_rst(void *handle)
1122 {
1123 struct stlink_usb_handle_s *h = handle;
1124 int res;
1125
1126 stlink_usb_init_buffer(handle, h->rx_ep, 0);
1127 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1128 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_GEN_RST;
1129 res = stlink_cmd_allow_retry(handle, h->databuf, 0);
1130 if (res != ERROR_OK)
1131 return res;
1132 return ERROR_OK;
1133 }
1134
1135 /*
1136 send resyncronize sequence
1137 swim is pulled low for 16us
1138 reply is 64 clks low
1139 */
1140 static int stlink_swim_resync(void *handle)
1141 {
1142 struct stlink_usb_handle_s *h = handle;
1143 int res;
1144
1145 stlink_usb_init_buffer(handle, h->rx_ep, 0);
1146 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1147 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_RESET;
1148 res = stlink_cmd_allow_retry(handle, h->databuf, 0);
1149 if (res != ERROR_OK)
1150 return res;
1151 return ERROR_OK;
1152 }
1153
1154 static int stlink_swim_writebytes(void *handle, uint32_t addr, uint32_t len, const uint8_t *data)
1155 {
1156 struct stlink_usb_handle_s *h = handle;
1157 int res;
1158 unsigned int i;
1159 unsigned int datalen = 0;
1160 int cmdsize = STLINK_CMD_SIZE_V2;
1161
1162 if (len > STLINK_DATA_SIZE)
1163 return ERROR_FAIL;
1164
1165 if (h->version.stlink == 1)
1166 cmdsize = STLINK_SG_SIZE;
1167
1168 stlink_usb_init_buffer(handle, h->tx_ep, 0);
1169 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1170 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_WRITEMEM;
1171 h_u16_to_be(h->cmdbuf+h->cmdidx, len);
1172 h->cmdidx += 2;
1173 h_u32_to_be(h->cmdbuf+h->cmdidx, addr);
1174 h->cmdidx += 4;
1175 for (i = 0; i < len; i++) {
1176 if (h->cmdidx == cmdsize)
1177 h->databuf[datalen++] = *(data++);
1178 else
1179 h->cmdbuf[h->cmdidx++] = *(data++);
1180 }
1181 if (h->version.stlink == 1)
1182 stlink_usb_set_cbw_transfer_datalength(handle, datalen);
1183
1184 res = stlink_cmd_allow_retry(handle, h->databuf, datalen);
1185 if (res != ERROR_OK)
1186 return res;
1187 return ERROR_OK;
1188 }
1189
1190 static int stlink_swim_readbytes(void *handle, uint32_t addr, uint32_t len, uint8_t *data)
1191 {
1192 struct stlink_usb_handle_s *h = handle;
1193 int res;
1194
1195 if (len > STLINK_DATA_SIZE)
1196 return ERROR_FAIL;
1197
1198 stlink_usb_init_buffer(handle, h->rx_ep, 0);
1199 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1200 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_READMEM;
1201 h_u16_to_be(h->cmdbuf+h->cmdidx, len);
1202 h->cmdidx += 2;
1203 h_u32_to_be(h->cmdbuf+h->cmdidx, addr);
1204 h->cmdidx += 4;
1205 res = stlink_cmd_allow_retry(handle, h->databuf, 0);
1206 if (res != ERROR_OK)
1207 return res;
1208
1209 stlink_usb_init_buffer(handle, h->rx_ep, len);
1210 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1211 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_READBUF;
1212 res = stlink_usb_xfer(handle, data, len);
1213 if (res != ERROR_OK)
1214 return res;
1215
1216 return ERROR_OK;
1217 }
1218
1219 /** */
1220 static int stlink_usb_idcode(void *handle, uint32_t *idcode)
1221 {
1222 int res;
1223 struct stlink_usb_handle_s *h = handle;
1224
1225 assert(handle != NULL);
1226
1227 /* there is no swim read core id cmd */
1228 if (h->transport == HL_TRANSPORT_SWIM) {
1229 *idcode = 0;
1230 return ERROR_OK;
1231 }
1232
1233 stlink_usb_init_buffer(handle, h->rx_ep, 4);
1234
1235 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1236 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_READCOREID;
1237
1238 res = stlink_usb_xfer(handle, h->databuf, 4);
1239
1240 if (res != ERROR_OK)
1241 return res;
1242
1243 *idcode = le_to_h_u32(h->databuf);
1244
1245 LOG_DEBUG("IDCODE: 0x%08" PRIX32, *idcode);
1246
1247 return ERROR_OK;
1248 }
1249
1250 static int stlink_usb_v2_read_debug_reg(void *handle, uint32_t addr, uint32_t *val)
1251 {
1252 struct stlink_usb_handle_s *h = handle;
1253 int res;
1254
1255 assert(handle != NULL);
1256
1257 stlink_usb_init_buffer(handle, h->rx_ep, 8);
1258
1259 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1260 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_READDEBUGREG;
1261 h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
1262 h->cmdidx += 4;
1263
1264 res = stlink_cmd_allow_retry(handle, h->databuf, 8);
1265 if (res != ERROR_OK)
1266 return res;
1267
1268 *val = le_to_h_u32(h->databuf + 4);
1269 return ERROR_OK;
1270 }
1271
1272 static int stlink_usb_write_debug_reg(void *handle, uint32_t addr, uint32_t val)
1273 {
1274 struct stlink_usb_handle_s *h = handle;
1275
1276 assert(handle != NULL);
1277
1278 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1279
1280 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1281 if (h->jtag_api == STLINK_JTAG_API_V1)
1282 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV1_WRITEDEBUGREG;
1283 else
1284 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_WRITEDEBUGREG;
1285 h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
1286 h->cmdidx += 4;
1287 h_u32_to_le(h->cmdbuf+h->cmdidx, val);
1288 h->cmdidx += 4;
1289
1290 return stlink_cmd_allow_retry(handle, h->databuf, 2);
1291 }
1292
1293 /** */
1294 static int stlink_usb_trace_read(void *handle, uint8_t *buf, size_t *size)
1295 {
1296 struct stlink_usb_handle_s *h = handle;
1297
1298 assert(handle != NULL);
1299
1300 if (h->trace.enabled && (h->version.flags & STLINK_F_HAS_TRACE)) {
1301 int res;
1302
1303 stlink_usb_init_buffer(handle, h->rx_ep, 10);
1304
1305 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1306 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_GET_TRACE_NB;
1307
1308 res = stlink_usb_xfer(handle, h->databuf, 2);
1309 if (res != ERROR_OK)
1310 return res;
1311
1312 size_t bytes_avail = le_to_h_u16(h->databuf);
1313 *size = bytes_avail < *size ? bytes_avail : *size - 1;
1314
1315 if (*size > 0) {
1316 res = stlink_usb_read_trace(handle, buf, *size);
1317 if (res != ERROR_OK)
1318 return res;
1319 return ERROR_OK;
1320 }
1321 }
1322 *size = 0;
1323 return ERROR_OK;
1324 }
1325
1326 static enum target_state stlink_usb_v2_get_status(void *handle)
1327 {
1328 int result;
1329 uint32_t status;
1330
1331 result = stlink_usb_v2_read_debug_reg(handle, DCB_DHCSR, &status);
1332 if (result != ERROR_OK)
1333 return TARGET_UNKNOWN;
1334
1335 if (status & S_HALT)
1336 return TARGET_HALTED;
1337 else if (status & S_RESET_ST)
1338 return TARGET_RESET;
1339
1340 return TARGET_RUNNING;
1341 }
1342
1343 /** */
1344 static enum target_state stlink_usb_state(void *handle)
1345 {
1346 int res;
1347 struct stlink_usb_handle_s *h = handle;
1348
1349 assert(handle != NULL);
1350
1351 if (h->transport == HL_TRANSPORT_SWIM) {
1352 res = stlink_usb_mode_enter(handle, stlink_get_mode(h->transport));
1353 if (res != ERROR_OK)
1354 return TARGET_UNKNOWN;
1355
1356 res = stlink_swim_resync(handle);
1357 if (res != ERROR_OK)
1358 return TARGET_UNKNOWN;
1359
1360 return ERROR_OK;
1361 }
1362
1363 if (h->reconnect_pending) {
1364 LOG_INFO("Previous state query failed, trying to reconnect");
1365 res = stlink_usb_mode_enter(handle, stlink_get_mode(h->transport));
1366
1367 if (res != ERROR_OK)
1368 return TARGET_UNKNOWN;
1369
1370 h->reconnect_pending = false;
1371 }
1372
1373 if (h->jtag_api == STLINK_JTAG_API_V2) {
1374 res = stlink_usb_v2_get_status(handle);
1375 if (res == TARGET_UNKNOWN)
1376 h->reconnect_pending = true;
1377 return res;
1378 }
1379
1380 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1381
1382 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1383 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_GETSTATUS;
1384
1385 res = stlink_usb_xfer(handle, h->databuf, 2);
1386
1387 if (res != ERROR_OK)
1388 return TARGET_UNKNOWN;
1389
1390 if (h->databuf[0] == STLINK_CORE_RUNNING)
1391 return TARGET_RUNNING;
1392 if (h->databuf[0] == STLINK_CORE_HALTED)
1393 return TARGET_HALTED;
1394
1395 h->reconnect_pending = true;
1396
1397 return TARGET_UNKNOWN;
1398 }
1399
1400 static int stlink_usb_assert_srst(void *handle, int srst)
1401 {
1402 struct stlink_usb_handle_s *h = handle;
1403
1404 assert(handle != NULL);
1405
1406 if (h->transport == HL_TRANSPORT_SWIM)
1407 return stlink_swim_assert_reset(handle, srst);
1408
1409 if (h->version.stlink == 1)
1410 return ERROR_COMMAND_NOTFOUND;
1411
1412 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1413
1414 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1415 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_DRIVE_NRST;
1416 h->cmdbuf[h->cmdidx++] = srst;
1417
1418 return stlink_cmd_allow_retry(handle, h->databuf, 2);
1419 }
1420
1421 /** */
1422 static void stlink_usb_trace_disable(void *handle)
1423 {
1424 int res = ERROR_OK;
1425 struct stlink_usb_handle_s *h = handle;
1426
1427 assert(handle != NULL);
1428
1429 assert(h->version.flags & STLINK_F_HAS_TRACE);
1430
1431 LOG_DEBUG("Tracing: disable");
1432
1433 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1434 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1435 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_STOP_TRACE_RX;
1436 res = stlink_usb_xfer(handle, h->databuf, 2);
1437
1438 if (res == ERROR_OK)
1439 h->trace.enabled = false;
1440 }
1441
1442
1443 /** */
1444 static int stlink_usb_trace_enable(void *handle)
1445 {
1446 int res;
1447 struct stlink_usb_handle_s *h = handle;
1448
1449 assert(handle != NULL);
1450
1451 if (h->version.flags & STLINK_F_HAS_TRACE) {
1452 stlink_usb_init_buffer(handle, h->rx_ep, 10);
1453
1454 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1455 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_START_TRACE_RX;
1456 h_u16_to_le(h->cmdbuf+h->cmdidx, (uint16_t)STLINK_TRACE_SIZE);
1457 h->cmdidx += 2;
1458 h_u32_to_le(h->cmdbuf+h->cmdidx, h->trace.source_hz);
1459 h->cmdidx += 4;
1460
1461 res = stlink_usb_xfer(handle, h->databuf, 2);
1462
1463 if (res == ERROR_OK) {
1464 h->trace.enabled = true;
1465 LOG_DEBUG("Tracing: recording at %" PRIu32 "Hz", h->trace.source_hz);
1466 }
1467 } else {
1468 LOG_ERROR("Tracing is not supported by this version.");
1469 res = ERROR_FAIL;
1470 }
1471
1472 return res;
1473 }
1474
1475 /** */
1476 static int stlink_usb_reset(void *handle)
1477 {
1478 struct stlink_usb_handle_s *h = handle;
1479 int retval;
1480
1481 assert(handle != NULL);
1482
1483 if (h->transport == HL_TRANSPORT_SWIM)
1484 return stlink_swim_generate_rst(handle);
1485
1486 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1487
1488 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1489
1490 if (h->jtag_api == STLINK_JTAG_API_V1)
1491 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV1_RESETSYS;
1492 else
1493 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_RESETSYS;
1494
1495 retval = stlink_cmd_allow_retry(handle, h->databuf, 2);
1496 if (retval != ERROR_OK)
1497 return retval;
1498
1499 if (h->trace.enabled) {
1500 stlink_usb_trace_disable(h);
1501 return stlink_usb_trace_enable(h);
1502 }
1503
1504 return ERROR_OK;
1505 }
1506
1507 /** */
1508 static int stlink_usb_run(void *handle)
1509 {
1510 int res;
1511 struct stlink_usb_handle_s *h = handle;
1512
1513 assert(handle != NULL);
1514
1515 if (h->jtag_api == STLINK_JTAG_API_V2) {
1516 res = stlink_usb_write_debug_reg(handle, DCB_DHCSR, DBGKEY|C_DEBUGEN);
1517
1518 return res;
1519 }
1520
1521 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1522
1523 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1524 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_RUNCORE;
1525
1526 return stlink_cmd_allow_retry(handle, h->databuf, 2);
1527 }
1528
1529 /** */
1530 static int stlink_usb_halt(void *handle)
1531 {
1532 int res;
1533 struct stlink_usb_handle_s *h = handle;
1534
1535 assert(handle != NULL);
1536
1537 if (h->jtag_api == STLINK_JTAG_API_V2) {
1538 res = stlink_usb_write_debug_reg(handle, DCB_DHCSR, DBGKEY|C_HALT|C_DEBUGEN);
1539
1540 return res;
1541 }
1542
1543 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1544
1545 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1546 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_FORCEDEBUG;
1547
1548 return stlink_cmd_allow_retry(handle, h->databuf, 2);
1549 }
1550
1551 /** */
1552 static int stlink_usb_step(void *handle)
1553 {
1554 struct stlink_usb_handle_s *h = handle;
1555
1556 assert(handle != NULL);
1557
1558 if (h->jtag_api == STLINK_JTAG_API_V2) {
1559 /* TODO: this emulates the v1 api, it should really use a similar auto mask isr
1560 * that the Cortex-M3 currently does. */
1561 stlink_usb_write_debug_reg(handle, DCB_DHCSR, DBGKEY|C_HALT|C_MASKINTS|C_DEBUGEN);
1562 stlink_usb_write_debug_reg(handle, DCB_DHCSR, DBGKEY|C_STEP|C_MASKINTS|C_DEBUGEN);
1563 return stlink_usb_write_debug_reg(handle, DCB_DHCSR, DBGKEY|C_HALT|C_DEBUGEN);
1564 }
1565
1566 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1567
1568 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1569 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_STEPCORE;
1570
1571 return stlink_cmd_allow_retry(handle, h->databuf, 2);
1572 }
1573
1574 /** */
1575 static int stlink_usb_read_regs(void *handle)
1576 {
1577 int res;
1578 struct stlink_usb_handle_s *h = handle;
1579
1580 assert(handle != NULL);
1581
1582 stlink_usb_init_buffer(handle, h->rx_ep, 84);
1583
1584 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1585 if (h->jtag_api == STLINK_JTAG_API_V1)
1586 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV1_READALLREGS;
1587 else
1588 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_READALLREGS;
1589
1590 res = stlink_usb_xfer(handle, h->databuf, 84);
1591
1592 if (res != ERROR_OK)
1593 return res;
1594
1595 return ERROR_OK;
1596 }
1597
1598 /** */
1599 static int stlink_usb_read_reg(void *handle, int num, uint32_t *val)
1600 {
1601 int res;
1602 struct stlink_usb_handle_s *h = handle;
1603
1604 assert(handle != NULL);
1605
1606 stlink_usb_init_buffer(handle, h->rx_ep, h->jtag_api == STLINK_JTAG_API_V1 ? 4 : 8);
1607
1608 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1609 if (h->jtag_api == STLINK_JTAG_API_V1)
1610 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV1_READREG;
1611 else
1612 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_READREG;
1613 h->cmdbuf[h->cmdidx++] = num;
1614
1615 if (h->jtag_api == STLINK_JTAG_API_V1) {
1616 res = stlink_usb_xfer(handle, h->databuf, 4);
1617 if (res != ERROR_OK)
1618 return res;
1619 *val = le_to_h_u32(h->databuf);
1620 return ERROR_OK;
1621 } else {
1622 res = stlink_cmd_allow_retry(handle, h->databuf, 8);
1623 if (res != ERROR_OK)
1624 return res;
1625 *val = le_to_h_u32(h->databuf + 4);
1626 return ERROR_OK;
1627 }
1628 }
1629
1630 /** */
1631 static int stlink_usb_write_reg(void *handle, int num, uint32_t val)
1632 {
1633 struct stlink_usb_handle_s *h = handle;
1634
1635 assert(handle != NULL);
1636
1637 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1638
1639 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1640 if (h->jtag_api == STLINK_JTAG_API_V1)
1641 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV1_WRITEREG;
1642 else
1643 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_WRITEREG;
1644 h->cmdbuf[h->cmdidx++] = num;
1645 h_u32_to_le(h->cmdbuf+h->cmdidx, val);
1646 h->cmdidx += 4;
1647
1648 return stlink_cmd_allow_retry(handle, h->databuf, 2);
1649 }
1650
1651 static int stlink_usb_get_rw_status(void *handle)
1652 {
1653 int res;
1654 struct stlink_usb_handle_s *h = handle;
1655
1656 assert(handle != NULL);
1657
1658 if (h->jtag_api == STLINK_JTAG_API_V1)
1659 return ERROR_OK;
1660
1661 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1662
1663 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1664 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_GETLASTRWSTATUS;
1665
1666 res = stlink_usb_xfer(handle, h->databuf, 2);
1667
1668 if (res != ERROR_OK)
1669 return res;
1670
1671 return stlink_usb_error_check(h);
1672 }
1673
1674 /** */
1675 static int stlink_usb_read_mem8(void *handle, uint32_t addr, uint16_t len,
1676 uint8_t *buffer)
1677 {
1678 int res;
1679 uint16_t read_len = len;
1680 struct stlink_usb_handle_s *h = handle;
1681
1682 assert(handle != NULL);
1683
1684 /* max 8bit read/write is 64bytes */
1685 if (len > STLINK_MAX_RW8) {
1686 LOG_DEBUG("max buffer length exceeded");
1687 return ERROR_FAIL;
1688 }
1689
1690 stlink_usb_init_buffer(handle, h->rx_ep, read_len);
1691
1692 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1693 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_READMEM_8BIT;
1694 h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
1695 h->cmdidx += 4;
1696 h_u16_to_le(h->cmdbuf+h->cmdidx, len);
1697 h->cmdidx += 2;
1698
1699 /* we need to fix read length for single bytes */
1700 if (read_len == 1)
1701 read_len++;
1702
1703 res = stlink_usb_xfer(handle, h->databuf, read_len);
1704
1705 if (res != ERROR_OK)
1706 return res;
1707
1708 memcpy(buffer, h->databuf, len);
1709
1710 return stlink_usb_get_rw_status(handle);
1711 }
1712
1713 /** */
1714 static int stlink_usb_write_mem8(void *handle, uint32_t addr, uint16_t len,
1715 const uint8_t *buffer)
1716 {
1717 int res;
1718 struct stlink_usb_handle_s *h = handle;
1719
1720 assert(handle != NULL);
1721
1722 /* max 8bit read/write is 64bytes */
1723 if (len > STLINK_MAX_RW8) {
1724 LOG_DEBUG("max buffer length exceeded");
1725 return ERROR_FAIL;
1726 }
1727
1728 stlink_usb_init_buffer(handle, h->tx_ep, len);
1729
1730 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1731 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_WRITEMEM_8BIT;
1732 h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
1733 h->cmdidx += 4;
1734 h_u16_to_le(h->cmdbuf+h->cmdidx, len);
1735 h->cmdidx += 2;
1736
1737 res = stlink_usb_xfer(handle, buffer, len);
1738
1739 if (res != ERROR_OK)
1740 return res;
1741
1742 return stlink_usb_get_rw_status(handle);
1743 }
1744
1745 /** */
1746 static int stlink_usb_read_mem16(void *handle, uint32_t addr, uint16_t len,
1747 uint8_t *buffer)
1748 {
1749 int res;
1750 struct stlink_usb_handle_s *h = handle;
1751
1752 assert(handle != NULL);
1753
1754 if (!(h->version.flags & STLINK_F_HAS_MEM_16BIT))
1755 return ERROR_COMMAND_NOTFOUND;
1756
1757 /* data must be a multiple of 2 and half-word aligned */
1758 if (len % 2 || addr % 2) {
1759 LOG_DEBUG("Invalid data alignment");
1760 return ERROR_TARGET_UNALIGNED_ACCESS;
1761 }
1762
1763 stlink_usb_init_buffer(handle, h->rx_ep, len);
1764
1765 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1766 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_READMEM_16BIT;
1767 h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
1768 h->cmdidx += 4;
1769 h_u16_to_le(h->cmdbuf+h->cmdidx, len);
1770 h->cmdidx += 2;
1771
1772 res = stlink_usb_xfer(handle, h->databuf, len);
1773
1774 if (res != ERROR_OK)
1775 return res;
1776
1777 memcpy(buffer, h->databuf, len);
1778
1779 return stlink_usb_get_rw_status(handle);
1780 }
1781
1782 /** */
1783 static int stlink_usb_write_mem16(void *handle, uint32_t addr, uint16_t len,
1784 const uint8_t *buffer)
1785 {
1786 int res;
1787 struct stlink_usb_handle_s *h = handle;
1788
1789 assert(handle != NULL);
1790
1791 if (!(h->version.flags & STLINK_F_HAS_MEM_16BIT))
1792 return ERROR_COMMAND_NOTFOUND;
1793
1794 /* data must be a multiple of 2 and half-word aligned */
1795 if (len % 2 || addr % 2) {
1796 LOG_DEBUG("Invalid data alignment");
1797 return ERROR_TARGET_UNALIGNED_ACCESS;
1798 }
1799
1800 stlink_usb_init_buffer(handle, h->tx_ep, len);
1801
1802 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1803 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_WRITEMEM_16BIT;
1804 h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
1805 h->cmdidx += 4;
1806 h_u16_to_le(h->cmdbuf+h->cmdidx, len);
1807 h->cmdidx += 2;
1808
1809 res = stlink_usb_xfer(handle, buffer, len);
1810
1811 if (res != ERROR_OK)
1812 return res;
1813
1814 return stlink_usb_get_rw_status(handle);
1815 }
1816
1817 /** */
1818 static int stlink_usb_read_mem32(void *handle, uint32_t addr, uint16_t len,
1819 uint8_t *buffer)
1820 {
1821 int res;
1822 struct stlink_usb_handle_s *h = handle;
1823
1824 assert(handle != NULL);
1825
1826 /* data must be a multiple of 4 and word aligned */
1827 if (len % 4 || addr % 4) {
1828 LOG_DEBUG("Invalid data alignment");
1829 return ERROR_TARGET_UNALIGNED_ACCESS;
1830 }
1831
1832 stlink_usb_init_buffer(handle, h->rx_ep, len);
1833
1834 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1835 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_READMEM_32BIT;
1836 h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
1837 h->cmdidx += 4;
1838 h_u16_to_le(h->cmdbuf+h->cmdidx, len);
1839 h->cmdidx += 2;
1840
1841 res = stlink_usb_xfer(handle, h->databuf, len);
1842
1843 if (res != ERROR_OK)
1844 return res;
1845
1846 memcpy(buffer, h->databuf, len);
1847
1848 return stlink_usb_get_rw_status(handle);
1849 }
1850
1851 /** */
1852 static int stlink_usb_write_mem32(void *handle, uint32_t addr, uint16_t len,
1853 const uint8_t *buffer)
1854 {
1855 int res;
1856 struct stlink_usb_handle_s *h = handle;
1857
1858 assert(handle != NULL);
1859
1860 /* data must be a multiple of 4 and word aligned */
1861 if (len % 4 || addr % 4) {
1862 LOG_DEBUG("Invalid data alignment");
1863 return ERROR_TARGET_UNALIGNED_ACCESS;
1864 }
1865
1866 stlink_usb_init_buffer(handle, h->tx_ep, len);
1867
1868 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1869 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_WRITEMEM_32BIT;
1870 h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
1871 h->cmdidx += 4;
1872 h_u16_to_le(h->cmdbuf+h->cmdidx, len);
1873 h->cmdidx += 2;
1874
1875 res = stlink_usb_xfer(handle, buffer, len);
1876
1877 if (res != ERROR_OK)
1878 return res;
1879
1880 return stlink_usb_get_rw_status(handle);
1881 }
1882
1883 static uint32_t stlink_max_block_size(uint32_t tar_autoincr_block, uint32_t address)
1884 {
1885 uint32_t max_tar_block = (tar_autoincr_block - ((tar_autoincr_block - 1) & address));
1886 if (max_tar_block == 0)
1887 max_tar_block = 4;
1888 return max_tar_block;
1889 }
1890
1891 static int stlink_usb_read_mem(void *handle, uint32_t addr, uint32_t size,
1892 uint32_t count, uint8_t *buffer)
1893 {
1894 int retval = ERROR_OK;
1895 uint32_t bytes_remaining;
1896 int retries = 0;
1897 struct stlink_usb_handle_s *h = handle;
1898
1899 /* calculate byte count */
1900 count *= size;
1901
1902 /* switch to 8 bit if stlink does not support 16 bit memory read */
1903 if (size == 2 && !(h->version.flags & STLINK_F_HAS_MEM_16BIT))
1904 size = 1;
1905
1906 while (count) {
1907
1908 bytes_remaining = (size != 1) ? \
1909 stlink_max_block_size(h->max_mem_packet, addr) : STLINK_MAX_RW8;
1910
1911 if (count < bytes_remaining)
1912 bytes_remaining = count;
1913
1914 if (h->transport == HL_TRANSPORT_SWIM) {
1915 retval = stlink_swim_readbytes(handle, addr, bytes_remaining, buffer);
1916 if (retval != ERROR_OK)
1917 return retval;
1918 } else
1919 /*
1920 * all stlink support 8/32bit memory read/writes and only from
1921 * stlink V2J26 there is support for 16 bit memory read/write.
1922 * Honour 32 bit and, if possible, 16 bit too. Otherwise, handle
1923 * as 8bit access.
1924 */
1925 if (size != 1) {
1926
1927 /* When in jtag mode the stlink uses the auto-increment functionality.
1928 * However it expects us to pass the data correctly, this includes
1929 * alignment and any page boundaries. We already do this as part of the
1930 * adi_v5 implementation, but the stlink is a hla adapter and so this
1931 * needs implementing manually.
1932 * currently this only affects jtag mode, according to ST they do single
1933 * access in SWD mode - but this may change and so we do it for both modes */
1934
1935 /* we first need to check for any unaligned bytes */
1936 if (addr & (size - 1)) {
1937
1938 uint32_t head_bytes = size - (addr & (size - 1));
1939 retval = stlink_usb_read_mem8(handle, addr, head_bytes, buffer);
1940 if (retval == ERROR_WAIT && retries < MAX_WAIT_RETRIES) {
1941 usleep((1<<retries++) * 1000);
1942 continue;
1943 }
1944 if (retval != ERROR_OK)
1945 return retval;
1946 buffer += head_bytes;
1947 addr += head_bytes;
1948 count -= head_bytes;
1949 bytes_remaining -= head_bytes;
1950 }
1951
1952 if (bytes_remaining & (size - 1))
1953 retval = stlink_usb_read_mem(handle, addr, 1, bytes_remaining, buffer);
1954 else if (size == 2)
1955 retval = stlink_usb_read_mem16(handle, addr, bytes_remaining, buffer);
1956 else
1957 retval = stlink_usb_read_mem32(handle, addr, bytes_remaining, buffer);
1958 } else
1959 retval = stlink_usb_read_mem8(handle, addr, bytes_remaining, buffer);
1960
1961 if (retval == ERROR_WAIT && retries < MAX_WAIT_RETRIES) {
1962 usleep((1<<retries++) * 1000);
1963 continue;
1964 }
1965 if (retval != ERROR_OK)
1966 return retval;
1967
1968 buffer += bytes_remaining;
1969 addr += bytes_remaining;
1970 count -= bytes_remaining;
1971 }
1972
1973 return retval;
1974 }
1975
1976 static int stlink_usb_write_mem(void *handle, uint32_t addr, uint32_t size,
1977 uint32_t count, const uint8_t *buffer)
1978 {
1979 int retval = ERROR_OK;
1980 uint32_t bytes_remaining;
1981 int retries = 0;
1982 struct stlink_usb_handle_s *h = handle;
1983
1984 /* calculate byte count */
1985 count *= size;
1986
1987 /* switch to 8 bit if stlink does not support 16 bit memory read */
1988 if (size == 2 && !(h->version.flags & STLINK_F_HAS_MEM_16BIT))
1989 size = 1;
1990
1991 while (count) {
1992
1993 bytes_remaining = (size != 1) ? \
1994 stlink_max_block_size(h->max_mem_packet, addr) : STLINK_MAX_RW8;
1995
1996 if (count < bytes_remaining)
1997 bytes_remaining = count;
1998
1999 if (h->transport == HL_TRANSPORT_SWIM) {
2000 retval = stlink_swim_writebytes(handle, addr, bytes_remaining, buffer);
2001 if (retval != ERROR_OK)
2002 return retval;
2003 } else
2004 /*
2005 * all stlink support 8/32bit memory read/writes and only from
2006 * stlink V2J26 there is support for 16 bit memory read/write.
2007 * Honour 32 bit and, if possible, 16 bit too. Otherwise, handle
2008 * as 8bit access.
2009 */
2010 if (size != 1) {
2011
2012 /* When in jtag mode the stlink uses the auto-increment functionality.
2013 * However it expects us to pass the data correctly, this includes
2014 * alignment and any page boundaries. We already do this as part of the
2015 * adi_v5 implementation, but the stlink is a hla adapter and so this
2016 * needs implementing manually.
2017 * currently this only affects jtag mode, according to ST they do single
2018 * access in SWD mode - but this may change and so we do it for both modes */
2019
2020 /* we first need to check for any unaligned bytes */
2021 if (addr & (size - 1)) {
2022
2023 uint32_t head_bytes = size - (addr & (size - 1));
2024 retval = stlink_usb_write_mem8(handle, addr, head_bytes, buffer);
2025 if (retval == ERROR_WAIT && retries < MAX_WAIT_RETRIES) {
2026 usleep((1<<retries++) * 1000);
2027 continue;
2028 }
2029 if (retval != ERROR_OK)
2030 return retval;
2031 buffer += head_bytes;
2032 addr += head_bytes;
2033 count -= head_bytes;
2034 bytes_remaining -= head_bytes;
2035 }
2036
2037 if (bytes_remaining & (size - 1))
2038 retval = stlink_usb_write_mem(handle, addr, 1, bytes_remaining, buffer);
2039 else if (size == 2)
2040 retval = stlink_usb_write_mem16(handle, addr, bytes_remaining, buffer);
2041 else
2042 retval = stlink_usb_write_mem32(handle, addr, bytes_remaining, buffer);
2043
2044 } else
2045 retval = stlink_usb_write_mem8(handle, addr, bytes_remaining, buffer);
2046 if (retval == ERROR_WAIT && retries < MAX_WAIT_RETRIES) {
2047 usleep((1<<retries++) * 1000);
2048 continue;
2049 }
2050 if (retval != ERROR_OK)
2051 return retval;
2052
2053 buffer += bytes_remaining;
2054 addr += bytes_remaining;
2055 count -= bytes_remaining;
2056 }
2057
2058 return retval;
2059 }
2060
2061 /** */
2062 static int stlink_usb_override_target(const char *targetname)
2063 {
2064 return !strcmp(targetname, "cortex_m");
2065 }
2066
2067 static int stlink_speed_swim(void *handle, int khz, bool query)
2068 {
2069 /*
2070 we dont care what the khz rate is
2071 we only have low and high speed...
2072 before changing speed the SWIM_CSR HS bit
2073 must be updated
2074 */
2075 if (khz == 0)
2076 stlink_swim_speed(handle, 0);
2077 else
2078 stlink_swim_speed(handle, 1);
2079 return khz;
2080 }
2081
2082 static int stlink_match_speed_map(const struct speed_map *map, unsigned int map_size, int khz, bool query)
2083 {
2084 unsigned int i;
2085 int speed_index = -1;
2086 int speed_diff = INT_MAX;
2087 bool match = true;
2088
2089 for (i = 0; i < map_size; i++) {
2090 if (khz == map[i].speed) {
2091 speed_index = i;
2092 break;
2093 } else {
2094 int current_diff = khz - map[i].speed;
2095 /* get abs value for comparison */
2096 current_diff = (current_diff > 0) ? current_diff : -current_diff;
2097 if ((current_diff < speed_diff) && khz >= map[i].speed) {
2098 speed_diff = current_diff;
2099 speed_index = i;
2100 }
2101 }
2102 }
2103
2104 if (speed_index == -1) {
2105 /* this will only be here if we cannot match the slow speed.
2106 * use the slowest speed we support.*/
2107 speed_index = map_size - 1;
2108 match = false;
2109 } else if (i == map_size)
2110 match = false;
2111
2112 if (!match && query) {
2113 LOG_INFO("Unable to match requested speed %d kHz, using %d kHz", \
2114 khz, map[speed_index].speed);
2115 }
2116
2117 return speed_index;
2118 }
2119
2120 static int stlink_speed_swd(void *handle, int khz, bool query)
2121 {
2122 int speed_index;
2123 struct stlink_usb_handle_s *h = handle;
2124
2125 /* old firmware cannot change it */
2126 if (!(h->version.flags & STLINK_F_HAS_SWD_SET_FREQ))
2127 return khz;
2128
2129 speed_index = stlink_match_speed_map(stlink_khz_to_speed_map_swd,
2130 ARRAY_SIZE(stlink_khz_to_speed_map_swd), khz, query);
2131
2132 if (!query) {
2133 int result = stlink_usb_set_swdclk(h, stlink_khz_to_speed_map_swd[speed_index].speed_divisor);
2134 if (result != ERROR_OK) {
2135 LOG_ERROR("Unable to set adapter speed");
2136 return khz;
2137 }
2138 }
2139
2140 return stlink_khz_to_speed_map_swd[speed_index].speed;
2141 }
2142
2143 static int stlink_speed_jtag(void *handle, int khz, bool query)
2144 {
2145 int speed_index;
2146 struct stlink_usb_handle_s *h = handle;
2147
2148 /* old firmware cannot change it */
2149 if (!(h->version.flags & STLINK_F_HAS_JTAG_SET_FREQ))
2150 return khz;
2151
2152 speed_index = stlink_match_speed_map(stlink_khz_to_speed_map_jtag,
2153 ARRAY_SIZE(stlink_khz_to_speed_map_jtag), khz, query);
2154
2155 if (!query) {
2156 int result = stlink_usb_set_jtagclk(h, stlink_khz_to_speed_map_jtag[speed_index].speed_divisor);
2157 if (result != ERROR_OK) {
2158 LOG_ERROR("Unable to set adapter speed");
2159 return khz;
2160 }
2161 }
2162
2163 return stlink_khz_to_speed_map_jtag[speed_index].speed;
2164 }
2165
2166 void stlink_dump_speed_map(const struct speed_map *map, unsigned int map_size)
2167 {
2168 unsigned int i;
2169
2170 LOG_DEBUG("Supported clock speeds are:");
2171 for (i = 0; i < map_size; i++)
2172 LOG_DEBUG("%d kHz", map[i].speed);
2173 }
2174
2175 static int stlink_speed(void *handle, int khz, bool query)
2176 {
2177 struct stlink_usb_handle_s *h = handle;
2178
2179 if (!handle)
2180 return khz;
2181
2182 if (h->transport == HL_TRANSPORT_SWIM)
2183 return stlink_speed_swim(handle, khz, query);
2184 else if (h->transport == HL_TRANSPORT_SWD)
2185 return stlink_speed_swd(handle, khz, query);
2186 else if (h->transport == HL_TRANSPORT_JTAG)
2187 return stlink_speed_jtag(handle, khz, query);
2188
2189 return khz;
2190 }
2191
2192 /** */
2193 static int stlink_usb_close(void *handle)
2194 {
2195 int res;
2196 uint8_t mode;
2197 enum stlink_mode emode;
2198 struct stlink_usb_handle_s *h = handle;
2199
2200 if (h && h->fd)
2201 res = stlink_usb_current_mode(handle, &mode);
2202 else
2203 res = ERROR_FAIL;
2204 /* do not exit if return code != ERROR_OK,
2205 it prevents us from closing jtag_libusb */
2206
2207 if (res == ERROR_OK) {
2208 /* try to exit current mode */
2209 switch (mode) {
2210 case STLINK_DEV_DFU_MODE:
2211 emode = STLINK_MODE_DFU;
2212 break;
2213 case STLINK_DEV_DEBUG_MODE:
2214 emode = STLINK_MODE_DEBUG_SWD;
2215 break;
2216 case STLINK_DEV_SWIM_MODE:
2217 emode = STLINK_MODE_DEBUG_SWIM;
2218 break;
2219 case STLINK_DEV_BOOTLOADER_MODE:
2220 case STLINK_DEV_MASS_MODE:
2221 default:
2222 emode = STLINK_MODE_UNKNOWN;
2223 break;
2224 }
2225
2226 if (emode != STLINK_MODE_UNKNOWN)
2227 stlink_usb_mode_leave(handle, emode);
2228 /* do not check return code, it prevent
2229 us from closing jtag_libusb */
2230 }
2231
2232 if (h && h->fd)
2233 jtag_libusb_close(h->fd);
2234
2235 free(h);
2236
2237 return ERROR_OK;
2238 }
2239
2240 /** */
2241 static int stlink_usb_open(struct hl_interface_param_s *param, void **fd)
2242 {
2243 int err, retry_count = 1;
2244 struct stlink_usb_handle_s *h;
2245 enum stlink_jtag_api_version api;
2246
2247 LOG_DEBUG("stlink_usb_open");
2248
2249 h = calloc(1, sizeof(struct stlink_usb_handle_s));
2250
2251 if (h == 0) {
2252 LOG_DEBUG("malloc failed");
2253 return ERROR_FAIL;
2254 }
2255
2256 h->transport = param->transport;
2257
2258 for (unsigned i = 0; param->vid[i]; i++) {
2259 LOG_DEBUG("transport: %d vid: 0x%04x pid: 0x%04x serial: %s",
2260 param->transport, param->vid[i], param->pid[i],
2261 param->serial ? param->serial : "");
2262 }
2263
2264 /*
2265 On certain host USB configurations(e.g. MacBook Air)
2266 STLINKv2 dongle seems to have its FW in a funky state if,
2267 after plugging it in, you try to use openocd with it more
2268 then once (by launching and closing openocd). In cases like
2269 that initial attempt to read the FW info via
2270 stlink_usb_version will fail and the device has to be reset
2271 in order to become operational.
2272 */
2273 do {
2274 if (jtag_libusb_open(param->vid, param->pid, param->serial, &h->fd) != ERROR_OK) {
2275 LOG_ERROR("open failed");
2276 goto error_open;
2277 }
2278
2279 jtag_libusb_set_configuration(h->fd, 0);
2280
2281 if (jtag_libusb_claim_interface(h->fd, 0) != ERROR_OK) {
2282 LOG_DEBUG("claim interface failed");
2283 goto error_open;
2284 }
2285
2286 /* RX EP is common for all versions */
2287 h->rx_ep = STLINK_RX_EP;
2288
2289 uint16_t pid;
2290 if (jtag_libusb_get_pid(jtag_libusb_get_device(h->fd), &pid) != ERROR_OK) {
2291 LOG_DEBUG("libusb_get_pid failed");
2292 goto error_open;
2293 }
2294
2295 /* wrap version for first read */
2296 switch (pid) {
2297 case STLINK_V1_PID:
2298 h->version.stlink = 1;
2299 h->tx_ep = STLINK_TX_EP;
2300 break;
2301 case STLINK_V2_1_PID:
2302 case STLINK_V2_1_NO_MSD_PID:
2303 h->version.stlink = 2;
2304 h->tx_ep = STLINK_V2_1_TX_EP;
2305 h->trace_ep = STLINK_V2_1_TRACE_EP;
2306 break;
2307 default:
2308 /* fall through - we assume V2 to be the default version*/
2309 case STLINK_V2_PID:
2310 h->version.stlink = 2;
2311 h->tx_ep = STLINK_TX_EP;
2312 h->trace_ep = STLINK_TRACE_EP;
2313 break;
2314 }
2315
2316 /* get the device version */
2317 err = stlink_usb_version(h);
2318
2319 if (err == ERROR_OK) {
2320 break;
2321 } else if (h->version.stlink == 1 ||
2322 retry_count == 0) {
2323 LOG_ERROR("read version failed");
2324 goto error_open;
2325 } else {
2326 err = jtag_libusb_release_interface(h->fd, 0);
2327 if (err != ERROR_OK) {
2328 LOG_ERROR("release interface failed");
2329 goto error_open;
2330 }
2331
2332 err = jtag_libusb_reset_device(h->fd);
2333 if (err != ERROR_OK) {
2334 LOG_ERROR("reset device failed");
2335 goto error_open;
2336 }
2337
2338 jtag_libusb_close(h->fd);
2339 /*
2340 Give the device one second to settle down and
2341 reenumerate.
2342 */
2343 usleep(1 * 1000 * 1000);
2344 retry_count--;
2345 }
2346 } while (1);
2347
2348 /* check if mode is supported */
2349 err = ERROR_OK;
2350
2351 switch (h->transport) {
2352 case HL_TRANSPORT_SWD:
2353 if (h->version.jtag_api_max == STLINK_JTAG_API_V1)
2354 err = ERROR_FAIL;
2355 /* fall-through */
2356 case HL_TRANSPORT_JTAG:
2357 if (h->version.jtag == 0)
2358 err = ERROR_FAIL;
2359 break;
2360 case HL_TRANSPORT_SWIM:
2361 if (h->version.swim == 0)
2362 err = ERROR_FAIL;
2363 break;
2364 default:
2365 err = ERROR_FAIL;
2366 break;
2367 }
2368
2369 if (err != ERROR_OK) {
2370 LOG_ERROR("mode (transport) not supported by device");
2371 goto error_open;
2372 }
2373
2374 api = h->version.jtag_api_max;
2375
2376 LOG_INFO("using stlink api v%d", api);
2377
2378 /* set the used jtag api, this will default to the newest supported version */
2379 h->jtag_api = api;
2380
2381 /* initialize the debug hardware */
2382 err = stlink_usb_init_mode(h, param->connect_under_reset);
2383
2384 if (err != ERROR_OK) {
2385 LOG_ERROR("init mode failed (unable to connect to the target)");
2386 goto error_open;
2387 }
2388
2389 if (h->transport == HL_TRANSPORT_SWIM) {
2390 err = stlink_swim_enter(h);
2391 if (err != ERROR_OK) {
2392 LOG_ERROR("stlink_swim_enter_failed (unable to connect to the target)");
2393 goto error_open;
2394 }
2395 *fd = h;
2396 h->max_mem_packet = STLINK_DATA_SIZE;
2397 return ERROR_OK;
2398 }
2399
2400 if (h->transport == HL_TRANSPORT_JTAG) {
2401 if (h->version.flags & STLINK_F_HAS_JTAG_SET_FREQ) {
2402 stlink_dump_speed_map(stlink_khz_to_speed_map_jtag, ARRAY_SIZE(stlink_khz_to_speed_map_jtag));
2403 stlink_speed(h, param->initial_interface_speed, false);
2404 }
2405 } else if (h->transport == HL_TRANSPORT_SWD) {
2406 if (h->version.flags & STLINK_F_HAS_SWD_SET_FREQ) {
2407 stlink_dump_speed_map(stlink_khz_to_speed_map_swd, ARRAY_SIZE(stlink_khz_to_speed_map_swd));
2408 stlink_speed(h, param->initial_interface_speed, false);
2409 }
2410 }
2411
2412 /* get cpuid, so we can determine the max page size
2413 * start with a safe default */
2414 h->max_mem_packet = (1 << 10);
2415
2416 uint8_t buffer[4];
2417 err = stlink_usb_read_mem32(h, CPUID, 4, buffer);
2418 if (err == ERROR_OK) {
2419 uint32_t cpuid = le_to_h_u32(buffer);
2420 int i = (cpuid >> 4) & 0xf;
2421 if (i == 4 || i == 3) {
2422 /* Cortex-M3/M4 has 4096 bytes autoincrement range */
2423 h->max_mem_packet = (1 << 12);
2424 }
2425 }
2426
2427 LOG_DEBUG("Using TAR autoincrement: %" PRIu32, h->max_mem_packet);
2428
2429 *fd = h;
2430
2431 return ERROR_OK;
2432
2433 error_open:
2434 stlink_usb_close(h);
2435
2436 return ERROR_FAIL;
2437 }
2438
2439 int stlink_config_trace(void *handle, bool enabled, enum tpiu_pin_protocol pin_protocol,
2440 uint32_t port_size, unsigned int *trace_freq)
2441 {
2442 struct stlink_usb_handle_s *h = handle;
2443
2444 if (enabled && (!(h->version.flags & STLINK_F_HAS_TRACE) ||
2445 pin_protocol != TPIU_PIN_PROTOCOL_ASYNC_UART)) {
2446 LOG_ERROR("The attached ST-LINK version doesn't support this trace mode");
2447 return ERROR_FAIL;
2448 }
2449
2450 if (!enabled) {
2451 stlink_usb_trace_disable(h);
2452 return ERROR_OK;
2453 }
2454
2455 if (*trace_freq > STLINK_TRACE_MAX_HZ) {
2456 LOG_ERROR("ST-LINK doesn't support SWO frequency higher than %u",
2457 STLINK_TRACE_MAX_HZ);
2458 return ERROR_FAIL;
2459 }
2460
2461 stlink_usb_trace_disable(h);
2462
2463 if (!*trace_freq)
2464 *trace_freq = STLINK_TRACE_MAX_HZ;
2465 h->trace.source_hz = *trace_freq;
2466
2467 return stlink_usb_trace_enable(h);
2468 }
2469
2470 /** */
2471 struct hl_layout_api_s stlink_usb_layout_api = {
2472 /** */
2473 .open = stlink_usb_open,
2474 /** */
2475 .close = stlink_usb_close,
2476 /** */
2477 .idcode = stlink_usb_idcode,
2478 /** */
2479 .state = stlink_usb_state,
2480 /** */
2481 .reset = stlink_usb_reset,
2482 /** */
2483 .assert_srst = stlink_usb_assert_srst,
2484 /** */
2485 .run = stlink_usb_run,
2486 /** */
2487 .halt = stlink_usb_halt,
2488 /** */
2489 .step = stlink_usb_step,
2490 /** */
2491 .read_regs = stlink_usb_read_regs,
2492 /** */
2493 .read_reg = stlink_usb_read_reg,
2494 /** */
2495 .write_reg = stlink_usb_write_reg,
2496 /** */
2497 .read_mem = stlink_usb_read_mem,
2498 /** */
2499 .write_mem = stlink_usb_write_mem,
2500 /** */
2501 .write_debug_reg = stlink_usb_write_debug_reg,
2502 /** */
2503 .override_target = stlink_usb_override_target,
2504 /** */
2505 .speed = stlink_speed,
2506 /** */
2507 .config_trace = stlink_config_trace,
2508 /** */
2509 .poll_trace = stlink_usb_trace_read,
2510 };
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