1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2007,2008 Øyvind Harboe *
6 * oyvind.harboe@zylin.com *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
20 ***************************************************************************/
22 /* 2014-12: Addition of the SWD protocol support is based on the initial work
23 * by Paul Fertser and modifications by Jean-Christian de Rivaz. */
30 #include <jtag/interface.h>
31 #include <jtag/commands.h>
33 /* YUK! - but this is currently a global.... */
34 extern struct jtag_interface
*jtag_interface
;
37 * Function bitbang_stableclocks
38 * issues a number of clock cycles while staying in a stable state.
39 * Because the TMS value required to stay in the RESET state is a 1, whereas
40 * the TMS value required to stay in any of the other stable states is a 0,
41 * this function checks the current stable state to decide on the value of TMS
44 static int bitbang_stableclocks(int num_cycles
);
46 static void bitbang_swd_write_reg(uint8_t cmd
, uint32_t value
, uint32_t ap_delay_clk
);
48 struct bitbang_interface
*bitbang_interface
;
50 /* DANGER!!!! clock absolutely *MUST* be 0 in idle or reset won't work!
52 * Set this to 1 and str912 reset halt will fail.
54 * If someone can submit a patch with an explanation it will be greatly
55 * appreciated, but as far as I can tell (ØH) DCLK is generated upon
56 * clk = 0 in TAP_IDLE. Good luck deducing that from the ARM documentation!
57 * The ARM documentation uses the term "DCLK is asserted while in the TAP_IDLE
58 * state". With hardware there is no such thing as *while* in a state. There
59 * are only edges. So clk => 0 is in fact a very subtle state transition that
60 * happens *while* in the TAP_IDLE state. "#&¤"#¤&"#&"#&
62 * For "reset halt" the last thing that happens before srst is asserted
63 * is that the breakpoint is set up. If DCLK is not wiggled one last
64 * time before the reset, then the breakpoint is not set up and
65 * "reset halt" will fail to halt.
68 #define CLOCK_IDLE() 0
70 /* The bitbang driver leaves the TCK 0 when in idle */
71 static void bitbang_end_state(tap_state_t state
)
73 assert(tap_is_state_stable(state
));
74 tap_set_end_state(state
);
77 static int bitbang_state_move(int skip
)
80 uint8_t tms_scan
= tap_get_tms_path(tap_get_state(), tap_get_end_state());
81 int tms_count
= tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
83 for (i
= skip
; i
< tms_count
; i
++) {
84 tms
= (tms_scan
>> i
) & 1;
85 if (bitbang_interface
->write(0, tms
, 0) != ERROR_OK
)
87 if (bitbang_interface
->write(1, tms
, 0) != ERROR_OK
)
90 if (bitbang_interface
->write(CLOCK_IDLE(), tms
, 0) != ERROR_OK
)
93 tap_set_state(tap_get_end_state());
98 * Clock a bunch of TMS (or SWDIO) transitions, to change the JTAG
99 * (or SWD) state machine.
101 static int bitbang_execute_tms(struct jtag_command
*cmd
)
103 unsigned num_bits
= cmd
->cmd
.tms
->num_bits
;
104 const uint8_t *bits
= cmd
->cmd
.tms
->bits
;
106 DEBUG_JTAG_IO("TMS: %d bits", num_bits
);
109 for (unsigned i
= 0; i
< num_bits
; i
++) {
110 tms
= ((bits
[i
/8] >> (i
% 8)) & 1);
111 if (bitbang_interface
->write(0, tms
, 0) != ERROR_OK
)
113 if (bitbang_interface
->write(1, tms
, 0) != ERROR_OK
)
116 if (bitbang_interface
->write(CLOCK_IDLE(), tms
, 0) != ERROR_OK
)
122 static int bitbang_path_move(struct pathmove_command
*cmd
)
124 int num_states
= cmd
->num_states
;
130 if (tap_state_transition(tap_get_state(), false) == cmd
->path
[state_count
])
132 else if (tap_state_transition(tap_get_state(), true) == cmd
->path
[state_count
])
135 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
136 tap_state_name(tap_get_state()),
137 tap_state_name(cmd
->path
[state_count
]));
141 if (bitbang_interface
->write(0, tms
, 0) != ERROR_OK
)
143 if (bitbang_interface
->write(1, tms
, 0) != ERROR_OK
)
146 tap_set_state(cmd
->path
[state_count
]);
151 if (bitbang_interface
->write(CLOCK_IDLE(), tms
, 0) != ERROR_OK
)
154 tap_set_end_state(tap_get_state());
158 static int bitbang_runtest(int num_cycles
)
162 tap_state_t saved_end_state
= tap_get_end_state();
164 /* only do a state_move when we're not already in IDLE */
165 if (tap_get_state() != TAP_IDLE
) {
166 bitbang_end_state(TAP_IDLE
);
167 if (bitbang_state_move(0) != ERROR_OK
)
171 /* execute num_cycles */
172 for (i
= 0; i
< num_cycles
; i
++) {
173 if (bitbang_interface
->write(0, 0, 0) != ERROR_OK
)
175 if (bitbang_interface
->write(1, 0, 0) != ERROR_OK
)
178 if (bitbang_interface
->write(CLOCK_IDLE(), 0, 0) != ERROR_OK
)
181 /* finish in end_state */
182 bitbang_end_state(saved_end_state
);
183 if (tap_get_state() != tap_get_end_state())
184 if (bitbang_state_move(0) != ERROR_OK
)
190 static int bitbang_stableclocks(int num_cycles
)
192 int tms
= (tap_get_state() == TAP_RESET ?
1 : 0);
195 /* send num_cycles clocks onto the cable */
196 for (i
= 0; i
< num_cycles
; i
++) {
197 if (bitbang_interface
->write(1, tms
, 0) != ERROR_OK
)
199 if (bitbang_interface
->write(0, tms
, 0) != ERROR_OK
)
206 static int bitbang_scan(bool ir_scan
, enum scan_type type
, uint8_t *buffer
,
209 tap_state_t saved_end_state
= tap_get_end_state();
213 (tap_get_state() == TAP_DRSHIFT
)) ||
214 (ir_scan
&& (tap_get_state() == TAP_IRSHIFT
)))) {
216 bitbang_end_state(TAP_IRSHIFT
);
218 bitbang_end_state(TAP_DRSHIFT
);
220 if (bitbang_state_move(0) != ERROR_OK
)
222 bitbang_end_state(saved_end_state
);
226 for (bit_cnt
= 0; bit_cnt
< scan_size
; bit_cnt
++) {
227 int tms
= (bit_cnt
== scan_size
-1) ?
1 : 0;
229 int bytec
= bit_cnt
/8;
230 int bcval
= 1 << (bit_cnt
% 8);
232 /* if we're just reading the scan, but don't care about the output
233 * default to outputting 'low', this also makes valgrind traces more readable,
234 * as it removes the dependency on an uninitialised value
237 if ((type
!= SCAN_IN
) && (buffer
[bytec
] & bcval
))
240 if (bitbang_interface
->write(0, tms
, tdi
) != ERROR_OK
)
243 if (type
!= SCAN_OUT
) {
244 if (bitbang_interface
->buf_size
) {
245 if (bitbang_interface
->sample() != ERROR_OK
)
249 switch (bitbang_interface
->read()) {
251 buffer
[bytec
] &= ~bcval
;
254 buffer
[bytec
] |= bcval
;
262 if (bitbang_interface
->write(1, tms
, tdi
) != ERROR_OK
)
265 if (type
!= SCAN_OUT
&& bitbang_interface
->buf_size
&&
266 (buffered
== bitbang_interface
->buf_size
||
267 bit_cnt
== scan_size
- 1)) {
268 for (unsigned i
= bit_cnt
+ 1 - buffered
; i
<= bit_cnt
; i
++) {
269 switch (bitbang_interface
->read_sample()) {
271 buffer
[i
/8] &= ~(1 << (i
% 8));
274 buffer
[i
/8] |= 1 << (i
% 8);
284 if (tap_get_state() != tap_get_end_state()) {
285 /* we *KNOW* the above loop transitioned out of
286 * the shift state, so we skip the first state
287 * and move directly to the end state.
289 if (bitbang_state_move(1) != ERROR_OK
)
295 int bitbang_execute_queue(void)
297 struct jtag_command
*cmd
= jtag_command_queue
; /* currently processed command */
303 if (!bitbang_interface
) {
304 LOG_ERROR("BUG: Bitbang interface called, but not yet initialized");
308 /* return ERROR_OK, unless a jtag_read_buffer returns a failed check
309 * that wasn't handled by a caller-provided error handler
313 if (bitbang_interface
->blink
) {
314 if (bitbang_interface
->blink(1) != ERROR_OK
)
321 #ifdef _DEBUG_JTAG_IO_
322 LOG_DEBUG("reset trst: %i srst %i",
323 cmd
->cmd
.reset
->trst
,
324 cmd
->cmd
.reset
->srst
);
326 if ((cmd
->cmd
.reset
->trst
== 1) ||
327 (cmd
->cmd
.reset
->srst
&& (jtag_get_reset_config() & RESET_SRST_PULLS_TRST
)))
328 tap_set_state(TAP_RESET
);
329 if (bitbang_interface
->reset(cmd
->cmd
.reset
->trst
,
330 cmd
->cmd
.reset
->srst
) != ERROR_OK
)
334 #ifdef _DEBUG_JTAG_IO_
335 LOG_DEBUG("runtest %i cycles, end in %s",
336 cmd
->cmd
.runtest
->num_cycles
,
337 tap_state_name(cmd
->cmd
.runtest
->end_state
));
339 bitbang_end_state(cmd
->cmd
.runtest
->end_state
);
340 if (bitbang_runtest(cmd
->cmd
.runtest
->num_cycles
) != ERROR_OK
)
344 case JTAG_STABLECLOCKS
:
345 /* this is only allowed while in a stable state. A check for a stable
346 * state was done in jtag_add_clocks()
348 if (bitbang_stableclocks(cmd
->cmd
.stableclocks
->num_cycles
) != ERROR_OK
)
353 #ifdef _DEBUG_JTAG_IO_
354 LOG_DEBUG("statemove end in %s",
355 tap_state_name(cmd
->cmd
.statemove
->end_state
));
357 bitbang_end_state(cmd
->cmd
.statemove
->end_state
);
358 if (bitbang_state_move(0) != ERROR_OK
)
362 #ifdef _DEBUG_JTAG_IO_
363 LOG_DEBUG("pathmove: %i states, end in %s",
364 cmd
->cmd
.pathmove
->num_states
,
365 tap_state_name(cmd
->cmd
.pathmove
->path
[cmd
->cmd
.pathmove
->num_states
- 1]));
367 if (bitbang_path_move(cmd
->cmd
.pathmove
) != ERROR_OK
)
371 bitbang_end_state(cmd
->cmd
.scan
->end_state
);
372 scan_size
= jtag_build_buffer(cmd
->cmd
.scan
, &buffer
);
373 #ifdef _DEBUG_JTAG_IO_
374 LOG_DEBUG("%s scan %d bits; end in %s",
375 (cmd
->cmd
.scan
->ir_scan
) ?
"IR" : "DR",
377 tap_state_name(cmd
->cmd
.scan
->end_state
));
379 type
= jtag_scan_type(cmd
->cmd
.scan
);
380 if (bitbang_scan(cmd
->cmd
.scan
->ir_scan
, type
, buffer
,
381 scan_size
) != ERROR_OK
)
383 if (jtag_read_buffer(buffer
, cmd
->cmd
.scan
) != ERROR_OK
)
384 retval
= ERROR_JTAG_QUEUE_FAILED
;
389 #ifdef _DEBUG_JTAG_IO_
390 LOG_DEBUG("sleep %" PRIi32
, cmd
->cmd
.sleep
->us
);
392 jtag_sleep(cmd
->cmd
.sleep
->us
);
395 retval
= bitbang_execute_tms(cmd
);
398 LOG_ERROR("BUG: unknown JTAG command type encountered");
403 if (bitbang_interface
->blink
) {
404 if (bitbang_interface
->blink(0) != ERROR_OK
)
413 static int queued_retval
;
415 static int bitbang_swd_init(void)
417 LOG_DEBUG("bitbang_swd_init");
422 static void bitbang_exchange(bool rnw
, uint8_t buf
[], unsigned int offset
, unsigned int bit_cnt
)
424 LOG_DEBUG("bitbang_exchange");
427 for (unsigned int i
= offset
; i
< bit_cnt
+ offset
; i
++) {
429 int bcval
= 1 << (i
% 8);
430 tdi
= !rnw
&& (buf
[bytec
] & bcval
);
432 bitbang_interface
->write(0, 0, tdi
);
435 if (bitbang_interface
->swdio_read())
438 buf
[bytec
] &= ~bcval
;
441 bitbang_interface
->write(1, 0, tdi
);
445 int bitbang_swd_switch_seq(enum swd_special_seq seq
)
447 LOG_DEBUG("bitbang_swd_switch_seq");
451 LOG_DEBUG("SWD line reset");
452 bitbang_exchange(false, (uint8_t *)swd_seq_line_reset
, 0, swd_seq_line_reset_len
);
455 LOG_DEBUG("JTAG-to-SWD");
456 bitbang_exchange(false, (uint8_t *)swd_seq_jtag_to_swd
, 0, swd_seq_jtag_to_swd_len
);
459 LOG_DEBUG("SWD-to-JTAG");
460 bitbang_exchange(false, (uint8_t *)swd_seq_swd_to_jtag
, 0, swd_seq_swd_to_jtag_len
);
463 LOG_ERROR("Sequence %d not supported", seq
);
470 void bitbang_switch_to_swd(void)
472 LOG_DEBUG("bitbang_switch_to_swd");
473 bitbang_exchange(false, (uint8_t *)swd_seq_jtag_to_swd
, 0, swd_seq_jtag_to_swd_len
);
476 static void swd_clear_sticky_errors(void)
478 bitbang_swd_write_reg(swd_cmd(false, false, DP_ABORT
),
479 STKCMPCLR
| STKERRCLR
| WDERRCLR
| ORUNERRCLR
, 0);
482 static void bitbang_swd_read_reg(uint8_t cmd
, uint32_t *value
, uint32_t ap_delay_clk
)
484 LOG_DEBUG("bitbang_swd_read_reg");
485 assert(cmd
& SWD_CMD_RnW
);
487 if (queued_retval
!= ERROR_OK
) {
488 LOG_DEBUG("Skip bitbang_swd_read_reg because queued_retval=%d", queued_retval
);
493 uint8_t trn_ack_data_parity_trn
[DIV_ROUND_UP(4 + 3 + 32 + 1 + 4, 8)];
495 cmd
|= SWD_CMD_START
| (1 << 7);
496 bitbang_exchange(false, &cmd
, 0, 8);
498 bitbang_interface
->swdio_drive(false);
499 bitbang_exchange(true, trn_ack_data_parity_trn
, 0, 1 + 3 + 32 + 1 + 1);
500 bitbang_interface
->swdio_drive(true);
502 int ack
= buf_get_u32(trn_ack_data_parity_trn
, 1, 3);
503 uint32_t data
= buf_get_u32(trn_ack_data_parity_trn
, 1 + 3, 32);
504 int parity
= buf_get_u32(trn_ack_data_parity_trn
, 1 + 3 + 32, 1);
506 LOG_DEBUG("%s %s %s reg %X = %08"PRIx32
,
507 ack
== SWD_ACK_OK ?
"OK" : ack
== SWD_ACK_WAIT ?
"WAIT" : ack
== SWD_ACK_FAULT ?
"FAULT" : "JUNK",
508 cmd
& SWD_CMD_APnDP ?
"AP" : "DP",
509 cmd
& SWD_CMD_RnW ?
"read" : "write",
510 (cmd
& SWD_CMD_A32
) >> 1,
515 if (parity
!= parity_u32(data
)) {
516 LOG_DEBUG("Wrong parity detected");
517 queued_retval
= ERROR_FAIL
;
522 if (cmd
& SWD_CMD_APnDP
)
523 bitbang_exchange(true, NULL
, 0, ap_delay_clk
);
526 LOG_DEBUG("SWD_ACK_WAIT");
527 swd_clear_sticky_errors();
530 LOG_DEBUG("SWD_ACK_FAULT");
534 LOG_DEBUG("No valid acknowledge: ack=%d", ack
);
541 static void bitbang_swd_write_reg(uint8_t cmd
, uint32_t value
, uint32_t ap_delay_clk
)
543 LOG_DEBUG("bitbang_swd_write_reg");
544 assert(!(cmd
& SWD_CMD_RnW
));
546 if (queued_retval
!= ERROR_OK
) {
547 LOG_DEBUG("Skip bitbang_swd_write_reg because queued_retval=%d", queued_retval
);
552 uint8_t trn_ack_data_parity_trn
[DIV_ROUND_UP(4 + 3 + 32 + 1 + 4, 8)];
553 buf_set_u32(trn_ack_data_parity_trn
, 1 + 3 + 1, 32, value
);
554 buf_set_u32(trn_ack_data_parity_trn
, 1 + 3 + 1 + 32, 1, parity_u32(value
));
556 cmd
|= SWD_CMD_START
| (1 << 7);
557 bitbang_exchange(false, &cmd
, 0, 8);
559 bitbang_interface
->swdio_drive(false);
560 bitbang_exchange(true, trn_ack_data_parity_trn
, 0, 1 + 3 + 1);
561 bitbang_interface
->swdio_drive(true);
562 bitbang_exchange(false, trn_ack_data_parity_trn
, 1 + 3 + 1, 32 + 1);
564 int ack
= buf_get_u32(trn_ack_data_parity_trn
, 1, 3);
565 LOG_DEBUG("%s %s %s reg %X = %08"PRIx32
,
566 ack
== SWD_ACK_OK ?
"OK" : ack
== SWD_ACK_WAIT ?
"WAIT" : ack
== SWD_ACK_FAULT ?
"FAULT" : "JUNK",
567 cmd
& SWD_CMD_APnDP ?
"AP" : "DP",
568 cmd
& SWD_CMD_RnW ?
"read" : "write",
569 (cmd
& SWD_CMD_A32
) >> 1,
570 buf_get_u32(trn_ack_data_parity_trn
, 1 + 3 + 1, 32));
574 if (cmd
& SWD_CMD_APnDP
)
575 bitbang_exchange(true, NULL
, 0, ap_delay_clk
);
578 LOG_DEBUG("SWD_ACK_WAIT");
579 swd_clear_sticky_errors();
582 LOG_DEBUG("SWD_ACK_FAULT");
586 LOG_DEBUG("No valid acknowledge: ack=%d", ack
);
593 static int bitbang_swd_run_queue(void)
595 LOG_DEBUG("bitbang_swd_run_queue");
596 /* A transaction must be followed by another transaction or at least 8 idle cycles to
597 * ensure that data is clocked through the AP. */
598 bitbang_exchange(true, NULL
, 0, 8);
600 int retval
= queued_retval
;
601 queued_retval
= ERROR_OK
;
602 LOG_DEBUG("SWD queue return value: %02x", retval
);
606 const struct swd_driver bitbang_swd
= {
607 .init
= bitbang_swd_init
,
608 .switch_seq
= bitbang_swd_switch_seq
,
609 .read_reg
= bitbang_swd_read_reg
,
610 .write_reg
= bitbang_swd_write_reg
,
611 .run
= bitbang_swd_run_queue
,