1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2007,2008 Øyvind Harboe *
6 * oyvind.harboe@zylin.com *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 /* project specific includes */
33 #include "configuration.h"
40 bitbang_interface_t
*bitbang_interface
;
42 /* DANGER!!!! clock absolutely *MUST* be 0 in idle or reset won't work!
44 * Set this to 1 and str912 reset halt will fail.
46 * If someone can submit a patch with an explanation it will be greatly
47 * appreciated, but as far as I can tell (ØH) DCLK is generated upon
48 * clk=0 in TAP_IDLE. Good luck deducing that from the ARM documentation!
49 * The ARM documentation uses the term "DCLK is asserted while in the TAP_IDLE
50 * state". With hardware there is no such thing as *while* in a state. There
51 * are only edges. So clk => 0 is in fact a very subtle state transition that
52 * happens *while* in the TAP_IDLE state. "#&¤"#¤&"#&"#&
54 * For "reset halt" the last thing that happens before srst is asserted
55 * is that the breakpoint is set up. If DCLK is not wiggled one last
56 * time before the reset, then the breakpoint is not set up and
57 * "reset halt" will fail to halt.
60 #define CLOCK_IDLE() 0
62 int bitbang_execute_queue(void);
64 /* The bitbang driver leaves the TCK 0 when in idle */
66 void bitbang_end_state(enum tap_state state
)
68 if (tap_move_map
[state
] != -1)
72 LOG_ERROR("BUG: %i is not a valid end state", state
);
77 void bitbang_state_move(void) {
80 u8 tms_scan
= TAP_MOVE(cur_state
, end_state
);
82 for (i
= 0; i
< 7; i
++)
84 tms
= (tms_scan
>> i
) & 1;
85 bitbang_interface
->write(0, tms
, 0);
86 bitbang_interface
->write(1, tms
, 0);
88 bitbang_interface
->write(CLOCK_IDLE(), tms
, 0);
90 cur_state
= end_state
;
93 void bitbang_path_move(pathmove_command_t
*cmd
)
95 int num_states
= cmd
->num_states
;
102 if (tap_transitions
[cur_state
].low
== cmd
->path
[state_count
])
106 else if (tap_transitions
[cur_state
].high
== cmd
->path
[state_count
])
112 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_strings
[cur_state
], tap_state_strings
[cmd
->path
[state_count
]]);
116 bitbang_interface
->write(0, tms
, 0);
117 bitbang_interface
->write(1, tms
, 0);
119 cur_state
= cmd
->path
[state_count
];
124 bitbang_interface
->write(CLOCK_IDLE(), tms
, 0);
126 end_state
= cur_state
;
129 void bitbang_runtest(int num_cycles
)
133 enum tap_state saved_end_state
= end_state
;
135 /* only do a state_move when we're not already in IDLE */
136 if (cur_state
!= TAP_IDLE
)
138 bitbang_end_state(TAP_IDLE
);
139 bitbang_state_move();
142 /* execute num_cycles */
143 for (i
= 0; i
< num_cycles
; i
++)
145 bitbang_interface
->write(0, 0, 0);
146 bitbang_interface
->write(1, 0, 0);
148 bitbang_interface
->write(CLOCK_IDLE(), 0, 0);
150 /* finish in end_state */
151 bitbang_end_state(saved_end_state
);
152 if (cur_state
!= end_state
)
153 bitbang_state_move();
156 void bitbang_scan(int ir_scan
, enum scan_type type
, u8
*buffer
, int scan_size
)
158 enum tap_state saved_end_state
= end_state
;
161 if (!((!ir_scan
&& (cur_state
== TAP_DRSHIFT
)) || (ir_scan
&& (cur_state
== TAP_IRSHIFT
))))
164 bitbang_end_state(TAP_IRSHIFT
);
166 bitbang_end_state(TAP_DRSHIFT
);
168 bitbang_state_move();
169 bitbang_end_state(saved_end_state
);
172 for (bit_cnt
= 0; bit_cnt
< scan_size
; bit_cnt
++)
175 int tms
=(bit_cnt
==scan_size
-1) ? 1 : 0;
178 int bcval
=1<<(bit_cnt
% 8);
180 /* if we're just reading the scan, but don't care about the output
181 * default to outputting 'low', this also makes valgrind traces more readable,
182 * as it removes the dependency on an uninitialised value
185 if ((type
!= SCAN_IN
) && (buffer
[bytec
] & bcval
))
188 bitbang_interface
->write(0, tms
, tdi
);
191 val
=bitbang_interface
->read();
193 bitbang_interface
->write(1, tms
, tdi
);
195 if (type
!= SCAN_OUT
)
198 buffer
[bytec
] |= bcval
;
200 buffer
[bytec
] &= ~bcval
;
204 /* TAP_DRSHIFT & TAP_IRSHIFT are illegal end states, so we always transition to the pause
205 * state which is a legal stable state from which statemove will work.
209 bitbang_interface
->write(0, 0, 0);
210 bitbang_interface
->write(1, 0, 0);
211 bitbang_interface
->write(CLOCK_IDLE(), 0, 0);
214 cur_state
= TAP_IRPAUSE
;
216 cur_state
= TAP_DRPAUSE
;
218 if (cur_state
!= end_state
)
219 bitbang_state_move();
222 int bitbang_execute_queue(void)
224 jtag_command_t
*cmd
= jtag_command_queue
; /* currently processed command */
230 if (!bitbang_interface
)
232 LOG_ERROR("BUG: Bitbang interface called, but not yet initialized");
236 /* return ERROR_OK, unless a jtag_read_buffer returns a failed check
237 * that wasn't handled by a caller-provided error handler
241 if(bitbang_interface
->blink
)
242 bitbang_interface
->blink(1);
249 #ifdef _DEBUG_JTAG_IO_
250 LOG_DEBUG("end_state: %i", cmd
->cmd
.end_state
->end_state
);
252 if (cmd
->cmd
.end_state
->end_state
!= -1)
253 bitbang_end_state(cmd
->cmd
.end_state
->end_state
);
256 #ifdef _DEBUG_JTAG_IO_
257 LOG_DEBUG("reset trst: %i srst %i", cmd
->cmd
.reset
->trst
, cmd
->cmd
.reset
->srst
);
259 if ((cmd
->cmd
.reset
->trst
== 1) || (cmd
->cmd
.reset
->srst
&& (jtag_reset_config
& RESET_SRST_PULLS_TRST
)))
261 cur_state
= TAP_RESET
;
263 bitbang_interface
->reset(cmd
->cmd
.reset
->trst
, cmd
->cmd
.reset
->srst
);
266 #ifdef _DEBUG_JTAG_IO_
267 LOG_DEBUG("runtest %i cycles, end in %i", cmd
->cmd
.runtest
->num_cycles
, cmd
->cmd
.runtest
->end_state
);
269 if (cmd
->cmd
.runtest
->end_state
!= -1)
270 bitbang_end_state(cmd
->cmd
.runtest
->end_state
);
271 bitbang_runtest(cmd
->cmd
.runtest
->num_cycles
);
274 #ifdef _DEBUG_JTAG_IO_
275 LOG_DEBUG("statemove end in %i", cmd
->cmd
.statemove
->end_state
);
277 if (cmd
->cmd
.statemove
->end_state
!= -1)
278 bitbang_end_state(cmd
->cmd
.statemove
->end_state
);
279 bitbang_state_move();
282 #ifdef _DEBUG_JTAG_IO_
283 LOG_DEBUG("pathmove: %i states, end in %i", cmd
->cmd
.pathmove
->num_states
, cmd
->cmd
.pathmove
->path
[cmd
->cmd
.pathmove
->num_states
- 1]);
285 bitbang_path_move(cmd
->cmd
.pathmove
);
288 #ifdef _DEBUG_JTAG_IO_
289 LOG_DEBUG("%s scan end in %i", (cmd
->cmd
.scan
->ir_scan
) ? "IR" : "DR", cmd
->cmd
.scan
->end_state
);
291 if (cmd
->cmd
.scan
->end_state
!= -1)
292 bitbang_end_state(cmd
->cmd
.scan
->end_state
);
293 scan_size
= jtag_build_buffer(cmd
->cmd
.scan
, &buffer
);
294 type
= jtag_scan_type(cmd
->cmd
.scan
);
295 bitbang_scan(cmd
->cmd
.scan
->ir_scan
, type
, buffer
, scan_size
);
296 if (jtag_read_buffer(buffer
, cmd
->cmd
.scan
) != ERROR_OK
)
297 retval
= ERROR_JTAG_QUEUE_FAILED
;
302 #ifdef _DEBUG_JTAG_IO_
303 LOG_DEBUG("sleep %i", cmd
->cmd
.sleep
->us
);
305 jtag_sleep(cmd
->cmd
.sleep
->us
);
308 LOG_ERROR("BUG: unknown JTAG command type encountered");
313 if(bitbang_interface
->blink
)
314 bitbang_interface
->blink(0);
Linking to existing account procedure
If you already have an account and want to add another login method
you
MUST first sign in with your existing account and
then change URL to read
https://review.openocd.org/login/?link
to get to this page again but this time it'll work for linking. Thank you.
SSH host keys fingerprints
1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=.. |
|+o.. . |
|*.o . . |
|+B . . . |
|Bo. = o S |
|Oo.+ + = |
|oB=.* = . o |
| =+=.+ + E |
|. .=o . o |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)