1678c682deea7b2822e6e2dc8ffedbbcfc1bfb3b
[openocd.git] / src / jtag / aice / aice_usb.h
1 /***************************************************************************
2 * Copyright (C) 2013 by Andes Technology *
3 * Hsiangkai Wang <hkwang@andestech.com> *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
19 ***************************************************************************/
20 #ifndef __AICE_USB_H__
21 #define __AICE_USB_H__
22
23 #include "aice_port.h"
24
25 /* AICE USB timeout value */
26 #define AICE_USB_TIMEOUT 5000
27
28 /* AICE USB buffer size */
29 #define AICE_IN_BUFFER_SIZE 2048
30 #define AICE_OUT_BUFFER_SIZE 2048
31 #define AICE_IN_PACKETS_BUFFER_SIZE 2048
32 #define AICE_OUT_PACKETS_BUFFER_SIZE 2048
33
34 /* Constants for AICE command */
35 #define AICE_CMD_SCAN_CHAIN 0x00
36 #define AICE_CMD_SELECT_TARGET 0x01
37 #define AICE_CMD_READ_DIM 0x02
38 #define AICE_CMD_READ_EDMSR 0x03
39 #define AICE_CMD_READ_DTR 0x04
40 #define AICE_CMD_READ_MEM 0x05
41 #define AICE_CMD_READ_MISC 0x06
42 #define AICE_CMD_FASTREAD_MEM 0x07
43 #define AICE_CMD_WRITE_DIM 0x08
44 #define AICE_CMD_WRITE_EDMSR 0x09
45 #define AICE_CMD_WRITE_DTR 0x0A
46 #define AICE_CMD_WRITE_MEM 0x0B
47 #define AICE_CMD_WRITE_MISC 0x0C
48 #define AICE_CMD_FASTWRITE_MEM 0x0D
49 #define AICE_CMD_EXECUTE 0x0E
50 #define AICE_CMD_READ_MEM_B 0x14
51 #define AICE_CMD_READ_MEM_H 0x15
52 #define AICE_CMD_T_READ_MISC 0x20
53 #define AICE_CMD_T_READ_EDMSR 0x21
54 #define AICE_CMD_T_READ_DTR 0x22
55 #define AICE_CMD_T_READ_DIM 0x23
56 #define AICE_CMD_T_READ_MEM_B 0x24
57 #define AICE_CMD_T_READ_MEM_H 0x25
58 #define AICE_CMD_T_READ_MEM 0x26
59 #define AICE_CMD_T_FASTREAD_MEM 0x27
60 #define AICE_CMD_T_WRITE_MISC 0x28
61 #define AICE_CMD_T_WRITE_EDMSR 0x29
62 #define AICE_CMD_T_WRITE_DTR 0x2A
63 #define AICE_CMD_T_WRITE_DIM 0x2B
64 #define AICE_CMD_T_WRITE_MEM_B 0x2C
65 #define AICE_CMD_T_WRITE_MEM_H 0x2D
66 #define AICE_CMD_T_WRITE_MEM 0x2E
67 #define AICE_CMD_T_FASTWRITE_MEM 0x2F
68 #define AICE_CMD_T_GET_TRACE_STATUS 0x36
69 #define AICE_CMD_T_EXECUTE 0x3E
70 #define AICE_CMD_AICE_PROGRAM_READ 0x40
71 #define AICE_CMD_AICE_PROGRAM_WRITE 0x41
72 #define AICE_CMD_AICE_PROGRAM_CONTROL 0x42
73 #define AICE_CMD_READ_CTRL 0x50
74 #define AICE_CMD_WRITE_CTRL 0x51
75 #define AICE_CMD_BATCH_BUFFER_READ 0x60
76 #define AICE_CMD_READ_DTR_TO_BUFFER 0x61
77 #define AICE_CMD_BATCH_BUFFER_WRITE 0x68
78 #define AICE_CMD_WRITE_DTR_FROM_BUFFER 0x69
79
80 /* Constants for AICE command format length */
81 #define AICE_FORMAT_HTDA 3
82 #define AICE_FORMAT_HTDB 6
83 #define AICE_FORMAT_HTDC 7
84 #define AICE_FORMAT_HTDD 10
85 #define AICE_FORMAT_HTDMA 4
86 #define AICE_FORMAT_HTDMB 8
87 #define AICE_FORMAT_HTDMC 8
88 #define AICE_FORMAT_HTDMD 12
89 #define AICE_FORMAT_DTHA 6
90 #define AICE_FORMAT_DTHB 2
91 #define AICE_FORMAT_DTHMA 8
92 #define AICE_FORMAT_DTHMB 4
93
94 /* Constants for AICE command READ_CTRL */
95 #define AICE_READ_CTRL_GET_ICE_STATE 0x00
96 #define AICE_READ_CTRL_GET_HARDWARE_VERSION 0x01
97 #define AICE_READ_CTRL_GET_FPGA_VERSION 0x02
98 #define AICE_READ_CTRL_GET_FIRMWARE_VERSION 0x03
99 #define AICE_READ_CTRL_GET_JTAG_PIN_STATUS 0x04
100
101 /* Constants for AICE command WRITE_CTRL */
102 #define AICE_WRITE_CTRL_TCK_CONTROL 0x00
103 #define AICE_WRITE_CTRL_JTAG_PIN_CONTROL 0x01
104 #define AICE_WRITE_CTRL_CLEAR_TIMEOUT_STATUS 0x02
105 #define AICE_WRITE_CTRL_RESERVED 0x03
106 #define AICE_WRITE_CTRL_JTAG_PIN_STATUS 0x04
107 #define AICE_WRITE_CTRL_CUSTOM_DELAY 0x0d
108
109 /* Constants for AICE command WRITE_CTRL:TCK_CONTROL */
110 #define AICE_TCK_CONTROL_TCK3048 0x08
111
112 /* Constants for AICE command WRITE_CTRL:JTAG_PIN_CONTROL */
113 #define AICE_JTAG_PIN_CONTROL_SRST 0x01
114 #define AICE_JTAG_PIN_CONTROL_TRST 0x02
115 #define AICE_JTAG_PIN_CONTROL_STOP 0x04
116 #define AICE_JTAG_PIN_CONTROL_RESTART 0x08
117
118 /* Constants for AICE command WRITE_CTRL:TCK_CONTROL */
119 #define AICE_TCK_CONTROL_TCK_SCAN 0x10
120
121 /* Custom SRST/DBGI/TRST */
122 #define AICE_CUSTOM_DELAY_SET_SRST 0x01
123 #define AICE_CUSTOM_DELAY_CLEAN_SRST 0x02
124 #define AICE_CUSTOM_DELAY_SET_DBGI 0x04
125 #define AICE_CUSTOM_DELAY_CLEAN_DBGI 0x08
126 #define AICE_CUSTOM_DELAY_SET_TRST 0x10
127 #define AICE_CUSTOM_DELAY_CLEAN_TRST 0x20
128
129 struct aice_usb_handler_s {
130 unsigned int usb_read_ep;
131 unsigned int usb_write_ep;
132 struct jtag_libusb_device_handle *usb_handle;
133 };
134
135 extern struct aice_port_api_s aice_usb_api;
136
137 int aice_read_ctrl(uint32_t address, uint32_t *data);
138 int aice_write_ctrl(uint32_t address, uint32_t data);
139
140 #endif

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