1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
27 #include "replacements.h"
34 #include "algorithm.h"
35 #include "binarybuffer.h"
40 static int stm32x_register_commands(struct command_context_s
*cmd_ctx
);
41 static int stm32x_flash_bank_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct flash_bank_s
*bank
);
42 static int stm32x_erase(struct flash_bank_s
*bank
, int first
, int last
);
43 static int stm32x_protect(struct flash_bank_s
*bank
, int set
, int first
, int last
);
44 static int stm32x_write(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 count
);
45 static int stm32x_probe(struct flash_bank_s
*bank
);
46 static int stm32x_auto_probe(struct flash_bank_s
*bank
);
47 //static int stm32x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
48 static int stm32x_protect_check(struct flash_bank_s
*bank
);
49 static int stm32x_info(struct flash_bank_s
*bank
, char *buf
, int buf_size
);
51 static int stm32x_handle_lock_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
52 static int stm32x_handle_unlock_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
53 static int stm32x_handle_options_read_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
54 static int stm32x_handle_options_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
55 static int stm32x_handle_mass_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
56 static int stm32x_mass_erase(struct flash_bank_s
*bank
);
58 flash_driver_t stm32x_flash
=
61 .register_commands
= stm32x_register_commands
,
62 .flash_bank_command
= stm32x_flash_bank_command
,
63 .erase
= stm32x_erase
,
64 .protect
= stm32x_protect
,
65 .write
= stm32x_write
,
66 .probe
= stm32x_probe
,
67 .auto_probe
= stm32x_auto_probe
,
68 .erase_check
= default_flash_mem_blank_check
,
69 .protect_check
= stm32x_protect_check
,
73 static int stm32x_register_commands(struct command_context_s
*cmd_ctx
)
75 command_t
*stm32x_cmd
= register_command(cmd_ctx
, NULL
, "stm32x", NULL
, COMMAND_ANY
, "stm32x flash specific commands");
77 register_command(cmd_ctx
, stm32x_cmd
, "lock", stm32x_handle_lock_command
, COMMAND_EXEC
,
79 register_command(cmd_ctx
, stm32x_cmd
, "unlock", stm32x_handle_unlock_command
, COMMAND_EXEC
,
80 "unlock protected device");
81 register_command(cmd_ctx
, stm32x_cmd
, "mass_erase", stm32x_handle_mass_erase_command
, COMMAND_EXEC
,
83 register_command(cmd_ctx
, stm32x_cmd
, "options_read", stm32x_handle_options_read_command
, COMMAND_EXEC
,
84 "read device option bytes");
85 register_command(cmd_ctx
, stm32x_cmd
, "options_write", stm32x_handle_options_write_command
, COMMAND_EXEC
,
86 "write device option bytes");
90 /* flash bank stm32x <base> <size> 0 0 <target#>
92 static int stm32x_flash_bank_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct flash_bank_s
*bank
)
94 stm32x_flash_bank_t
*stm32x_info
;
98 LOG_WARNING("incomplete flash_bank stm32x configuration");
99 return ERROR_FLASH_BANK_INVALID
;
102 stm32x_info
= malloc(sizeof(stm32x_flash_bank_t
));
103 bank
->driver_priv
= stm32x_info
;
105 stm32x_info
->write_algorithm
= NULL
;
106 stm32x_info
->probed
= 0;
111 static u32
stm32x_get_flash_status(flash_bank_t
*bank
)
113 target_t
*target
= bank
->target
;
116 target_read_u32(target
, STM32_FLASH_SR
, &status
);
121 static u32
stm32x_wait_status_busy(flash_bank_t
*bank
, int timeout
)
123 target_t
*target
= bank
->target
;
126 /* wait for busy to clear */
127 while (((status
= stm32x_get_flash_status(bank
)) & FLASH_BSY
) && (timeout
-- > 0))
129 LOG_DEBUG("status: 0x%x", status
);
132 /* Clear but report errors */
133 if (status
& (FLASH_WRPRTERR
|FLASH_PGERR
))
135 target_write_u32(target
, STM32_FLASH_SR
, FLASH_WRPRTERR
|FLASH_PGERR
);
140 static int stm32x_read_options(struct flash_bank_s
*bank
)
143 stm32x_flash_bank_t
*stm32x_info
= NULL
;
144 target_t
*target
= bank
->target
;
146 stm32x_info
= bank
->driver_priv
;
148 /* read current option bytes */
149 target_read_u32(target
, STM32_FLASH_OBR
, &optiondata
);
151 stm32x_info
->option_bytes
.user_options
= (u16
)0xFFF8|((optiondata
>> 2) & 0x07);
152 stm32x_info
->option_bytes
.RDP
= (optiondata
& (1 << OPT_READOUT
)) ? 0xFFFF : 0x5AA5;
154 if (optiondata
& (1 << OPT_READOUT
))
155 LOG_INFO("Device Security Bit Set");
157 /* each bit refers to a 4bank protection */
158 target_read_u32(target
, STM32_FLASH_WRPR
, &optiondata
);
160 stm32x_info
->option_bytes
.protection
[0] = (u16
)optiondata
;
161 stm32x_info
->option_bytes
.protection
[1] = (u16
)(optiondata
>> 8);
162 stm32x_info
->option_bytes
.protection
[2] = (u16
)(optiondata
>> 16);
163 stm32x_info
->option_bytes
.protection
[3] = (u16
)(optiondata
>> 24);
168 static int stm32x_erase_options(struct flash_bank_s
*bank
)
170 stm32x_flash_bank_t
*stm32x_info
= NULL
;
171 target_t
*target
= bank
->target
;
174 stm32x_info
= bank
->driver_priv
;
176 /* read current options */
177 stm32x_read_options(bank
);
179 /* unlock flash registers */
180 target_write_u32(target
, STM32_FLASH_KEYR
, KEY1
);
181 target_write_u32(target
, STM32_FLASH_KEYR
, KEY2
);
183 /* unlock option flash registers */
184 target_write_u32(target
, STM32_FLASH_OPTKEYR
, KEY1
);
185 target_write_u32(target
, STM32_FLASH_OPTKEYR
, KEY2
);
187 /* erase option bytes */
188 target_write_u32(target
, STM32_FLASH_CR
, FLASH_OPTER
|FLASH_OPTWRE
);
189 target_write_u32(target
, STM32_FLASH_CR
, FLASH_OPTER
|FLASH_STRT
|FLASH_OPTWRE
);
191 status
= stm32x_wait_status_busy(bank
, 10);
193 if( status
& FLASH_WRPRTERR
)
194 return ERROR_FLASH_OPERATION_FAILED
;
195 if( status
& FLASH_PGERR
)
196 return ERROR_FLASH_OPERATION_FAILED
;
198 /* clear readout protection and complementary option bytes
199 * this will also force a device unlock if set */
200 stm32x_info
->option_bytes
.RDP
= 0x5AA5;
205 static int stm32x_write_options(struct flash_bank_s
*bank
)
207 stm32x_flash_bank_t
*stm32x_info
= NULL
;
208 target_t
*target
= bank
->target
;
211 stm32x_info
= bank
->driver_priv
;
213 /* unlock flash registers */
214 target_write_u32(target
, STM32_FLASH_KEYR
, KEY1
);
215 target_write_u32(target
, STM32_FLASH_KEYR
, KEY2
);
217 /* unlock option flash registers */
218 target_write_u32(target
, STM32_FLASH_OPTKEYR
, KEY1
);
219 target_write_u32(target
, STM32_FLASH_OPTKEYR
, KEY2
);
221 /* program option bytes */
222 target_write_u32(target
, STM32_FLASH_CR
, FLASH_OPTPG
|FLASH_OPTWRE
);
224 /* write user option byte */
225 target_write_u16(target
, STM32_OB_USER
, stm32x_info
->option_bytes
.user_options
);
227 status
= stm32x_wait_status_busy(bank
, 10);
229 if( status
& FLASH_WRPRTERR
)
230 return ERROR_FLASH_OPERATION_FAILED
;
231 if( status
& FLASH_PGERR
)
232 return ERROR_FLASH_OPERATION_FAILED
;
234 /* write protection byte 1 */
235 target_write_u16(target
, STM32_OB_WRP0
, stm32x_info
->option_bytes
.protection
[0]);
237 status
= stm32x_wait_status_busy(bank
, 10);
239 if( status
& FLASH_WRPRTERR
)
240 return ERROR_FLASH_OPERATION_FAILED
;
241 if( status
& FLASH_PGERR
)
242 return ERROR_FLASH_OPERATION_FAILED
;
244 /* write protection byte 2 */
245 target_write_u16(target
, STM32_OB_WRP1
, stm32x_info
->option_bytes
.protection
[1]);
247 status
= stm32x_wait_status_busy(bank
, 10);
249 if( status
& FLASH_WRPRTERR
)
250 return ERROR_FLASH_OPERATION_FAILED
;
251 if( status
& FLASH_PGERR
)
252 return ERROR_FLASH_OPERATION_FAILED
;
254 /* write protection byte 3 */
255 target_write_u16(target
, STM32_OB_WRP2
, stm32x_info
->option_bytes
.protection
[2]);
257 status
= stm32x_wait_status_busy(bank
, 10);
259 if( status
& FLASH_WRPRTERR
)
260 return ERROR_FLASH_OPERATION_FAILED
;
261 if( status
& FLASH_PGERR
)
262 return ERROR_FLASH_OPERATION_FAILED
;
264 /* write protection byte 4 */
265 target_write_u16(target
, STM32_OB_WRP3
, stm32x_info
->option_bytes
.protection
[3]);
267 status
= stm32x_wait_status_busy(bank
, 10);
269 if( status
& FLASH_WRPRTERR
)
270 return ERROR_FLASH_OPERATION_FAILED
;
271 if( status
& FLASH_PGERR
)
272 return ERROR_FLASH_OPERATION_FAILED
;
274 /* write readout protection bit */
275 target_write_u16(target
, STM32_OB_RDP
, stm32x_info
->option_bytes
.RDP
);
277 status
= stm32x_wait_status_busy(bank
, 10);
279 if( status
& FLASH_WRPRTERR
)
280 return ERROR_FLASH_OPERATION_FAILED
;
281 if( status
& FLASH_PGERR
)
282 return ERROR_FLASH_OPERATION_FAILED
;
284 target_write_u32(target
, STM32_FLASH_CR
, FLASH_LOCK
);
289 static int stm32x_protect_check(struct flash_bank_s
*bank
)
291 target_t
*target
= bank
->target
;
292 stm32x_flash_bank_t
*stm32x_info
= bank
->driver_priv
;
299 if (target
->state
!= TARGET_HALTED
)
301 LOG_ERROR("Target not halted");
302 return ERROR_TARGET_NOT_HALTED
;
305 /* medium density - each bit refers to a 4bank protection
306 * high density - each bit refers to a 2bank protection */
307 target_read_u32(target
, STM32_FLASH_WRPR
, &protection
);
309 /* medium density - each protection bit is for 4 * 1K pages
310 * high density - each protection bit is for 2 * 2K pages */
311 num_bits
= (bank
->num_sectors
/ stm32x_info
->ppage_size
);
313 if (stm32x_info
->ppage_size
== 2)
315 /* high density flash */
319 if (protection
& (1 << 31))
322 /* bit 31 controls sector 62 - 255 protection */
323 for (s
= 62; s
< bank
->num_sectors
; s
++)
325 bank
->sectors
[s
].is_protected
= set
;
328 if (bank
->num_sectors
> 61)
331 for (i
= 0; i
< num_bits
; i
++)
335 if (protection
& (1 << i
))
338 for (s
= 0; s
< stm32x_info
->ppage_size
; s
++)
339 bank
->sectors
[(i
* stm32x_info
->ppage_size
) + s
].is_protected
= set
;
344 /* medium density flash */
345 for (i
= 0; i
< num_bits
; i
++)
349 if( protection
& (1 << i
))
352 for (s
= 0; s
< stm32x_info
->ppage_size
; s
++)
353 bank
->sectors
[(i
* stm32x_info
->ppage_size
) + s
].is_protected
= set
;
360 static int stm32x_erase(struct flash_bank_s
*bank
, int first
, int last
)
362 target_t
*target
= bank
->target
;
366 if (bank
->target
->state
!= TARGET_HALTED
)
368 LOG_ERROR("Target not halted");
369 return ERROR_TARGET_NOT_HALTED
;
372 if ((first
== 0) && (last
== (bank
->num_sectors
- 1)))
374 return stm32x_mass_erase(bank
);
377 /* unlock flash registers */
378 target_write_u32(target
, STM32_FLASH_KEYR
, KEY1
);
379 target_write_u32(target
, STM32_FLASH_KEYR
, KEY2
);
381 for (i
= first
; i
<= last
; i
++)
383 target_write_u32(target
, STM32_FLASH_CR
, FLASH_PER
);
384 target_write_u32(target
, STM32_FLASH_AR
, bank
->base
+ bank
->sectors
[i
].offset
);
385 target_write_u32(target
, STM32_FLASH_CR
, FLASH_PER
|FLASH_STRT
);
387 status
= stm32x_wait_status_busy(bank
, 10);
389 if( status
& FLASH_WRPRTERR
)
390 return ERROR_FLASH_OPERATION_FAILED
;
391 if( status
& FLASH_PGERR
)
392 return ERROR_FLASH_OPERATION_FAILED
;
393 bank
->sectors
[i
].is_erased
= 1;
396 target_write_u32(target
, STM32_FLASH_CR
, FLASH_LOCK
);
401 static int stm32x_protect(struct flash_bank_s
*bank
, int set
, int first
, int last
)
403 stm32x_flash_bank_t
*stm32x_info
= NULL
;
404 target_t
*target
= bank
->target
;
405 u16 prot_reg
[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
410 stm32x_info
= bank
->driver_priv
;
412 if (target
->state
!= TARGET_HALTED
)
414 LOG_ERROR("Target not halted");
415 return ERROR_TARGET_NOT_HALTED
;
418 if ((first
&& (first
% stm32x_info
->ppage_size
)) || ((last
+ 1) && (last
+ 1) % stm32x_info
->ppage_size
))
420 LOG_WARNING("sector start/end incorrect - stm32 has %dK sector protection", stm32x_info
->ppage_size
);
421 return ERROR_FLASH_SECTOR_INVALID
;
424 /* medium density - each bit refers to a 4bank protection
425 * high density - each bit refers to a 2bank protection */
426 target_read_u32(target
, STM32_FLASH_WRPR
, &protection
);
428 prot_reg
[0] = (u16
)protection
;
429 prot_reg
[1] = (u16
)(protection
>> 8);
430 prot_reg
[2] = (u16
)(protection
>> 16);
431 prot_reg
[3] = (u16
)(protection
>> 24);
433 if (stm32x_info
->ppage_size
== 2)
435 /* high density flash */
437 /* bit 7 controls sector 62 - 255 protection */
441 prot_reg
[3] &= ~(1 << 7);
443 prot_reg
[3] |= (1 << 7);
451 for (i
= first
; i
<= last
; i
++)
453 reg
= (i
/ stm32x_info
->ppage_size
) / 8;
454 bit
= (i
/ stm32x_info
->ppage_size
) - (reg
* 8);
457 prot_reg
[reg
] &= ~(1 << bit
);
459 prot_reg
[reg
] |= (1 << bit
);
464 /* medium density flash */
465 for (i
= first
; i
<= last
; i
++)
467 reg
= (i
/ stm32x_info
->ppage_size
) / 8;
468 bit
= (i
/ stm32x_info
->ppage_size
) - (reg
* 8);
471 prot_reg
[reg
] &= ~(1 << bit
);
473 prot_reg
[reg
] |= (1 << bit
);
477 if ((status
= stm32x_erase_options(bank
)) != ERROR_OK
)
480 stm32x_info
->option_bytes
.protection
[0] = prot_reg
[0];
481 stm32x_info
->option_bytes
.protection
[1] = prot_reg
[1];
482 stm32x_info
->option_bytes
.protection
[2] = prot_reg
[2];
483 stm32x_info
->option_bytes
.protection
[3] = prot_reg
[3];
485 return stm32x_write_options(bank
);
488 static int stm32x_write_block(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 count
)
490 stm32x_flash_bank_t
*stm32x_info
= bank
->driver_priv
;
491 target_t
*target
= bank
->target
;
492 u32 buffer_size
= 16384;
493 working_area_t
*source
;
494 u32 address
= bank
->base
+ offset
;
495 reg_param_t reg_params
[4];
496 armv7m_algorithm_t armv7m_info
;
497 int retval
= ERROR_OK
;
499 u8 stm32x_flash_write_code
[] = {
501 0xDF, 0xF8, 0x24, 0x40, /* ldr r4, STM32_FLASH_CR */
502 0x09, 0x4D, /* ldr r5, STM32_FLASH_SR */
503 0x4F, 0xF0, 0x01, 0x03, /* mov r3, #1 */
504 0x23, 0x60, /* str r3, [r4, #0] */
505 0x30, 0xF8, 0x02, 0x3B, /* ldrh r3, [r0], #2 */
506 0x21, 0xF8, 0x02, 0x3B, /* strh r3, [r1], #2 */
508 0x2B, 0x68, /* ldr r3, [r5, #0] */
509 0x13, 0xF0, 0x01, 0x0F, /* tst r3, #0x01 */
510 0xFB, 0xD0, /* beq busy */
511 0x13, 0xF0, 0x14, 0x0F, /* tst r3, #0x14 */
512 0x01, 0xD1, /* bne exit */
513 0x01, 0x3A, /* subs r2, r2, #1 */
514 0xED, 0xD1, /* bne write */
516 0xFE, 0xE7, /* b exit */
517 0x10, 0x20, 0x02, 0x40, /* STM32_FLASH_CR: .word 0x40022010 */
518 0x0C, 0x20, 0x02, 0x40 /* STM32_FLASH_SR: .word 0x4002200C */
521 /* flash write code */
522 if (target_alloc_working_area(target
, sizeof(stm32x_flash_write_code
), &stm32x_info
->write_algorithm
) != ERROR_OK
)
524 LOG_WARNING("no working area available, can't do block memory writes");
525 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
528 if ((retval
=target_write_buffer(target
, stm32x_info
->write_algorithm
->address
, sizeof(stm32x_flash_write_code
), stm32x_flash_write_code
))!=ERROR_OK
)
532 while (target_alloc_working_area(target
, buffer_size
, &source
) != ERROR_OK
)
535 if (buffer_size
<= 256)
537 /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
538 if (stm32x_info
->write_algorithm
)
539 target_free_working_area(target
, stm32x_info
->write_algorithm
);
541 LOG_WARNING("no large enough working area available, can't do block memory writes");
542 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
546 armv7m_info
.common_magic
= ARMV7M_COMMON_MAGIC
;
547 armv7m_info
.core_mode
= ARMV7M_MODE_ANY
;
549 init_reg_param(®_params
[0], "r0", 32, PARAM_OUT
);
550 init_reg_param(®_params
[1], "r1", 32, PARAM_OUT
);
551 init_reg_param(®_params
[2], "r2", 32, PARAM_OUT
);
552 init_reg_param(®_params
[3], "r3", 32, PARAM_IN
);
556 u32 thisrun_count
= (count
> (buffer_size
/ 2)) ? (buffer_size
/ 2) : count
;
558 if ((retval
= target_write_buffer(target
, source
->address
, thisrun_count
* 2, buffer
))!=ERROR_OK
)
561 buf_set_u32(reg_params
[0].value
, 0, 32, source
->address
);
562 buf_set_u32(reg_params
[1].value
, 0, 32, address
);
563 buf_set_u32(reg_params
[2].value
, 0, 32, thisrun_count
);
565 if ((retval
= target
->type
->run_algorithm(target
, 0, NULL
, 4, reg_params
, stm32x_info
->write_algorithm
->address
, \
566 stm32x_info
->write_algorithm
->address
+ (sizeof(stm32x_flash_write_code
) - 10), 10000, &armv7m_info
)) != ERROR_OK
)
568 LOG_ERROR("error executing stm32x flash write algorithm");
569 retval
= ERROR_FLASH_OPERATION_FAILED
;
573 if (buf_get_u32(reg_params
[3].value
, 0, 32) & FLASH_PGERR
)
575 LOG_ERROR("flash memory not erased before writing");
576 /* Clear but report errors */
577 target_write_u32(target
, STM32_FLASH_SR
, FLASH_PGERR
);
578 retval
= ERROR_FLASH_OPERATION_FAILED
;
582 if (buf_get_u32(reg_params
[3].value
, 0, 32) & FLASH_WRPRTERR
)
584 LOG_ERROR("flash memory write protected");
585 /* Clear but report errors */
586 target_write_u32(target
, STM32_FLASH_SR
, FLASH_WRPRTERR
);
587 retval
= ERROR_FLASH_OPERATION_FAILED
;
591 buffer
+= thisrun_count
* 2;
592 address
+= thisrun_count
* 2;
593 count
-= thisrun_count
;
596 target_free_working_area(target
, source
);
597 target_free_working_area(target
, stm32x_info
->write_algorithm
);
599 destroy_reg_param(®_params
[0]);
600 destroy_reg_param(®_params
[1]);
601 destroy_reg_param(®_params
[2]);
602 destroy_reg_param(®_params
[3]);
607 static int stm32x_write(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 count
)
609 target_t
*target
= bank
->target
;
610 u32 words_remaining
= (count
/ 2);
611 u32 bytes_remaining
= (count
& 0x00000001);
612 u32 address
= bank
->base
+ offset
;
613 u32 bytes_written
= 0;
617 if (bank
->target
->state
!= TARGET_HALTED
)
619 LOG_ERROR("Target not halted");
620 return ERROR_TARGET_NOT_HALTED
;
625 LOG_WARNING("offset 0x%x breaks required 2-byte alignment", offset
);
626 return ERROR_FLASH_DST_BREAKS_ALIGNMENT
;
629 /* unlock flash registers */
630 target_write_u32(target
, STM32_FLASH_KEYR
, KEY1
);
631 target_write_u32(target
, STM32_FLASH_KEYR
, KEY2
);
633 /* multiple half words (2-byte) to be programmed? */
634 if (words_remaining
> 0)
636 /* try using a block write */
637 if ((retval
= stm32x_write_block(bank
, buffer
, offset
, words_remaining
)) != ERROR_OK
)
639 if (retval
== ERROR_TARGET_RESOURCE_NOT_AVAILABLE
)
641 /* if block write failed (no sufficient working area),
642 * we use normal (slow) single dword accesses */
643 LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
645 else if (retval
== ERROR_FLASH_OPERATION_FAILED
)
647 LOG_ERROR("flash writing failed with error code: 0x%x", retval
);
648 return ERROR_FLASH_OPERATION_FAILED
;
653 buffer
+= words_remaining
* 2;
654 address
+= words_remaining
* 2;
659 while (words_remaining
> 0)
662 memcpy(&value
, buffer
+ bytes_written
, sizeof(u16
));
664 target_write_u32(target
, STM32_FLASH_CR
, FLASH_PG
);
665 target_write_u16(target
, address
, value
);
667 status
= stm32x_wait_status_busy(bank
, 5);
669 if( status
& FLASH_WRPRTERR
)
671 LOG_ERROR("flash memory not erased before writing");
672 return ERROR_FLASH_OPERATION_FAILED
;
674 if( status
& FLASH_PGERR
)
676 LOG_ERROR("flash memory write protected");
677 return ERROR_FLASH_OPERATION_FAILED
;
688 memcpy(&value
, buffer
+ bytes_written
, bytes_remaining
);
690 target_write_u32(target
, STM32_FLASH_CR
, FLASH_PG
);
691 target_write_u16(target
, address
, value
);
693 status
= stm32x_wait_status_busy(bank
, 5);
695 if( status
& FLASH_WRPRTERR
)
697 LOG_ERROR("flash memory not erased before writing");
698 return ERROR_FLASH_OPERATION_FAILED
;
700 if( status
& FLASH_PGERR
)
702 LOG_ERROR("flash memory write protected");
703 return ERROR_FLASH_OPERATION_FAILED
;
707 target_write_u32(target
, STM32_FLASH_CR
, FLASH_LOCK
);
712 static int stm32x_probe(struct flash_bank_s
*bank
)
714 target_t
*target
= bank
->target
;
715 stm32x_flash_bank_t
*stm32x_info
= bank
->driver_priv
;
721 if (bank
->target
->state
!= TARGET_HALTED
)
723 LOG_ERROR("Target not halted");
724 return ERROR_TARGET_NOT_HALTED
;
727 stm32x_info
->probed
= 0;
729 /* read stm32 device id register */
730 target_read_u32(target
, 0xE0042000, &device_id
);
731 LOG_INFO( "device id = 0x%08x", device_id
);
733 /* get flash size from target */
734 if (target_read_u16(target
, 0x1FFFF7E0, &num_pages
) != ERROR_OK
)
736 /* failed reading flash size, default to max target family */
740 if ((device_id
& 0x7ff) == 0x410)
742 /* medium density - we have 1k pages
743 * 4 pages for a protection area */
745 stm32x_info
->ppage_size
= 4;
747 /* check for early silicon */
748 if (num_pages
== 0xffff)
750 /* number of sectors incorrect on revA */
751 LOG_WARNING( "STM32 flash size failed, probe inaccurate - assuming 128k flash" );
755 else if ((device_id
& 0x7ff) == 0x412)
757 /* low density - we have 1k pages
758 * 4 pages for a protection area */
760 stm32x_info
->ppage_size
= 4;
762 /* check for early silicon */
763 if (num_pages
== 0xffff)
765 /* number of sectors incorrect on revA */
766 LOG_WARNING( "STM32 flash size failed, probe inaccurate - assuming 32k flash" );
770 else if ((device_id
& 0x7ff) == 0x414)
772 /* high density - we have 2k pages
773 * 2 pages for a protection area */
775 stm32x_info
->ppage_size
= 2;
777 /* check for early silicon */
778 if (num_pages
== 0xffff)
780 /* number of sectors incorrect on revZ */
781 LOG_WARNING( "STM32 flash size failed, probe inaccurate - assuming 512k flash" );
785 else if ((device_id
& 0x7ff) == 0x418)
787 /* connectivity line density - we have 1k pages
788 * 4 pages for a protection area */
790 stm32x_info
->ppage_size
= 4;
792 /* check for early silicon */
793 if (num_pages
== 0xffff)
795 /* number of sectors incorrect on revZ */
796 LOG_WARNING( "STM32 flash size failed, probe inaccurate - assuming 256k flash" );
802 LOG_WARNING( "Cannot identify target as a STM32 family." );
803 return ERROR_FLASH_OPERATION_FAILED
;
806 LOG_INFO( "flash size = %dkbytes", num_pages
);
808 /* calculate numbers of pages */
809 num_pages
/= (page_size
/ 1024);
811 bank
->base
= 0x08000000;
812 bank
->size
= (num_pages
* page_size
);
813 bank
->num_sectors
= num_pages
;
814 bank
->sectors
= malloc(sizeof(flash_sector_t
) * num_pages
);
816 for (i
= 0; i
< num_pages
; i
++)
818 bank
->sectors
[i
].offset
= i
* page_size
;
819 bank
->sectors
[i
].size
= page_size
;
820 bank
->sectors
[i
].is_erased
= -1;
821 bank
->sectors
[i
].is_protected
= 1;
824 stm32x_info
->probed
= 1;
829 static int stm32x_auto_probe(struct flash_bank_s
*bank
)
831 stm32x_flash_bank_t
*stm32x_info
= bank
->driver_priv
;
832 if (stm32x_info
->probed
)
834 return stm32x_probe(bank
);
838 static int stm32x_handle_part_id_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
844 static int stm32x_info(struct flash_bank_s
*bank
, char *buf
, int buf_size
)
846 target_t
*target
= bank
->target
;
850 /* read stm32 device id register */
851 target_read_u32(target
, 0xE0042000, &device_id
);
853 if ((device_id
& 0x7ff) == 0x410)
855 printed
= snprintf(buf
, buf_size
, "stm32x (Medium Density) - Rev: ");
859 switch(device_id
>> 16)
862 snprintf(buf
, buf_size
, "A");
866 snprintf(buf
, buf_size
, "B");
870 snprintf(buf
, buf_size
, "Z");
874 snprintf(buf
, buf_size
, "Y");
878 snprintf(buf
, buf_size
, "unknown");
882 else if ((device_id
& 0x7ff) == 0x412)
884 printed
= snprintf(buf
, buf_size
, "stm32x (Low Density) - Rev: ");
888 switch(device_id
>> 16)
891 snprintf(buf
, buf_size
, "A");
895 snprintf(buf
, buf_size
, "unknown");
899 else if ((device_id
& 0x7ff) == 0x414)
901 printed
= snprintf(buf
, buf_size
, "stm32x (High Density) - Rev: ");
905 switch(device_id
>> 16)
908 snprintf(buf
, buf_size
, "A");
912 snprintf(buf
, buf_size
, "Z");
916 snprintf(buf
, buf_size
, "unknown");
920 else if ((device_id
& 0x7ff) == 0x418)
922 printed
= snprintf(buf
, buf_size
, "stm32x (Connectivity) - Rev: ");
926 switch(device_id
>> 16)
929 snprintf(buf
, buf_size
, "A");
933 snprintf(buf
, buf_size
, "unknown");
939 snprintf(buf
, buf_size
, "Cannot identify target as a stm32x\n");
940 return ERROR_FLASH_OPERATION_FAILED
;
946 static int stm32x_handle_lock_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
949 target_t
*target
= NULL
;
950 stm32x_flash_bank_t
*stm32x_info
= NULL
;
954 command_print(cmd_ctx
, "stm32x lock <bank>");
958 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
961 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
965 stm32x_info
= bank
->driver_priv
;
967 target
= bank
->target
;
969 if (target
->state
!= TARGET_HALTED
)
971 LOG_ERROR("Target not halted");
972 return ERROR_TARGET_NOT_HALTED
;
975 if (stm32x_erase_options(bank
) != ERROR_OK
)
977 command_print(cmd_ctx
, "stm32x failed to erase options");
981 /* set readout protection */
982 stm32x_info
->option_bytes
.RDP
= 0;
984 if (stm32x_write_options(bank
) != ERROR_OK
)
986 command_print(cmd_ctx
, "stm32x failed to lock device");
990 command_print(cmd_ctx
, "stm32x locked");
995 static int stm32x_handle_unlock_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
998 target_t
*target
= NULL
;
999 stm32x_flash_bank_t
*stm32x_info
= NULL
;
1003 command_print(cmd_ctx
, "stm32x unlock <bank>");
1007 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
1010 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
1014 stm32x_info
= bank
->driver_priv
;
1016 target
= bank
->target
;
1018 if (target
->state
!= TARGET_HALTED
)
1020 LOG_ERROR("Target not halted");
1021 return ERROR_TARGET_NOT_HALTED
;
1024 if (stm32x_erase_options(bank
) != ERROR_OK
)
1026 command_print(cmd_ctx
, "stm32x failed to unlock device");
1030 if (stm32x_write_options(bank
) != ERROR_OK
)
1032 command_print(cmd_ctx
, "stm32x failed to lock device");
1036 command_print(cmd_ctx
, "stm32x unlocked");
1041 static int stm32x_handle_options_read_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1045 target_t
*target
= NULL
;
1046 stm32x_flash_bank_t
*stm32x_info
= NULL
;
1050 command_print(cmd_ctx
, "stm32x options_read <bank>");
1054 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
1057 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
1061 stm32x_info
= bank
->driver_priv
;
1063 target
= bank
->target
;
1065 if (target
->state
!= TARGET_HALTED
)
1067 LOG_ERROR("Target not halted");
1068 return ERROR_TARGET_NOT_HALTED
;
1071 target_read_u32(target
, STM32_FLASH_OBR
, &optionbyte
);
1072 command_print(cmd_ctx
, "Option Byte: 0x%x", optionbyte
);
1074 if (buf_get_u32((u8
*)&optionbyte
, OPT_ERROR
, 1))
1075 command_print(cmd_ctx
, "Option Byte Complement Error");
1077 if (buf_get_u32((u8
*)&optionbyte
, OPT_READOUT
, 1))
1078 command_print(cmd_ctx
, "Readout Protection On");
1080 command_print(cmd_ctx
, "Readout Protection Off");
1082 if (buf_get_u32((u8
*)&optionbyte
, OPT_RDWDGSW
, 1))
1083 command_print(cmd_ctx
, "Software Watchdog");
1085 command_print(cmd_ctx
, "Hardware Watchdog");
1087 if (buf_get_u32((u8
*)&optionbyte
, OPT_RDRSTSTOP
, 1))
1088 command_print(cmd_ctx
, "Stop: No reset generated");
1090 command_print(cmd_ctx
, "Stop: Reset generated");
1092 if (buf_get_u32((u8
*)&optionbyte
, OPT_RDRSTSTDBY
, 1))
1093 command_print(cmd_ctx
, "Standby: No reset generated");
1095 command_print(cmd_ctx
, "Standby: Reset generated");
1100 static int stm32x_handle_options_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1103 target_t
*target
= NULL
;
1104 stm32x_flash_bank_t
*stm32x_info
= NULL
;
1105 u16 optionbyte
= 0xF8;
1109 command_print(cmd_ctx
, "stm32x options_write <bank> <SWWDG|HWWDG> <RSTSTNDBY|NORSTSTNDBY> <RSTSTOP|NORSTSTOP>");
1113 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
1116 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
1120 stm32x_info
= bank
->driver_priv
;
1122 target
= bank
->target
;
1124 if (target
->state
!= TARGET_HALTED
)
1126 LOG_ERROR("Target not halted");
1127 return ERROR_TARGET_NOT_HALTED
;
1130 if (strcmp(args
[1], "SWWDG") == 0)
1132 optionbyte
|= (1<<0);
1136 optionbyte
&= ~(1<<0);
1139 if (strcmp(args
[2], "NORSTSTNDBY") == 0)
1141 optionbyte
|= (1<<1);
1145 optionbyte
&= ~(1<<1);
1148 if (strcmp(args
[3], "NORSTSTOP") == 0)
1150 optionbyte
|= (1<<2);
1154 optionbyte
&= ~(1<<2);
1157 if (stm32x_erase_options(bank
) != ERROR_OK
)
1159 command_print(cmd_ctx
, "stm32x failed to erase options");
1163 stm32x_info
->option_bytes
.user_options
= optionbyte
;
1165 if (stm32x_write_options(bank
) != ERROR_OK
)
1167 command_print(cmd_ctx
, "stm32x failed to write options");
1171 command_print(cmd_ctx
, "stm32x write options complete");
1176 static int stm32x_mass_erase(struct flash_bank_s
*bank
)
1178 target_t
*target
= bank
->target
;
1181 if (target
->state
!= TARGET_HALTED
)
1183 LOG_ERROR("Target not halted");
1184 return ERROR_TARGET_NOT_HALTED
;
1187 /* unlock option flash registers */
1188 target_write_u32(target
, STM32_FLASH_KEYR
, KEY1
);
1189 target_write_u32(target
, STM32_FLASH_KEYR
, KEY2
);
1191 /* mass erase flash memory */
1192 target_write_u32(target
, STM32_FLASH_CR
, FLASH_MER
);
1193 target_write_u32(target
, STM32_FLASH_CR
, FLASH_MER
|FLASH_STRT
);
1195 status
= stm32x_wait_status_busy(bank
, 10);
1197 target_write_u32(target
, STM32_FLASH_CR
, FLASH_LOCK
);
1199 if( status
& FLASH_WRPRTERR
)
1201 LOG_ERROR("stm32x device protected");
1205 if( status
& FLASH_PGERR
)
1207 LOG_ERROR("stm32x device programming failed");
1214 static int stm32x_handle_mass_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1221 command_print(cmd_ctx
, "stm32x mass_erase <bank>");
1225 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
1228 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
1232 if (stm32x_mass_erase(bank
) == ERROR_OK
)
1234 /* set all sectors as erased */
1235 for (i
= 0; i
< bank
->num_sectors
; i
++)
1237 bank
->sectors
[i
].is_erased
= 1;
1240 command_print(cmd_ctx
, "stm32x mass erase complete");
1244 command_print(cmd_ctx
, "stm32x mass erase failed");
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