ARM11: don't expose DSCR
[openocd.git] / src / flash / s3c24xx_nand.h
1 /***************************************************************************
2 * Copyright (C) 2007, 2008 by Ben Dooks *
3 * ben@fluff.org *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20
21 #ifndef S3C24xx_NAND_H
22 #define S3C24xx_NAND_H
23
24 /*
25 * S3C24XX Series OpenOCD NAND Flash controller support.
26 *
27 * Many thanks to Simtec Electronics for sponsoring this work.
28 */
29
30 #include "nand.h"
31 #include "s3c24xx_regs_nand.h"
32
33 struct s3c24xx_nand_controller
34 {
35 struct target *target;
36
37 /* register addresses */
38 uint32_t cmd;
39 uint32_t addr;
40 uint32_t data;
41 uint32_t nfstat;
42 };
43
44 /* Default to using the un-translated NAND register based address */
45 #undef S3C2410_NFREG
46 #define S3C2410_NFREG(x) ((x) + 0x4e000000)
47
48 #define S3C24XX_DEVICE_COMMAND() \
49 COMMAND_HELPER(s3c24xx_nand_device_command, \
50 struct nand_device *nand, \
51 struct s3c24xx_nand_controller **info)
52
53 S3C24XX_DEVICE_COMMAND();
54
55 #define CALL_S3C24XX_DEVICE_COMMAND(d, i) \
56 do { \
57 int retval = CALL_COMMAND_HANDLER(s3c24xx_nand_device_command, d, i); \
58 if (ERROR_OK != retval) \
59 return retval; \
60 } while (0)
61
62 int s3c24xx_reset(struct nand_device *nand);
63
64 int s3c24xx_command(struct nand_device *nand, uint8_t command);
65 int s3c24xx_address(struct nand_device *nand, uint8_t address);
66
67 int s3c24xx_write_data(struct nand_device *nand, uint16_t data);
68 int s3c24xx_read_data(struct nand_device *nand, void *data);
69
70 int s3c24xx_controller_ready(struct nand_device *nand, int tout);
71
72 #define s3c24xx_write_page NULL
73 #define s3c24xx_read_page NULL
74
75 /* code shared between different controllers */
76
77 int s3c2440_nand_ready(struct nand_device *nand, int timeout);
78
79 int s3c2440_read_block_data(struct nand_device *nand,
80 uint8_t *data, int data_size);
81 int s3c2440_write_block_data(struct nand_device *nand,
82 uint8_t *data, int data_size);
83
84 #endif // S3C24xx_NAND_H