6bde224fa303cf9e8d9e257e177ce7c290fbb2a1
[openocd.git] / src / flash / s3c24xx_nand.c
1 /* src/flash/s3c24xx_nand.c
2 *
3 * S3C24XX Series OpenOCD NAND Flash controller support.
4 *
5 * Copyright 2007,2008 Ben Dooks <ben@fluff.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * Many thanks to Simtec Electronics for sponsoring this work.
13 */
14
15 #ifdef HAVE_CONFIG_H
16 #include "config.h"
17 #endif
18
19 #include "replacements.h"
20 #include "log.h"
21
22 #include <stdlib.h>
23 #include <string.h>
24
25 #include "nand.h"
26 #include "s3c24xx_nand.h"
27 #include "target.h"
28
29 s3c24xx_nand_controller_t *
30 s3c24xx_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
31 char **args, int argc,
32 struct nand_device_s *device)
33 {
34 s3c24xx_nand_controller_t *s3c24xx_info;
35
36 s3c24xx_info = malloc(sizeof(s3c24xx_nand_controller_t));
37 if (s3c24xx_info == NULL) {
38 ERROR("no memory for nand controller\n");
39 return NULL;
40 }
41
42 device->controller_priv = s3c24xx_info;
43
44 s3c24xx_info->target = get_target_by_num(strtoul(args[1], NULL, 0));
45 if (s3c24xx_info->target == NULL) {
46 ERROR("no target '%s' configured", args[1]);
47 return NULL;
48 }
49
50 return s3c24xx_info;
51 }
52
53 int s3c24xx_register_commands(struct command_context_s *cmd_ctx)
54 {
55 return ERROR_OK;
56 }
57
58 int s3c24xx_reset(struct nand_device_s *device)
59 {
60 s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
61 target_t *target = s3c24xx_info->target;
62
63 if (target->state != TARGET_HALTED) {
64 ERROR("target must be halted to use S3C24XX NAND flash controller");
65 return ERROR_NAND_OPERATION_FAILED;
66 }
67
68 target_write_u32(target, s3c24xx_info->cmd, 0xff);
69
70 return ERROR_OK;
71 }
72
73 int s3c24xx_command(struct nand_device_s *device, u8 command)
74 {
75 s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
76 target_t *target = s3c24xx_info->target;
77
78 if (target->state != TARGET_HALTED) {
79 ERROR("target must be halted to use S3C24XX NAND flash controller");
80 return ERROR_NAND_OPERATION_FAILED;
81 }
82
83 target_write_u16(target, s3c24xx_info->cmd, command);
84 return ERROR_OK;
85 }
86
87
88 int s3c24xx_address(struct nand_device_s *device, u8 address)
89 {
90 s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
91 target_t *target = s3c24xx_info->target;
92
93 if (target->state != TARGET_HALTED) {
94 ERROR("target must be halted to use S3C24XX NAND flash controller");
95 return ERROR_NAND_OPERATION_FAILED;
96 }
97
98 target_write_u16(target, s3c24xx_info->addr, address);
99 return ERROR_OK;
100 }
101
102 int s3c24xx_write_data(struct nand_device_s *device, u16 data)
103 {
104 s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
105 target_t *target = s3c24xx_info->target;
106
107 if (target->state != TARGET_HALTED) {
108 ERROR("target must be halted to use S3C24XX NAND flash controller");
109 return ERROR_NAND_OPERATION_FAILED;
110 }
111
112 target_write_u8(target, s3c24xx_info->data, data);
113 return ERROR_OK;
114 }
115
116 int s3c24xx_read_data(struct nand_device_s *device, void *data)
117 {
118 s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
119 target_t *target = s3c24xx_info->target;
120
121 if (target->state != TARGET_HALTED) {
122 ERROR("target must be halted to use S3C24XX NAND flash controller");
123 return ERROR_NAND_OPERATION_FAILED;
124 }
125
126 target_read_u8(target, s3c24xx_info->data, data);
127 return ERROR_OK;
128 }
129
130 int s3c24xx_controller_ready(struct nand_device_s *device, int timeout)
131 {
132 return 1;
133 }

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