src/flash/s3c2440_nand.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007, 2008 by Ben Dooks                                 *
   3  *   ben@fluff.org                                                         *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  19  ***************************************************************************/
  20
  21 /*
  22  * S3C2440 OpenOCD NAND Flash controller support.
  23  *
  24  * Many thanks to Simtec Electronics for sponsoring this work.
  25  */
  26
  27 #ifdef HAVE_CONFIG_H
  28 #include "config.h"
  29 #endif
  30
  31 #include "s3c24xx_nand.h"
  32
  33
  34 static int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
  35                                 char **args, int argc,
  36                                 struct nand_device_s *nand)
  37 {
  38         s3c24xx_nand_controller_t *info;
  39         CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
  40
  41         /* fill in the address fields for the core device */
  42         info->cmd = S3C2440_NFCMD;
  43         info->addr = S3C2440_NFADDR;
  44         info->data = S3C2440_NFDATA;
  45         info->nfstat = S3C2440_NFSTAT;
  46
  47         return ERROR_OK;
  48 }
  49
  50 static int s3c2440_init(struct nand_device_s *nand)
  51 {
  52         s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
  53         target_t *target = s3c24xx_info->target;
  54
  55         target_write_u32(target, S3C2410_NFCONF,
  56                          S3C2440_NFCONF_TACLS(3) |
  57                          S3C2440_NFCONF_TWRPH0(7) |
  58                          S3C2440_NFCONF_TWRPH1(7));
  59
  60         target_write_u32(target, S3C2440_NFCONT,
  61                          S3C2440_NFCONT_INITECC | S3C2440_NFCONT_ENABLE);
  62
  63         return ERROR_OK;
  64 }
  65
  66 int s3c2440_nand_ready(struct nand_device_s *nand, int timeout)
  67 {
  68         s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
  69         target_t *target = s3c24xx_info->target;
  70         uint8_t status;
  71
  72         if (target->state != TARGET_HALTED) {
  73                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
  74                 return ERROR_NAND_OPERATION_FAILED;
  75         }
  76
  77         do {
  78                 target_read_u8(target, s3c24xx_info->nfstat, &status);
  79
  80                 if (status & S3C2440_NFSTAT_READY)
  81                         return 1;
  82
  83                 alive_sleep(1);
  84         } while (timeout-- > 0);
  85
  86
  87         return 0;
  88 }
  89
  90 /* use the fact we can read/write 4 bytes in one go via a single 32bit op */
  91
  92 int s3c2440_read_block_data(struct nand_device_s *nand, uint8_t *data, int data_size)
  93 {
  94         s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
  95         target_t *target = s3c24xx_info->target;
  96         uint32_t nfdata = s3c24xx_info->data;
  97         uint32_t tmp;
  98
  99         LOG_INFO("%s: reading data: %p, %p, %d\n", __func__, nand, data, data_size);
 100
 101         if (target->state != TARGET_HALTED) {
 102                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
 103                 return ERROR_NAND_OPERATION_FAILED;
 104         }
 105
 106         while (data_size >= 4) {
 107                 target_read_u32(target, nfdata, &tmp);
 108
 109                 data[0] = tmp;
 110                 data[1] = tmp >> 8;
 111                 data[2] = tmp >> 16;
 112                 data[3] = tmp >> 24;
 113
 114                 data_size -= 4;
 115                 data += 4;
 116         }
 117
 118         while (data_size > 0) {
 119                 target_read_u8(target, nfdata, data);
 120
 121                 data_size -= 1;
 122                 data += 1;
 123         }
 124
 125         return ERROR_OK;
 126 }
 127
 128 int s3c2440_write_block_data(struct nand_device_s *nand, uint8_t *data, int data_size)
 129 {
 130         s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
 131         target_t *target = s3c24xx_info->target;
 132         uint32_t nfdata = s3c24xx_info->data;
 133         uint32_t tmp;
 134
 135         if (target->state != TARGET_HALTED) {
 136                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
 137                 return ERROR_NAND_OPERATION_FAILED;
 138         }
 139
 140         while (data_size >= 4) {
 141                 tmp = le_to_h_u32(data);
 142                 target_write_u32(target, nfdata, tmp);
 143
 144                 data_size -= 4;
 145                 data += 4;
 146         }
 147
 148         while (data_size > 0) {
 149                 target_write_u8(target, nfdata, *data);
 150
 151                 data_size -= 1;
 152                 data += 1;
 153         }
 154
 155         return ERROR_OK;
 156 }
 157
 158 nand_flash_controller_t s3c2440_nand_controller = {
 159                 .name = "s3c2440",
 160                 .nand_device_command = &s3c2440_nand_device_command,
 161                 .register_commands = &s3c24xx_register_commands,
 162                 .init = &s3c2440_init,
 163                 .reset = &s3c24xx_reset,
 164                 .command = &s3c24xx_command,
 165                 .address = &s3c24xx_address,
 166                 .write_data = &s3c24xx_write_data,
 167                 .read_data = &s3c24xx_read_data,
 168                 .write_page = s3c24xx_write_page,
 169                 .read_page = s3c24xx_read_page,
 170                 .write_block_data = &s3c2440_write_block_data,
 171                 .read_block_data = &s3c2440_read_block_data,
 172                 .controller_ready = &s3c24xx_controller_ready,
 173                 .nand_ready = &s3c2440_nand_ready,
 174         };