4d084403bf3d4606139fffc332ee49a15135bb90
[openocd.git] / src / flash / s3c2410_nand.c
1 /***************************************************************************
2 * Copyright (C) 2007, 2008 by Ben Dooks *
3 * ben@fluff.org *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20
21 /*
22 * S3C2410 OpenOCD NAND Flash controller support.
23 *
24 * Many thanks to Simtec Electronics for sponsoring this work.
25 */
26
27 #ifdef HAVE_CONFIG_H
28 #include "config.h"
29 #endif
30
31 #include "s3c24xx_nand.h"
32
33 NAND_DEVICE_COMMAND_HANDLER(s3c2410_nand_device_command)
34 {
35 struct s3c24xx_nand_controller *info;
36 CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
37
38 /* fill in the address fields for the core device */
39 info->cmd = S3C2410_NFCMD;
40 info->addr = S3C2410_NFADDR;
41 info->data = S3C2410_NFDATA;
42 info->nfstat = S3C2410_NFSTAT;
43
44 return ERROR_OK;
45 }
46
47 static int s3c2410_init(struct nand_device_s *nand)
48 {
49 struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
50 target_t *target = s3c24xx_info->target;
51
52 target_write_u32(target, S3C2410_NFCONF,
53 S3C2410_NFCONF_EN | S3C2410_NFCONF_TACLS(3) |
54 S3C2410_NFCONF_TWRPH0(5) | S3C2410_NFCONF_TWRPH1(3));
55
56 return ERROR_OK;
57 }
58
59 static int s3c2410_write_data(struct nand_device_s *nand, uint16_t data)
60 {
61 struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
62 target_t *target = s3c24xx_info->target;
63
64 if (target->state != TARGET_HALTED) {
65 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
66 return ERROR_NAND_OPERATION_FAILED;
67 }
68
69 target_write_u32(target, S3C2410_NFDATA, data);
70 return ERROR_OK;
71 }
72
73 static int s3c2410_read_data(struct nand_device_s *nand, void *data)
74 {
75 struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
76 target_t *target = s3c24xx_info->target;
77
78 if (target->state != TARGET_HALTED) {
79 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
80 return ERROR_NAND_OPERATION_FAILED;
81 }
82
83 target_read_u8(target, S3C2410_NFDATA, data);
84 return ERROR_OK;
85 }
86
87 static int s3c2410_nand_ready(struct nand_device_s *nand, int timeout)
88 {
89 struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
90 target_t *target = s3c24xx_info->target;
91 uint8_t status;
92
93 if (target->state != TARGET_HALTED) {
94 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
95 return ERROR_NAND_OPERATION_FAILED;
96 }
97
98 do {
99 target_read_u8(target, S3C2410_NFSTAT, &status);
100
101 if (status & S3C2410_NFSTAT_BUSY)
102 return 1;
103
104 alive_sleep(1);
105 } while (timeout-- > 0);
106
107 return 0;
108 }
109
110 struct nand_flash_controller s3c2410_nand_controller = {
111 .name = "s3c2410",
112 .nand_device_command = &s3c2410_nand_device_command,
113 .register_commands = &s3c24xx_register_commands,
114 .init = &s3c2410_init,
115 .reset = &s3c24xx_reset,
116 .command = &s3c24xx_command,
117 .address = &s3c24xx_address,
118 .write_data = &s3c2410_write_data,
119 .read_data = &s3c2410_read_data,
120 .write_page = s3c24xx_write_page,
121 .read_page = s3c24xx_read_page,
122 .controller_ready = &s3c24xx_controller_ready,
123 .nand_ready = &s3c2410_nand_ready,
124 };