352d38498d49edc8a54c8b1b81f8518531e59215
[openocd.git] / src / flash / s3c2410_nand.c
1 /***************************************************************************
2 * Copyright (C) 2007, 2008 by Ben Dooks *
3 * ben@fluff.org *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20
21 /*
22 * S3C2410 OpenOCD NAND Flash controller support.
23 *
24 * Many thanks to Simtec Electronics for sponsoring this work.
25 */
26
27 #ifdef HAVE_CONFIG_H
28 #include "config.h"
29 #endif
30
31 #include "replacements.h"
32 #include "log.h"
33
34 #include <stdlib.h>
35 #include <string.h>
36
37 #include "nand.h"
38 #include "s3c24xx_nand.h"
39 #include "target.h"
40
41 int s3c2410_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
42 int s3c2410_init(struct nand_device_s *device);
43 int s3c2410_read_data(struct nand_device_s *device, void *data);
44 int s3c2410_write_data(struct nand_device_s *device, u16 data);
45 int s3c2410_nand_ready(struct nand_device_s *device, int timeout);
46
47 nand_flash_controller_t s3c2410_nand_controller =
48 {
49 .name = "s3c2410",
50 .nand_device_command = s3c2410_nand_device_command,
51 .register_commands = s3c24xx_register_commands,
52 .init = s3c2410_init,
53 .reset = s3c24xx_reset,
54 .command = s3c24xx_command,
55 .address = s3c24xx_address,
56 .write_data = s3c2410_write_data,
57 .read_data = s3c2410_read_data,
58 .write_page = s3c24xx_write_page,
59 .read_page = s3c24xx_read_page,
60 .controller_ready = s3c24xx_controller_ready,
61 .nand_ready = s3c2410_nand_ready,
62 };
63
64 int s3c2410_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
65 char **args, int argc,
66 struct nand_device_s *device)
67 {
68 s3c24xx_nand_controller_t *info;
69
70 info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, device);
71 if (info == NULL) {
72 return ERROR_NAND_DEVICE_INVALID;
73 }
74
75 /* fill in the address fields for the core device */
76 info->cmd = S3C2410_NFCMD;
77 info->addr = S3C2410_NFADDR;
78 info->data = S3C2410_NFDATA;
79 info->nfstat = S3C2410_NFSTAT;
80
81 return ERROR_OK;
82 }
83
84 int s3c2410_init(struct nand_device_s *device)
85 {
86 s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
87 target_t *target = s3c24xx_info->target;
88
89 target_write_u32(target, S3C2410_NFCONF,
90 S3C2410_NFCONF_EN | S3C2410_NFCONF_TACLS(3) |
91 S3C2410_NFCONF_TWRPH0(5) | S3C2410_NFCONF_TWRPH1(3));
92
93 return ERROR_OK;
94 }
95
96 int s3c2410_write_data(struct nand_device_s *device, u16 data)
97 {
98 s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
99 target_t *target = s3c24xx_info->target;
100
101 if (target->state != TARGET_HALTED) {
102 ERROR("target must be halted to use S3C24XX NAND flash controller");
103 return ERROR_NAND_OPERATION_FAILED;
104 }
105
106 target_write_u32(target, S3C2410_NFDATA, data);
107 return ERROR_OK;
108 }
109
110 int s3c2410_read_data(struct nand_device_s *device, void *data)
111 {
112 s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
113 target_t *target = s3c24xx_info->target;
114
115 if (target->state != TARGET_HALTED) {
116 ERROR("target must be halted to use S3C24XX NAND flash controller");
117 return ERROR_NAND_OPERATION_FAILED;
118 }
119
120 target_read_u8(target, S3C2410_NFDATA, data);
121 return ERROR_OK;
122 }
123
124 int s3c2410_nand_ready(struct nand_device_s *device, int timeout)
125 {
126 s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
127 target_t *target = s3c24xx_info->target;
128 u8 status;
129
130 if (target->state != TARGET_HALTED) {
131 ERROR("target must be halted to use S3C24XX NAND flash controller");
132 return ERROR_NAND_OPERATION_FAILED;
133 }
134
135 do {
136 target_read_u8(target, S3C2410_NFSTAT, &status);
137
138 if (status & S3C2410_NFSTAT_BUSY)
139 return 1;
140
141 usleep(1000);
142 } while (timeout-- > 0);
143
144 return 0;
145 }

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