split jim_jtag_command into multiple handlers
[openocd.git] / src / flash / pic32mx.h
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
7 * *
8 * Copyright (C) 2008 by John McCarthy *
9 * jgmcc@magma.ca *
10 * *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
15 * *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
20 * *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program; if not, write to the *
23 * Free Software Foundation, Inc., *
24 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 ***************************************************************************/
26 #ifndef PIC32MX_H
27 #define PIC32MX_H
28
29 #include "flash.h"
30
31 struct pic32mx_flash_bank
32 {
33 struct working_area *write_algorithm;
34 int devid;
35 int ppage_size;
36 int probed;
37 };
38
39 #define PIC32MX_MANUF_ID 0x029
40
41 /* pic32mx memory locations */
42
43 #define PIC32MX_KUSEG_PGM_FLASH 0x7D000000
44 #define PIC32MX_KUSEG_RAM 0x7F000000
45
46 #define PIC32MX_KSEG0_RAM 0x80000000
47 #define PIC32MX_KSEG0_PGM_FLASH 0x9D000000
48 #define PIC32MX_KSEG0_BOOT_FLASH 0x9FC00000
49
50 #define PIC32MX_KSEG1_RAM 0xA0000000
51 #define PIC32MX_KSEG1_PGM_FLASH 0xBD000000
52 #define PIC32MX_KSEG1_PERIPHERAL 0xBF800000
53 #define PIC32MX_KSEG1_BOOT_FLASH 0xBFC00000
54
55 #define PIC32MX_PHYS_RAM 0x00000000
56 #define PIC32MX_PHYS_PGM_FLASH 0x1D000000
57 #define PIC32MX_PHYS_PERIPHERALS 0x1F800000
58 #define PIC32MX_PHYS_BOOT_FLASH 0x1FC00000
59
60 /*
61 * Translate Virtual and Physical addresses.
62 * Note: These macros only work for KSEG0/KSEG1 addresses.
63 */
64 #define KS1Virt2Phys(vaddr) ((vaddr)-0xA0000000)
65 #define Phys2KS1Virt(paddr) ((paddr) + 0xA0000000)
66 #define KS0Virt2Phys(vaddr) ((vaddr)-0x80000000)
67 #define Phys2KS0Virt(paddr) ((paddr) + 0x80000000)
68
69 /* pic32mx configuration register locations */
70
71 #define PIC32MX_DEVCFG0 0xBFC02FFC
72 #define PIC32MX_DEVCFG1 0xBFC02FF8
73 #define PIC32MX_DEVCFG2 0xBFC02FF4
74 #define PIC32MX_DEVCFG3 0XBFC02FF0
75 #define PIC32MX_DEVID 0xBF80F220
76
77 /* pic32mx flash controller register locations */
78
79 #define PIC32MX_NVMCON 0xBF80F400
80 #define PIC32MX_NVMCONCLR 0xBF80F404
81 #define PIC32MX_NVMCONSET 0xBF80F408
82 #define PIC32MX_NVMCONINV 0xBF80F40C
83 #define NVMCON_NVMWR (1 << 15)
84 #define NVMCON_NVMWREN (1 << 14)
85 #define NVMCON_NVMERR (1 << 13)
86 #define NVMCON_LVDERR (1 << 12)
87 #define NVMCON_LVDSTAT (1 << 11)
88 #define NVMCON_OP_PFM_ERASE 0x5
89 #define NVMCON_OP_PAGE_ERASE 0x4
90 #define NVMCON_OP_ROW_PROG 0x3
91 #define NVMCON_OP_WORD_PROG 0x1
92 #define NVMCON_OP_NOP 0x0
93
94 #define PIC32MX_NVMKEY 0xBF80F410
95 #define PIC32MX_NVMADDR 0xBF80F420
96 #define PIC32MX_NVMADDRCLR 0xBF80F424
97 #define PIC32MX_NVMADDRSET 0xBF80F428
98 #define PIC32MX_NVMADDRINV 0xBF80F42C
99 #define PIC32MX_NVMDATA 0xBF80F430
100 #define PIC32MX_NVMSRCADDR 0xBF80F440
101
102 /* flash unlock keys */
103
104 #define NVMKEY1 0xAA996655
105 #define NVMKEY2 0x556699AA
106
107 struct pic32mx_mem_layout {
108 uint32_t sector_start;
109 uint32_t sector_size;
110 };
111
112 #endif /* PIC32MX_H */
113

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