1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * Copyright (C) 2008 by John McCarthy *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program; if not, write to the *
23 * Free Software Foundation, Inc., *
24 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 ***************************************************************************/
30 #include "replacements.h"
37 #include "algorithm.h"
38 #include "binarybuffer.h"
44 struct pic32mx_devs_s
{
49 { 0x78, "460F512L USB", 512 },
50 { 0x74, "460F256L USB", 256 },
51 { 0x6D, "440F128L USB", 128 },
52 { 0x56, "440F512H USB", 512 },
53 { 0x52, "440F256H USB", 256 },
54 { 0x4D, "440F128H USB", 128 },
55 { 0x42, "420F032H USB", 32 },
56 { 0x38, "360F512L", 512 },
57 { 0x34, "360F256L", 256 },
58 { 0x2D, "340F128L", 128 },
59 { 0x2A, "320F128L", 128 },
60 { 0x16, "340F512H", 512 },
61 { 0x12, "340F256H", 256 },
62 { 0x0D, "340F128H", 128 },
63 { 0x0A, "320F128H", 128 },
64 { 0x06, "320F064H", 64 },
65 { 0x02, "320F032H", 32 },
69 int pic32mx_register_commands(struct command_context_s
*cmd_ctx
);
70 int pic32mx_flash_bank_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct flash_bank_s
*bank
);
71 int pic32mx_erase(struct flash_bank_s
*bank
, int first
, int last
);
72 int pic32mx_protect(struct flash_bank_s
*bank
, int set
, int first
, int last
);
73 int pic32mx_write(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 count
);
74 int pic32mx_probe(struct flash_bank_s
*bank
);
75 int pic32mx_auto_probe(struct flash_bank_s
*bank
);
76 int pic32mx_handle_part_id_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
77 int pic32mx_protect_check(struct flash_bank_s
*bank
);
78 int pic32mx_info(struct flash_bank_s
*bank
, char *buf
, int buf_size
);
81 int pic32mx_handle_lock_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
82 int pic32mx_handle_unlock_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
84 int pic32mx_handle_chip_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
85 int pic32mx_handle_pgm_word_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
86 int pic32mx_chip_erase(struct flash_bank_s
*bank
);
88 flash_driver_t pic32mx_flash
=
91 .register_commands
= pic32mx_register_commands
,
92 .flash_bank_command
= pic32mx_flash_bank_command
,
93 .erase
= pic32mx_erase
,
94 .protect
= pic32mx_protect
,
95 .write
= pic32mx_write
,
96 .probe
= pic32mx_probe
,
97 .auto_probe
= pic32mx_auto_probe
,
98 .erase_check
= default_flash_mem_blank_check
,
99 .protect_check
= pic32mx_protect_check
,
103 int pic32mx_register_commands(struct command_context_s
*cmd_ctx
)
105 command_t
*pic32mx_cmd
= register_command(cmd_ctx
, NULL
, "pic32mx", NULL
, COMMAND_ANY
, "pic32mx flash specific commands");
108 register_command(cmd_ctx
, pic32mx_cmd
, "lock", pic32mx_handle_lock_command
, COMMAND_EXEC
,
110 register_command(cmd_ctx
, pic32mx_cmd
, "unlock", pic32mx_handle_unlock_command
, COMMAND_EXEC
,
111 "unlock protected device");
113 register_command(cmd_ctx
, pic32mx_cmd
, "chip_erase", pic32mx_handle_chip_erase_command
, COMMAND_EXEC
,
115 register_command(cmd_ctx
, pic32mx_cmd
, "pgm_word", pic32mx_handle_pgm_word_command
, COMMAND_EXEC
,
120 /* flash bank pic32mx <base> <size> 0 0 <target#>
122 int pic32mx_flash_bank_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct flash_bank_s
*bank
)
124 pic32mx_flash_bank_t
*pic32mx_info
;
128 LOG_WARNING("incomplete flash_bank pic32mx configuration");
129 return ERROR_FLASH_BANK_INVALID
;
132 pic32mx_info
= malloc(sizeof(pic32mx_flash_bank_t
));
133 bank
->driver_priv
= pic32mx_info
;
135 pic32mx_info
->write_algorithm
= NULL
;
136 pic32mx_info
->probed
= 0;
141 u32
pic32mx_get_flash_status(flash_bank_t
*bank
)
143 target_t
*target
= bank
->target
;
146 target_read_u32(target
, PIC32MX_NVMCON
, &status
);
151 u32
pic32mx_wait_status_busy(flash_bank_t
*bank
, int timeout
)
155 /* wait for busy to clear */
156 while (((status
= pic32mx_get_flash_status(bank
)) & NVMCON_NVMWR
) && (timeout
-- > 0))
158 LOG_DEBUG("status: 0x%x", status
);
162 LOG_DEBUG("timeout: status: 0x%x", status
);
167 int pic32mx_nvm_exec(struct flash_bank_s
*bank
, u32 op
, u32 timeout
)
169 target_t
*target
= bank
->target
;
172 target_write_u32(target
, PIC32MX_NVMCON
, NVMCON_NVMWREN
|op
);
174 /* unlock flash registers */
175 target_write_u32(target
, PIC32MX_NVMKEY
, NVMKEY1
);
176 target_write_u32(target
, PIC32MX_NVMKEY
, NVMKEY2
);
178 /* start operation */
179 target_write_u32(target
, PIC32MX_NVMCONSET
, NVMCON_NVMWR
);
181 status
= pic32mx_wait_status_busy(bank
, timeout
);
183 /* lock flash registers */
184 target_write_u32(target
, PIC32MX_NVMCONCLR
, NVMCON_NVMWREN
);
189 int pic32mx_protect_check(struct flash_bank_s
*bank
)
191 target_t
*target
= bank
->target
;
192 pic32mx_flash_bank_t
*pic32mx_info
= bank
->driver_priv
;
198 if (target
->state
!= TARGET_HALTED
)
200 LOG_ERROR("Target not halted");
201 return ERROR_TARGET_NOT_HALTED
;
204 target_read_u32(target
, PIC32MX_DEVCFG0
, &devcfg0
);
205 if((devcfg0
& (1<<28)) == 0) /* code protect bit */
206 num_pages
= 0xffff; /* All pages protected */
207 else if(bank
->base
== PIC32MX_KSEG1_BOOT_FLASH
)
209 if(devcfg0
& (1<<24))
210 num_pages
= 0; /* All pages unprotected */
212 num_pages
= 0xffff; /* All pages protected */
215 num_pages
= (~devcfg0
>> 12) & 0xff;
216 for (s
= 0; s
< bank
->num_sectors
&& s
< num_pages
; s
++)
217 bank
->sectors
[s
].is_protected
= 1;
218 for (; s
< bank
->num_sectors
; s
++)
219 bank
->sectors
[s
].is_protected
= 0;
224 int pic32mx_erase(struct flash_bank_s
*bank
, int first
, int last
)
226 target_t
*target
= bank
->target
;
230 if (bank
->target
->state
!= TARGET_HALTED
)
232 LOG_ERROR("Target not halted");
233 return ERROR_TARGET_NOT_HALTED
;
237 if ((first
== 0) && (last
== (bank
->num_sectors
- 1)) && (bank
->base
== PIC32MX_KSEG0_PGM_FLASH
|| bank
->base
== PIC32MX_KSEG1_PGM_FLASH
))
239 status
= pic32mx_nvm_exec(bank
, NVMCON_OP_PFM_ERASE
, 50);
240 if( status
& NVMCON_NVMERR
)
241 return ERROR_FLASH_OPERATION_FAILED
;
242 if( status
& NVMCON_LVDERR
)
243 return ERROR_FLASH_OPERATION_FAILED
;
248 for (i
= first
; i
<= last
; i
++)
250 target_write_u32(target
, PIC32MX_NVMADDR
, bank
->base
+ bank
->sectors
[i
].offset
);
252 status
= pic32mx_nvm_exec(bank
, NVMCON_OP_PAGE_ERASE
, 10);
254 if( status
& NVMCON_NVMERR
)
255 return ERROR_FLASH_OPERATION_FAILED
;
256 if( status
& NVMCON_LVDERR
)
257 return ERROR_FLASH_OPERATION_FAILED
;
258 bank
->sectors
[i
].is_erased
= 1;
264 int pic32mx_protect(struct flash_bank_s
*bank
, int set
, int first
, int last
)
266 pic32mx_flash_bank_t
*pic32mx_info
= NULL
;
267 target_t
*target
= bank
->target
;
268 u16 prot_reg
[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
273 pic32mx_info
= bank
->driver_priv
;
275 if (target
->state
!= TARGET_HALTED
)
277 LOG_ERROR("Target not halted");
278 return ERROR_TARGET_NOT_HALTED
;
282 if ((first
&& (first
% pic32mx_info
->ppage_size
)) || ((last
+ 1) && (last
+ 1) % pic32mx_info
->ppage_size
))
284 LOG_WARNING("sector start/end incorrect - stm32 has %dK sector protection", pic32mx_info
->ppage_size
);
285 return ERROR_FLASH_SECTOR_INVALID
;
288 /* medium density - each bit refers to a 4bank protection
289 * high density - each bit refers to a 2bank protection */
290 target_read_u32(target
, PIC32MX_FLASH_WRPR
, &protection
);
292 prot_reg
[0] = (u16
)protection
;
293 prot_reg
[1] = (u16
)(protection
>> 8);
294 prot_reg
[2] = (u16
)(protection
>> 16);
295 prot_reg
[3] = (u16
)(protection
>> 24);
297 if (pic32mx_info
->ppage_size
== 2)
299 /* high density flash */
301 /* bit 7 controls sector 62 - 255 protection */
305 prot_reg
[3] &= ~(1 << 7);
307 prot_reg
[3] |= (1 << 7);
315 for (i
= first
; i
<= last
; i
++)
317 reg
= (i
/ pic32mx_info
->ppage_size
) / 8;
318 bit
= (i
/ pic32mx_info
->ppage_size
) - (reg
* 8);
321 prot_reg
[reg
] &= ~(1 << bit
);
323 prot_reg
[reg
] |= (1 << bit
);
328 /* medium density flash */
329 for (i
= first
; i
<= last
; i
++)
331 reg
= (i
/ pic32mx_info
->ppage_size
) / 8;
332 bit
= (i
/ pic32mx_info
->ppage_size
) - (reg
* 8);
335 prot_reg
[reg
] &= ~(1 << bit
);
337 prot_reg
[reg
] |= (1 << bit
);
341 if ((status
= pic32mx_erase_options(bank
)) != ERROR_OK
)
344 pic32mx_info
->option_bytes
.protection
[0] = prot_reg
[0];
345 pic32mx_info
->option_bytes
.protection
[1] = prot_reg
[1];
346 pic32mx_info
->option_bytes
.protection
[2] = prot_reg
[2];
347 pic32mx_info
->option_bytes
.protection
[3] = prot_reg
[3];
349 return pic32mx_write_options(bank
);
355 int pic32mx_write_block(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 count
)
357 pic32mx_flash_bank_t
*pic32mx_info
= bank
->driver_priv
;
358 target_t
*target
= bank
->target
;
359 u32 buffer_size
= 8192;
360 working_area_t
*source
;
361 u32 address
= bank
->base
+ offset
;
362 reg_param_t reg_params
[4];
364 armv7m_algorithm_t armv7m_info
;
365 int retval
= ERROR_OK
;
367 u8 pic32mx_flash_write_code
[] = {
369 0xDF, 0xF8, 0x24, 0x40, /* ldr r4, PIC32MX_FLASH_CR */
370 0x09, 0x4D, /* ldr r5, PIC32MX_FLASH_SR */
371 0x4F, 0xF0, 0x01, 0x03, /* mov r3, #1 */
372 0x23, 0x60, /* str r3, [r4, #0] */
373 0x30, 0xF8, 0x02, 0x3B, /* ldrh r3, [r0], #2 */
374 0x21, 0xF8, 0x02, 0x3B, /* strh r3, [r1], #2 */
376 0x2B, 0x68, /* ldr r3, [r5, #0] */
377 0x13, 0xF0, 0x01, 0x0F, /* tst r3, #0x01 */
378 0xFB, 0xD0, /* beq busy */
379 0x13, 0xF0, 0x14, 0x0F, /* tst r3, #0x14 */
380 0x01, 0xD1, /* bne exit */
381 0x01, 0x3A, /* subs r2, r2, #1 */
382 0xED, 0xD1, /* bne write */
384 0xFE, 0xE7, /* b exit */
385 0x10, 0x20, 0x02, 0x40, /* PIC32MX_FLASH_CR: .word 0x40022010 */
386 0x0C, 0x20, 0x02, 0x40 /* PIC32MX_FLASH_SR: .word 0x4002200C */
389 /* flash write code */
390 if (target_alloc_working_area(target
, sizeof(pic32mx_flash_write_code
), &pic32mx_info
->write_algorithm
) != ERROR_OK
)
392 LOG_WARNING("no working area available, can't do block memory writes");
393 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
396 if ((retval
=target_write_buffer(target
, pic32mx_info
->write_algorithm
->address
, sizeof(pic32mx_flash_write_code
), pic32mx_flash_write_code
))!=ERROR_OK
)
400 while (target_alloc_working_area(target
, buffer_size
, &source
) != ERROR_OK
)
403 if (buffer_size
<= 256)
405 /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
406 if (pic32mx_info
->write_algorithm
)
407 target_free_working_area(target
, pic32mx_info
->write_algorithm
);
409 LOG_WARNING("no large enough working area available, can't do block memory writes");
410 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
414 armv7m_info
.common_magic
= ARMV7M_COMMON_MAGIC
;
415 armv7m_info
.core_mode
= ARMV7M_MODE_ANY
;
417 init_reg_param(®_params
[0], "r0", 32, PARAM_OUT
);
418 init_reg_param(®_params
[1], "r1", 32, PARAM_OUT
);
419 init_reg_param(®_params
[2], "r2", 32, PARAM_OUT
);
420 init_reg_param(®_params
[3], "r3", 32, PARAM_IN
);
424 u32 thisrun_count
= (count
> (buffer_size
/ 2)) ? (buffer_size
/ 2) : count
;
426 if ((retval
= target_write_buffer(target
, source
->address
, thisrun_count
* 2, buffer
))!=ERROR_OK
)
429 buf_set_u32(reg_params
[0].value
, 0, 32, source
->address
);
430 buf_set_u32(reg_params
[1].value
, 0, 32, address
);
431 buf_set_u32(reg_params
[2].value
, 0, 32, thisrun_count
);
433 if ((retval
= target
->type
->run_algorithm(target
, 0, NULL
, 4, reg_params
, pic32mx_info
->write_algorithm
->address
, \
434 pic32mx_info
->write_algorithm
->address
+ (sizeof(pic32mx_flash_write_code
) - 10), 10000, &armv7m_info
)) != ERROR_OK
)
436 LOG_ERROR("error executing pic32mx flash write algorithm");
437 retval
= ERROR_FLASH_OPERATION_FAILED
;
441 if (buf_get_u32(reg_params
[3].value
, 0, 32) & 0x14)
443 retval
= ERROR_FLASH_OPERATION_FAILED
;
447 buffer
+= thisrun_count
* 2;
448 address
+= thisrun_count
* 2;
449 count
-= thisrun_count
;
452 target_free_working_area(target
, source
);
453 target_free_working_area(target
, pic32mx_info
->write_algorithm
);
455 destroy_reg_param(®_params
[0]);
456 destroy_reg_param(®_params
[1]);
457 destroy_reg_param(®_params
[2]);
458 destroy_reg_param(®_params
[3]);
462 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
466 int pic32mx_write_word(struct flash_bank_s
*bank
, u32 address
, u32 word
)
468 target_t
*target
= bank
->target
;
470 target_write_u32(target
, PIC32MX_NVMADDR
, address
);
471 target_write_u32(target
, PIC32MX_NVMDATA
, word
);
473 return pic32mx_nvm_exec(bank
, NVMCON_OP_WORD_PROG
, 5);
476 int pic32mx_write(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 count
)
478 target_t
*target
= bank
->target
;
479 u32 words_remaining
= (count
/ 4);
480 u32 bytes_remaining
= (count
& 0x00000003);
481 u32 address
= bank
->base
+ offset
;
482 u32 bytes_written
= 0;
486 if (bank
->target
->state
!= TARGET_HALTED
)
488 LOG_ERROR("Target not halted");
489 return ERROR_TARGET_NOT_HALTED
;
494 LOG_WARNING("offset 0x%x breaks required 4-byte alignment", offset
);
495 return ERROR_FLASH_DST_BREAKS_ALIGNMENT
;
498 /* multiple words (4-byte) to be programmed? */
499 if (words_remaining
> 0)
501 /* try using a block write */
502 if ((retval
= pic32mx_write_block(bank
, buffer
, offset
, words_remaining
)) != ERROR_OK
)
504 if (retval
== ERROR_TARGET_RESOURCE_NOT_AVAILABLE
)
506 /* if block write failed (no sufficient working area),
507 * we use normal (slow) single dword accesses */
508 LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
510 else if (retval
== ERROR_FLASH_OPERATION_FAILED
)
512 LOG_ERROR("flash writing failed with error code: 0x%x", retval
);
513 return ERROR_FLASH_OPERATION_FAILED
;
518 buffer
+= words_remaining
* 4;
519 address
+= words_remaining
* 4;
524 while (words_remaining
> 0)
526 status
= pic32mx_write_word(bank
, address
, *(u32
*)(buffer
+ bytes_written
));
528 if( status
& NVMCON_NVMERR
)
529 return ERROR_FLASH_OPERATION_FAILED
;
530 if( status
& NVMCON_LVDERR
)
531 return ERROR_FLASH_OPERATION_FAILED
;
540 u8 last_word
[4] = {0xff, 0xff, 0xff, 0xff};
543 while(bytes_remaining
> 0)
545 /* Assumes little endian */
546 last_word
[i
++] = *(buffer
+ bytes_written
);
551 status
= pic32mx_write_word(bank
, address
, *(u32
*)last_word
);
553 if( status
& NVMCON_NVMERR
)
554 return ERROR_FLASH_OPERATION_FAILED
;
555 if( status
& NVMCON_LVDERR
)
556 return ERROR_FLASH_OPERATION_FAILED
;
562 int pic32mx_probe(struct flash_bank_s
*bank
)
564 target_t
*target
= bank
->target
;
565 pic32mx_flash_bank_t
*pic32mx_info
= bank
->driver_priv
;
566 mips32_common_t
*mips32
= target
->arch_info
;
567 mips_ejtag_t
*ejtag_info
= &mips32
->ejtag_info
;
573 pic32mx_info
->probed
= 0;
575 device_id
= ejtag_info
->idcode
;
576 LOG_INFO( "device id = 0x%08x (manuf 0x%03x dev 0x%02x, ver 0x%03x)", device_id
, (device_id
>>1)&0x7ff, (device_id
>>12)&0xff, (device_id
>>20)&0xfff );
578 if(((device_id
>>1)&0x7ff) != PIC32MX_MANUF_ID
) {
579 LOG_WARNING( "Cannot identify target as a PIC32MX family." );
580 return ERROR_FLASH_OPERATION_FAILED
;
584 if(bank
->base
== PIC32MX_KSEG1_BOOT_FLASH
|| bank
->base
== 1) {
585 /* 0xBFC00000: Boot flash size fixed at 12k */
588 /* 0xBD000000: Program flash size varies with device */
589 for(i
=0; pic32mx_devs
[i
].name
!= NULL
; i
++)
590 if(pic32mx_devs
[i
].devid
== ((device_id
>> 12) & 0xff)) {
591 num_pages
= pic32mx_devs
[i
].pfm_size
;
594 if(pic32mx_devs
[i
].name
== NULL
) {
595 LOG_WARNING( "Cannot identify target as a PIC32MX family." );
596 return ERROR_FLASH_OPERATION_FAILED
;
601 if (bank
->target
->state
!= TARGET_HALTED
)
603 LOG_ERROR("Target not halted");
604 return ERROR_TARGET_NOT_HALTED
;
607 /* get flash size from target */
608 if (target_read_u16(target
, 0x1FFFF7E0, &num_pages
) != ERROR_OK
)
610 /* failed reading flash size, default to max target family */
615 LOG_INFO( "flash size = %dkbytes", num_pages
);
617 /* calculate numbers of pages */
618 num_pages
/= (page_size
/ 1024);
620 if(bank
->base
== 0) bank
->base
= PIC32MX_KSEG1_PGM_FLASH
;
621 if(bank
->base
== 1) bank
->base
= PIC32MX_KSEG1_BOOT_FLASH
;
622 bank
->size
= (num_pages
* page_size
);
623 bank
->num_sectors
= num_pages
;
624 bank
->chip_width
= 4;
626 bank
->sectors
= malloc(sizeof(flash_sector_t
) * num_pages
);
628 for (i
= 0; i
< num_pages
; i
++)
630 bank
->sectors
[i
].offset
= i
* page_size
;
631 bank
->sectors
[i
].size
= page_size
;
632 bank
->sectors
[i
].is_erased
= -1;
633 bank
->sectors
[i
].is_protected
= 1;
636 pic32mx_info
->probed
= 1;
641 int pic32mx_auto_probe(struct flash_bank_s
*bank
)
643 pic32mx_flash_bank_t
*pic32mx_info
= bank
->driver_priv
;
644 if (pic32mx_info
->probed
)
646 return pic32mx_probe(bank
);
649 int pic32mx_handle_part_id_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
654 int pic32mx_info(struct flash_bank_s
*bank
, char *buf
, int buf_size
)
656 target_t
*target
= bank
->target
;
657 mips32_common_t
*mips32
= target
->arch_info
;
658 mips_ejtag_t
*ejtag_info
= &mips32
->ejtag_info
;
662 device_id
= ejtag_info
->idcode
;
664 if(((device_id
>>1)&0x7ff) != PIC32MX_MANUF_ID
) {
665 snprintf(buf
, buf_size
, "Cannot identify target as a PIC32MX family (manufacturer 0x%03d != 0x%03d)\n", (device_id
>>1)&0x7ff, PIC32MX_MANUF_ID
);
666 return ERROR_FLASH_OPERATION_FAILED
;
668 for(i
=0; pic32mx_devs
[i
].name
!= NULL
; i
++)
669 if(pic32mx_devs
[i
].devid
== ((device_id
>> 12) & 0xff)) {
670 printed
= snprintf(buf
, buf_size
, "PIC32MX%s", pic32mx_devs
[i
].name
);
673 if(pic32mx_devs
[i
].name
== NULL
) {
674 snprintf(buf
, buf_size
, "Cannot identify target as a PIC32MX family\n");
675 return ERROR_FLASH_OPERATION_FAILED
;
679 printed
= snprintf(buf
, buf_size
, " Ver: 0x%03x", (device_id
>>20)&0xfff);
685 int pic32mx_handle_lock_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
688 target_t
*target
= NULL
;
689 pic32mx_flash_bank_t
*pic32mx_info
= NULL
;
693 command_print(cmd_ctx
, "pic32mx lock <bank>");
697 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
700 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
704 pic32mx_info
= bank
->driver_priv
;
706 target
= bank
->target
;
708 if (target
->state
!= TARGET_HALTED
)
710 LOG_ERROR("Target not halted");
711 return ERROR_TARGET_NOT_HALTED
;
714 if (pic32mx_erase_options(bank
) != ERROR_OK
)
716 command_print(cmd_ctx
, "pic32mx failed to erase options");
720 /* set readout protection */
721 pic32mx_info
->option_bytes
.RDP
= 0;
723 if (pic32mx_write_options(bank
) != ERROR_OK
)
725 command_print(cmd_ctx
, "pic32mx failed to lock device");
729 command_print(cmd_ctx
, "pic32mx locked");
734 int pic32mx_handle_unlock_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
737 target_t
*target
= NULL
;
738 pic32mx_flash_bank_t
*pic32mx_info
= NULL
;
742 command_print(cmd_ctx
, "pic32mx unlock <bank>");
746 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
749 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
753 pic32mx_info
= bank
->driver_priv
;
755 target
= bank
->target
;
757 if (target
->state
!= TARGET_HALTED
)
759 LOG_ERROR("Target not halted");
760 return ERROR_TARGET_NOT_HALTED
;
763 if (pic32mx_erase_options(bank
) != ERROR_OK
)
765 command_print(cmd_ctx
, "pic32mx failed to unlock device");
769 if (pic32mx_write_options(bank
) != ERROR_OK
)
771 command_print(cmd_ctx
, "pic32mx failed to lock device");
775 command_print(cmd_ctx
, "pic32mx unlocked");
781 int pic32mx_chip_erase(struct flash_bank_s
*bank
)
783 target_t
*target
= bank
->target
;
786 if (target
->state
!= TARGET_HALTED
)
788 LOG_ERROR("Target not halted");
789 return ERROR_TARGET_NOT_HALTED
;
792 LOG_INFO("PIC32MX chip erase called");
795 /* unlock option flash registers */
796 target_write_u32(target
, PIC32MX_FLASH_KEYR
, KEY1
);
797 target_write_u32(target
, PIC32MX_FLASH_KEYR
, KEY2
);
799 /* chip erase flash memory */
800 target_write_u32(target
, PIC32MX_FLASH_CR
, FLASH_MER
);
801 target_write_u32(target
, PIC32MX_FLASH_CR
, FLASH_MER
|FLASH_STRT
);
803 status
= pic32mx_wait_status_busy(bank
, 10);
805 target_write_u32(target
, PIC32MX_FLASH_CR
, FLASH_LOCK
);
807 if( status
& FLASH_WRPRTERR
)
809 LOG_ERROR("pic32mx device protected");
813 if( status
& FLASH_PGERR
)
815 LOG_ERROR("pic32mx device programming failed");
823 int pic32mx_handle_chip_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
831 command_print(cmd_ctx
, "pic32mx chip_erase");
835 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
838 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
842 if (pic32mx_chip_erase(bank
) == ERROR_OK
)
844 /* set all sectors as erased */
845 for (i
= 0; i
< bank
->num_sectors
; i
++)
847 bank
->sectors
[i
].is_erased
= 1;
850 command_print(cmd_ctx
, "pic32mx chip erase complete");
854 command_print(cmd_ctx
, "pic32mx chip erase failed");
861 int pic32mx_handle_pgm_word_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
870 command_print(cmd_ctx
, "pic32mx pgm_word <addr> <value> <bank>");
874 address
= strtoul(args
[0], NULL
, 0);
875 value
= strtoul(args
[1], NULL
, 0);
877 bank
= get_flash_bank_by_num(strtoul(args
[2], NULL
, 0));
880 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[2]);
883 if (address
< bank
->base
|| address
>= (bank
->base
+bank
->size
))
885 command_print(cmd_ctx
, "flash address '%s' is out of bounds", args
[0]);
890 status
= pic32mx_write_word(bank
, address
, value
);
891 if( status
& NVMCON_NVMERR
)
892 res
= ERROR_FLASH_OPERATION_FAILED
;
893 if( status
& NVMCON_LVDERR
)
894 res
= ERROR_FLASH_OPERATION_FAILED
;
897 command_print(cmd_ctx
, "pic32mx pgm word complete");
899 command_print(cmd_ctx
, "pic32mx pgm word failed (status=0x%x)", status
);
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