src/flash/nor/swm050.c

   1 /***************************************************************************
   2  *   Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>                    *
   3  *   Copyright (C) 2019 Caleb Szalacinski <contact@skiboy.net>             *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  17  ***************************************************************************/
  18
  19 #ifdef HAVE_CONFIG_H
  20 #include "config.h"
  21 #endif
  22
  23 #include "imp.h"
  24 #include <target/image.h>
  25
  26 #define SWM050_DELAY            100
  27
  28 #define SWM050_FLASH_PAGE_SIZE  0x200
  29 #define SWM050_FLASH_PAGES      16
  30
  31 #define SWM050_CPU_ID           0xE000ED00
  32 #define SWM050_CPU_ID_VAL       0x410CC200
  33
  34 #define SWM050_FLASH_REG1       0x1F000000
  35 #define SWM050_FLASH_REG2       0x1F000038
  36 #define SWM050_FLASH_KEY        0xAAAAAAAA
  37
  38 #define SWM050_SYSCTL_CFG_0     0x400F0000
  39 #define SWM050_SYSCTL_DBLF      0x400F0008
  40
  41 static int swm050_erase(struct flash_bank *bank, int first, int last)
  42 {
  43         struct target *target = bank->target;
  44         int retval, curr_page;
  45         uint32_t curr_addr;
  46
  47         if (target->state != TARGET_HALTED) {
  48                 LOG_ERROR("Target not halted");
  49                 return ERROR_TARGET_NOT_HALTED;
  50         }
  51
  52         /* Perform erase */
  53         retval = target_write_u32(target, SWM050_FLASH_REG1, 0x4);
  54         if (retval != ERROR_OK)
  55                 return retval;
  56
  57         for (curr_page = first; curr_page <= last; curr_page++) {
  58                 curr_addr = bank->base + (SWM050_FLASH_PAGE_SIZE * curr_page);
  59                 /* Perform write */
  60                 retval = target_write_u32(target, curr_addr, SWM050_FLASH_KEY);
  61                 if (retval != ERROR_OK)
  62                         return retval;
  63                 alive_sleep(SWM050_DELAY);
  64         }
  65
  66         /* Close flash interface */
  67         retval = target_write_u32(target, SWM050_FLASH_REG1, 0x0);
  68         if (retval != ERROR_OK)
  69                 return retval;
  70
  71         return ERROR_OK;
  72 }
  73
  74 static int swm050_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
  75 {
  76         struct target *target = bank->target;
  77         int retval;
  78
  79         if (target->state != TARGET_HALTED) {
  80                 LOG_ERROR("Target not halted");
  81                 retval = ERROR_TARGET_NOT_HALTED;
  82                 return retval;
  83         }
  84
  85         /* Perform write */
  86         retval = target_write_u32(target, SWM050_FLASH_REG1, 0x1);
  87         if (retval != ERROR_OK)
  88                 return retval;
  89
  90         retval = target_write_memory(target, bank->base + offset, 4, count/4, buffer);
  91         if (retval != ERROR_OK)
  92                 return retval;
  93
  94         /* Close flash interface */
  95         retval = target_write_u32(target, SWM050_FLASH_REG1, 0x0);
  96         if (retval != ERROR_OK)
  97                 return retval;
  98
  99         return ERROR_OK;
 100 }
 101
 102 static int swm050_probe(struct flash_bank *bank)
 103 {
 104         return ERROR_OK;
 105 }
 106
 107 static int swm050_mass_erase(struct flash_bank *bank)
 108 {
 109         struct target *target = bank->target;
 110         int retval;
 111
 112         if (target->state != TARGET_HALTED) {
 113                 LOG_ERROR("Target not halted");
 114                 return ERROR_TARGET_NOT_HALTED;
 115         }
 116
 117         /* Perform mass erase */
 118         retval = target_write_u32(target, SWM050_FLASH_REG1, 0x6);
 119         if (retval != ERROR_OK)
 120                 return retval;
 121         retval = target_write_u32(target, SWM050_FLASH_REG2, 0x1);
 122         if (retval != ERROR_OK)
 123                 return retval;
 124         retval = target_write_u32(target, 0x0, SWM050_FLASH_KEY);
 125         if (retval != ERROR_OK)
 126                 return retval;
 127
 128         alive_sleep(SWM050_DELAY);
 129
 130         /* Close flash interface */
 131         retval = target_write_u32(target, SWM050_FLASH_REG1, 0x0);
 132         if (retval != ERROR_OK)
 133                 return retval;
 134
 135         return ERROR_OK;
 136 }
 137
 138 COMMAND_HANDLER(swm050_handle_mass_erase_command)
 139 {
 140         if (CMD_ARGC < 1)
 141                 return ERROR_COMMAND_SYNTAX_ERROR;
 142
 143         struct flash_bank *bank;
 144         int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
 145         if (ERROR_OK != retval)
 146                 return retval;
 147
 148         retval = swm050_mass_erase(bank);
 149         if (retval == ERROR_OK)
 150                 command_print(CMD, "swm050 mass erase complete");
 151         else
 152                 command_print(CMD, "swm050 mass erase failed");
 153
 154         return retval;
 155 }
 156
 157 FLASH_BANK_COMMAND_HANDLER(swm050_flash_bank_command)
 158 {
 159         if (bank->sectors) {
 160                 free(bank->sectors);
 161                 bank->sectors = NULL;
 162         }
 163         bank->write_start_alignment = 4;
 164         bank->write_end_alignment = 4;
 165         bank->size = SWM050_FLASH_PAGE_SIZE * SWM050_FLASH_PAGES;
 166
 167         bank->num_sectors = SWM050_FLASH_PAGES;
 168         bank->sectors = alloc_block_array(0, SWM050_FLASH_PAGE_SIZE, SWM050_FLASH_PAGES);
 169         if (!bank->sectors)
 170                 return ERROR_FAIL;
 171
 172         for (int i = 0; i < bank->num_sectors; i++)
 173                 bank->sectors[i].is_protected = 0;
 174
 175         return ERROR_OK;
 176 }
 177
 178 static const struct command_registration swm050_exec_command_handlers[] = {
 179         {
 180                 .name = "mass_erase",
 181                 .handler = swm050_handle_mass_erase_command,
 182                 .mode = COMMAND_EXEC,
 183                 .usage = "bank_id",
 184                 .help = "Erase entire flash device.",
 185         },
 186         COMMAND_REGISTRATION_DONE
 187 };
 188
 189 static const struct command_registration swm050_command_handlers[] = {
 190         {
 191                 .name = "swm050",
 192                 .mode = COMMAND_ANY,
 193                 .help = "swm050 flash command group",
 194                 .usage = "",
 195                 .chain = swm050_exec_command_handlers,
 196         },
 197         COMMAND_REGISTRATION_DONE
 198 };
 199
 200 struct flash_driver swm050_flash = {
 201         .name = "swm050",
 202         .commands = swm050_command_handlers,
 203         .flash_bank_command = swm050_flash_bank_command,
 204         .erase = swm050_erase,
 205         .write = swm050_write,
 206         .read = default_flash_read,
 207         .probe = swm050_probe,
 208         .auto_probe = swm050_probe,
 209         .erase_check = default_flash_blank_check,
 210         .free_driver_priv = default_flash_free_driver_priv,
 211 };