1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 #include <target/arm.h>
30 #include <helper/binarybuffer.h>
31 #include <target/algorithm.h>
34 struct str7x_mem_layout mem_layout_str7bank0
[] = {
35 {0x00000000, 0x02000, 0x01},
36 {0x00002000, 0x02000, 0x02},
37 {0x00004000, 0x02000, 0x04},
38 {0x00006000, 0x02000, 0x08},
39 {0x00008000, 0x08000, 0x10},
40 {0x00010000, 0x10000, 0x20},
41 {0x00020000, 0x10000, 0x40},
42 {0x00030000, 0x10000, 0x80}
45 struct str7x_mem_layout mem_layout_str7bank1
[] = {
46 {0x00000000, 0x02000, 0x10000},
47 {0x00002000, 0x02000, 0x20000}
50 static int str7x_get_flash_adr(struct flash_bank
*bank
, uint32_t reg
)
52 struct str7x_flash_bank
*str7x_info
= bank
->driver_priv
;
53 return (str7x_info
->register_base
| reg
);
56 static int str7x_build_block_list(struct flash_bank
*bank
)
58 struct str7x_flash_bank
*str7x_info
= bank
->driver_priv
;
62 int b0_sectors
= 0, b1_sectors
= 0;
79 LOG_ERROR("BUG: unknown bank->size encountered");
83 num_sectors
= b0_sectors
+ b1_sectors
;
85 bank
->num_sectors
= num_sectors
;
86 bank
->sectors
= malloc(sizeof(struct flash_sector
) * num_sectors
);
87 str7x_info
->sector_bits
= malloc(sizeof(uint32_t) * num_sectors
);
91 for (i
= 0; i
< b0_sectors
; i
++)
93 bank
->sectors
[num_sectors
].offset
= mem_layout_str7bank0
[i
].sector_start
;
94 bank
->sectors
[num_sectors
].size
= mem_layout_str7bank0
[i
].sector_size
;
95 bank
->sectors
[num_sectors
].is_erased
= -1;
96 /* the reset_init handler marks all the sectors unprotected,
97 * matching hardware after reset; keep the driver in sync
99 bank
->sectors
[num_sectors
].is_protected
= 0;
100 str7x_info
->sector_bits
[num_sectors
++] = mem_layout_str7bank0
[i
].sector_bit
;
103 for (i
= 0; i
< b1_sectors
; i
++)
105 bank
->sectors
[num_sectors
].offset
= mem_layout_str7bank1
[i
].sector_start
;
106 bank
->sectors
[num_sectors
].size
= mem_layout_str7bank1
[i
].sector_size
;
107 bank
->sectors
[num_sectors
].is_erased
= -1;
108 /* the reset_init handler marks all the sectors unprotected,
109 * matching hardware after reset; keep the driver in sync
111 bank
->sectors
[num_sectors
].is_protected
= 0;
112 str7x_info
->sector_bits
[num_sectors
++] = mem_layout_str7bank1
[i
].sector_bit
;
118 /* flash bank str7x <base> <size> 0 0 <target#> <str71_variant>
120 FLASH_BANK_COMMAND_HANDLER(str7x_flash_bank_command
)
122 struct str7x_flash_bank
*str7x_info
;
126 LOG_WARNING("incomplete flash_bank str7x configuration");
127 return ERROR_FLASH_BANK_INVALID
;
130 str7x_info
= malloc(sizeof(struct str7x_flash_bank
));
131 bank
->driver_priv
= str7x_info
;
133 /* set default bits for str71x flash */
134 str7x_info
->busy_bits
= (FLASH_LOCK
| FLASH_BSYA1
| FLASH_BSYA0
);
135 str7x_info
->disable_bit
= (1 << 1);
137 if (strcmp(CMD_ARGV
[6], "STR71x") == 0)
139 str7x_info
->register_base
= 0x40100000;
141 else if (strcmp(CMD_ARGV
[6], "STR73x") == 0)
143 str7x_info
->register_base
= 0x80100000;
144 str7x_info
->busy_bits
= (FLASH_LOCK
| FLASH_BSYA0
);
146 else if (strcmp(CMD_ARGV
[6], "STR75x") == 0)
148 str7x_info
->register_base
= 0x20100000;
149 str7x_info
->disable_bit
= (1 << 0);
153 LOG_ERROR("unknown STR7x variant: '%s'", CMD_ARGV
[6]);
155 return ERROR_FLASH_BANK_INVALID
;
158 str7x_build_block_list(bank
);
160 str7x_info
->write_algorithm
= NULL
;
165 static uint32_t str7x_status(struct flash_bank
*bank
)
167 struct target
*target
= bank
->target
;
170 target_read_u32(target
, str7x_get_flash_adr(bank
, FLASH_CR0
), &retval
);
175 static uint32_t str7x_result(struct flash_bank
*bank
)
177 struct target
*target
= bank
->target
;
180 target_read_u32(target
, str7x_get_flash_adr(bank
, FLASH_ER
), &retval
);
185 static int str7x_protect_check(struct flash_bank
*bank
)
187 struct str7x_flash_bank
*str7x_info
= bank
->driver_priv
;
188 struct target
*target
= bank
->target
;
193 if (bank
->target
->state
!= TARGET_HALTED
)
195 LOG_ERROR("Target not halted");
196 return ERROR_TARGET_NOT_HALTED
;
199 target_read_u32(target
, str7x_get_flash_adr(bank
, FLASH_NVWPAR
), &retval
);
201 for (i
= 0; i
< bank
->num_sectors
; i
++)
203 if (retval
& str7x_info
->sector_bits
[i
])
204 bank
->sectors
[i
].is_protected
= 0;
206 bank
->sectors
[i
].is_protected
= 1;
212 static int str7x_erase(struct flash_bank
*bank
, int first
, int last
)
214 struct str7x_flash_bank
*str7x_info
= bank
->driver_priv
;
215 struct target
*target
= bank
->target
;
220 uint32_t sectors
= 0;
222 if (bank
->target
->state
!= TARGET_HALTED
)
224 LOG_ERROR("Target not halted");
225 return ERROR_TARGET_NOT_HALTED
;
228 for (i
= first
; i
<= last
; i
++)
230 sectors
|= str7x_info
->sector_bits
[i
];
233 LOG_DEBUG("sectors: 0x%" PRIx32
"", sectors
);
235 /* clear FLASH_ER register */
236 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_ER
), 0x0);
239 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_CR0
), cmd
);
242 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_CR1
), cmd
);
244 cmd
= FLASH_SER
| FLASH_WMS
;
245 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_CR0
), cmd
);
247 while (((retval
= str7x_status(bank
)) & str7x_info
->busy_bits
)) {
251 retval
= str7x_result(bank
);
255 LOG_ERROR("error erasing flash bank, FLASH_ER: 0x%" PRIx32
"", retval
);
256 return ERROR_FLASH_OPERATION_FAILED
;
259 for (i
= first
; i
<= last
; i
++)
260 bank
->sectors
[i
].is_erased
= 1;
265 static int str7x_protect(struct flash_bank
*bank
, int set
, int first
, int last
)
267 struct str7x_flash_bank
*str7x_info
= bank
->driver_priv
;
268 struct target
*target
= bank
->target
;
272 uint32_t protect_blocks
;
274 if (bank
->target
->state
!= TARGET_HALTED
)
276 LOG_ERROR("Target not halted");
277 return ERROR_TARGET_NOT_HALTED
;
280 protect_blocks
= 0xFFFFFFFF;
284 for (i
= first
; i
<= last
; i
++)
285 protect_blocks
&= ~(str7x_info
->sector_bits
[i
]);
288 /* clear FLASH_ER register */
289 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_ER
), 0x0);
292 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_CR0
), cmd
);
294 cmd
= str7x_get_flash_adr(bank
, FLASH_NVWPAR
);
295 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_AR
), cmd
);
297 cmd
= protect_blocks
;
298 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_DR0
), cmd
);
300 cmd
= FLASH_SPR
| FLASH_WMS
;
301 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_CR0
), cmd
);
303 while (((retval
= str7x_status(bank
)) & str7x_info
->busy_bits
)) {
307 retval
= str7x_result(bank
);
309 LOG_DEBUG("retval: 0x%8.8" PRIx32
"", retval
);
311 if (retval
& FLASH_ERER
)
312 return ERROR_FLASH_SECTOR_NOT_ERASED
;
313 else if (retval
& FLASH_WPF
)
314 return ERROR_FLASH_OPERATION_FAILED
;
319 static int str7x_write_block(struct flash_bank
*bank
, uint8_t *buffer
, uint32_t offset
, uint32_t count
)
321 struct str7x_flash_bank
*str7x_info
= bank
->driver_priv
;
322 struct target
*target
= bank
->target
;
323 uint32_t buffer_size
= 8192;
324 struct working_area
*source
;
325 uint32_t address
= bank
->base
+ offset
;
326 struct reg_param reg_params
[6];
327 struct arm_algorithm armv4_5_info
;
328 int retval
= ERROR_OK
;
330 uint32_t str7x_flash_write_code
[] = {
332 0xe3a04201, /* mov r4, #0x10000000 */
333 0xe5824000, /* str r4, [r2, #0x0] */
334 0xe5821010, /* str r1, [r2, #0x10] */
335 0xe4904004, /* ldr r4, [r0], #4 */
336 0xe5824008, /* str r4, [r2, #0x8] */
337 0xe4904004, /* ldr r4, [r0], #4 */
338 0xe582400c, /* str r4, [r2, #0xc] */
339 0xe3a04209, /* mov r4, #0x90000000 */
340 0xe5824000, /* str r4, [r2, #0x0] */
342 0xe5924000, /* ldr r4, [r2, #0x0] */
343 0xe1140005, /* tst r4, r5 */
344 0x1afffffc, /* bne busy */
345 0xe5924014, /* ldr r4, [r2, #0x14] */
346 0xe31400ff, /* tst r4, #0xff */
347 0x03140c01, /* tsteq r4, #0x100 */
348 0x1a000002, /* bne exit */
349 0xe2811008, /* add r1, r1, #0x8 */
350 0xe2533001, /* subs r3, r3, #1 */
351 0x1affffec, /* bne write */
353 0xeafffffe, /* b exit */
356 /* flash write code */
357 if (target_alloc_working_area(target
, 4 * 20, &str7x_info
->write_algorithm
) != ERROR_OK
)
359 LOG_WARNING("no working area available, can't do block memory writes");
360 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
363 target_write_buffer(target
, str7x_info
->write_algorithm
->address
, 20 * 4, (uint8_t*)str7x_flash_write_code
);
366 while (target_alloc_working_area(target
, buffer_size
, &source
) != ERROR_OK
)
369 if (buffer_size
<= 256)
371 /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
372 if (str7x_info
->write_algorithm
)
373 target_free_working_area(target
, str7x_info
->write_algorithm
);
375 LOG_WARNING("no large enough working area available, can't do block memory writes");
376 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
380 armv4_5_info
.common_magic
= ARM_COMMON_MAGIC
;
381 armv4_5_info
.core_mode
= ARM_MODE_SVC
;
382 armv4_5_info
.core_state
= ARM_STATE_ARM
;
384 init_reg_param(®_params
[0], "r0", 32, PARAM_OUT
);
385 init_reg_param(®_params
[1], "r1", 32, PARAM_OUT
);
386 init_reg_param(®_params
[2], "r2", 32, PARAM_OUT
);
387 init_reg_param(®_params
[3], "r3", 32, PARAM_OUT
);
388 init_reg_param(®_params
[4], "r4", 32, PARAM_IN
);
389 init_reg_param(®_params
[5], "r5", 32, PARAM_OUT
);
393 uint32_t thisrun_count
= (count
> (buffer_size
/ 8)) ? (buffer_size
/ 8) : count
;
395 target_write_buffer(target
, source
->address
, thisrun_count
* 8, buffer
);
397 buf_set_u32(reg_params
[0].value
, 0, 32, source
->address
);
398 buf_set_u32(reg_params
[1].value
, 0, 32, address
);
399 buf_set_u32(reg_params
[2].value
, 0, 32, str7x_get_flash_adr(bank
, FLASH_CR0
));
400 buf_set_u32(reg_params
[3].value
, 0, 32, thisrun_count
);
401 buf_set_u32(reg_params
[5].value
, 0, 32, str7x_info
->busy_bits
);
403 if ((retval
= target_run_algorithm(target
, 0, NULL
, 6, reg_params
, str7x_info
->write_algorithm
->address
, str7x_info
->write_algorithm
->address
+ (19 * 4), 10000, &armv4_5_info
)) != ERROR_OK
)
405 LOG_ERROR("error executing str7x flash write algorithm");
406 retval
= ERROR_FLASH_OPERATION_FAILED
;
410 if (buf_get_u32(reg_params
[4].value
, 0, 32) != 0x00)
412 retval
= ERROR_FLASH_OPERATION_FAILED
;
416 buffer
+= thisrun_count
* 8;
417 address
+= thisrun_count
* 8;
418 count
-= thisrun_count
;
421 target_free_working_area(target
, source
);
422 target_free_working_area(target
, str7x_info
->write_algorithm
);
424 destroy_reg_param(®_params
[0]);
425 destroy_reg_param(®_params
[1]);
426 destroy_reg_param(®_params
[2]);
427 destroy_reg_param(®_params
[3]);
428 destroy_reg_param(®_params
[4]);
429 destroy_reg_param(®_params
[5]);
434 static int str7x_write(struct flash_bank
*bank
, uint8_t *buffer
, uint32_t offset
, uint32_t count
)
436 struct target
*target
= bank
->target
;
437 struct str7x_flash_bank
*str7x_info
= bank
->driver_priv
;
438 uint32_t dwords_remaining
= (count
/ 8);
439 uint32_t bytes_remaining
= (count
& 0x00000007);
440 uint32_t address
= bank
->base
+ offset
;
441 uint32_t bytes_written
= 0;
444 uint32_t check_address
= offset
;
447 if (bank
->target
->state
!= TARGET_HALTED
)
449 LOG_ERROR("Target not halted");
450 return ERROR_TARGET_NOT_HALTED
;
455 LOG_WARNING("offset 0x%" PRIx32
" breaks required 8-byte alignment", offset
);
456 return ERROR_FLASH_DST_BREAKS_ALIGNMENT
;
459 for (i
= 0; i
< bank
->num_sectors
; i
++)
461 uint32_t sec_start
= bank
->sectors
[i
].offset
;
462 uint32_t sec_end
= sec_start
+ bank
->sectors
[i
].size
;
464 /* check if destination falls within the current sector */
465 if ((check_address
>= sec_start
) && (check_address
< sec_end
))
467 /* check if destination ends in the current sector */
468 if (offset
+ count
< sec_end
)
469 check_address
= offset
+ count
;
471 check_address
= sec_end
;
475 if (check_address
!= offset
+ count
)
476 return ERROR_FLASH_DST_OUT_OF_BANK
;
478 /* clear FLASH_ER register */
479 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_ER
), 0x0);
481 /* multiple dwords (8-byte) to be programmed? */
482 if (dwords_remaining
> 0)
484 /* try using a block write */
485 if ((retval
= str7x_write_block(bank
, buffer
, offset
, dwords_remaining
)) != ERROR_OK
)
487 if (retval
== ERROR_TARGET_RESOURCE_NOT_AVAILABLE
)
489 /* if block write failed (no sufficient working area),
490 * we use normal (slow) single dword accesses */
491 LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
493 else if (retval
== ERROR_FLASH_OPERATION_FAILED
)
495 /* if an error occured, we examine the reason, and quit */
496 retval
= str7x_result(bank
);
498 LOG_ERROR("flash writing failed with error code: 0x%x", retval
);
499 return ERROR_FLASH_OPERATION_FAILED
;
504 buffer
+= dwords_remaining
* 8;
505 address
+= dwords_remaining
* 8;
506 dwords_remaining
= 0;
510 while (dwords_remaining
> 0)
514 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_CR0
), cmd
);
517 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_AR
), address
);
520 target_write_memory(target
, str7x_get_flash_adr(bank
, FLASH_DR0
), 4, 1, buffer
+ bytes_written
);
524 target_write_memory(target
, str7x_get_flash_adr(bank
, FLASH_DR1
), 4, 1, buffer
+ bytes_written
);
527 /* start programming cycle */
528 cmd
= FLASH_DWPG
| FLASH_WMS
;
529 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_CR0
), cmd
);
531 while (((retval
= str7x_status(bank
)) & str7x_info
->busy_bits
))
536 retval
= str7x_result(bank
);
538 if (retval
& FLASH_PGER
)
539 return ERROR_FLASH_OPERATION_FAILED
;
540 else if (retval
& FLASH_WPF
)
541 return ERROR_FLASH_OPERATION_FAILED
;
549 uint8_t last_dword
[8] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
552 while (bytes_remaining
> 0)
554 last_dword
[i
++] = *(buffer
+ bytes_written
);
561 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_CR0
), cmd
);
564 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_AR
), address
);
567 target_write_memory(target
, str7x_get_flash_adr(bank
, FLASH_DR0
), 4, 1, last_dword
);
571 target_write_memory(target
, str7x_get_flash_adr(bank
, FLASH_DR1
), 4, 1, last_dword
+ 4);
574 /* start programming cycle */
575 cmd
= FLASH_DWPG
| FLASH_WMS
;
576 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_CR0
), cmd
);
578 while (((retval
= str7x_status(bank
)) & str7x_info
->busy_bits
))
583 retval
= str7x_result(bank
);
585 if (retval
& FLASH_PGER
)
586 return ERROR_FLASH_OPERATION_FAILED
;
587 else if (retval
& FLASH_WPF
)
588 return ERROR_FLASH_OPERATION_FAILED
;
594 static int str7x_probe(struct flash_bank
*bank
)
600 COMMAND_HANDLER(str7x_handle_part_id_command
)
606 static int str7x_info(struct flash_bank
*bank
, char *buf
, int buf_size
)
608 snprintf(buf
, buf_size
, "str7x flash driver info");
609 /* STR7x flash doesn't support sector protection interrogation.
610 * FLASH_NVWPAR acts as a write only register; its read value
611 * doesn't reflect the actual protection state of the sectors.
613 LOG_WARNING("STR7x flash lock information might not be correct "
614 "due to hardware limitations.");
618 COMMAND_HANDLER(str7x_handle_disable_jtag_command
)
620 struct target
*target
= NULL
;
621 struct str7x_flash_bank
*str7x_info
= NULL
;
624 uint16_t ProtectionLevel
= 0;
625 uint16_t ProtectionRegs
;
629 command_print(CMD_CTX
, "str7x disable_jtag <bank>");
633 struct flash_bank
*bank
;
634 int retval
= CALL_COMMAND_HANDLER(flash_command_get_bank
, 0, &bank
);
635 if (ERROR_OK
!= retval
)
638 str7x_info
= bank
->driver_priv
;
640 target
= bank
->target
;
642 if (target
->state
!= TARGET_HALTED
)
644 LOG_ERROR("Target not halted");
645 return ERROR_TARGET_NOT_HALTED
;
648 /* first we get protection status */
650 target_read_u32(target
, str7x_get_flash_adr(bank
, FLASH_NVAPR0
), ®
);
652 if (!(reg
& str7x_info
->disable_bit
))
657 target_read_u32(target
, str7x_get_flash_adr(bank
, FLASH_NVAPR1
), ®
);
658 ProtectionRegs
= ~(reg
>> 16);
660 while (((ProtectionRegs
) != 0) && (ProtectionLevel
< 16))
662 ProtectionRegs
>>= 1;
666 if (ProtectionLevel
== 0)
668 flash_cmd
= FLASH_SPR
;
669 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_CR0
), flash_cmd
);
670 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_AR
), 0x4010DFB8);
671 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_DR0
), 0xFFFFFFFD);
672 flash_cmd
= FLASH_SPR
| FLASH_WMS
;
673 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_CR0
), flash_cmd
);
677 flash_cmd
= FLASH_SPR
;
678 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_CR0
), flash_cmd
);
679 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_AR
), 0x4010DFBC);
680 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_DR0
), ~(1 << (15 + ProtectionLevel
)));
681 flash_cmd
= FLASH_SPR
| FLASH_WMS
;
682 target_write_u32(target
, str7x_get_flash_adr(bank
, FLASH_CR0
), flash_cmd
);
688 static const struct command_registration str7x_exec_command_handlers
[] = {
690 .name
= "disable_jtag",
691 .handler
= str7x_handle_disable_jtag_command
,
692 .mode
= COMMAND_EXEC
,
693 .help
= "disable jtag access",
695 COMMAND_REGISTRATION_DONE
697 static const struct command_registration str7x_command_handlers
[] = {
701 .help
= "str7x flash command group",
702 .chain
= str7x_exec_command_handlers
,
704 COMMAND_REGISTRATION_DONE
707 struct flash_driver str7x_flash
= {
709 .commands
= str7x_command_handlers
,
710 .flash_bank_command
= str7x_flash_bank_command
,
711 .erase
= str7x_erase
,
712 .protect
= str7x_protect
,
713 .write
= str7x_write
,
714 .probe
= str7x_probe
,
715 .auto_probe
= str7x_probe
,
716 .erase_check
= default_flash_blank_check
,
717 .protect_check
= str7x_protect_check
,
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