1 /***************************************************************************
2 * Copyright (C) 2011 by Mathias Kuester *
5 * Copyright (C) 2011 sleep(5) ltd *
6 * tomas@sleepfive.com *
8 * Copyright (C) 2012 by Christopher D. Kilgour *
9 * techie at whiterocker.com *
11 * Copyright (C) 2013 Nemui Trinomius *
12 * nemuisan_kawausogasuki@live.jp *
14 * Copyright (C) 2015 Tomas Vanek *
17 * This program is free software; you can redistribute it and/or modify *
18 * it under the terms of the GNU General Public License as published by *
19 * the Free Software Foundation; either version 2 of the License, or *
20 * (at your option) any later version. *
22 * This program is distributed in the hope that it will be useful, *
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
25 * GNU General Public License for more details. *
27 * You should have received a copy of the GNU General Public License *
28 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
29 ***************************************************************************/
35 #include "jtag/interface.h"
37 #include <helper/binarybuffer.h>
38 #include <helper/time_support.h>
39 #include <target/target_type.h>
40 #include <target/algorithm.h>
41 #include <target/armv7m.h>
42 #include <target/cortex_m.h>
45 * Implementation Notes
47 * The persistent memories in the Kinetis chip families K10 through
48 * K70 are all manipulated with the Flash Memory Module. Some
49 * variants call this module the FTFE, others call it the FTFL. To
50 * indicate that both are considered here, we use FTFX.
52 * Within the module, according to the chip variant, the persistent
53 * memory is divided into what Freescale terms Program Flash, FlexNVM,
54 * and FlexRAM. All chip variants have Program Flash. Some chip
55 * variants also have FlexNVM and FlexRAM, which always appear
58 * A given Kinetis chip may have 1, 2 or 4 blocks of flash. Here we map
59 * each block to a separate bank. Each block size varies by chip and
60 * may be determined by the read-only SIM_FCFG1 register. The sector
61 * size within each bank/block varies by chip, and may be 1, 2 or 4k.
62 * The sector size may be different for flash and FlexNVM.
64 * The first half of the flash (1 or 2 blocks) is always Program Flash
65 * and always starts at address 0x00000000. The "PFLSH" flag, bit 23
66 * of the read-only SIM_FCFG2 register, determines whether the second
67 * half of the flash is also Program Flash or FlexNVM+FlexRAM. When
68 * PFLSH is set, the second from the first half. When PFLSH is clear,
69 * the second half of flash is FlexNVM and always starts at address
70 * 0x10000000. FlexRAM, which is also present when PFLSH is clear,
71 * always starts at address 0x14000000.
73 * The Flash Memory Module provides a register set where flash
74 * commands are loaded to perform flash operations like erase and
75 * program. Different commands are available depending on whether
76 * Program Flash or FlexNVM/FlexRAM is being manipulated. Although
77 * the commands used are quite consistent between flash blocks, the
78 * parameters they accept differ according to the flash sector size.
83 #define FCF_ADDRESS 0x00000400
87 #define FCF_FDPROT 0xf
90 #define FLEXRAM 0x14000000
92 #define MSCM_OCMDR0 0x40001400
93 #define FMC_PFB01CR 0x4001f004
94 #define FTFx_FSTAT 0x40020000
95 #define FTFx_FCNFG 0x40020001
96 #define FTFx_FCCOB3 0x40020004
97 #define FTFx_FPROT3 0x40020010
98 #define FTFx_FDPROT 0x40020017
99 #define SIM_SDID 0x40048024
100 #define SIM_SOPT1 0x40047000
101 #define SIM_FCFG1 0x4004804c
102 #define SIM_FCFG2 0x40048050
103 #define WDOG_STCTRH 0x40052000
104 #define SMC_PMCTRL 0x4007E001
105 #define SMC_PMSTAT 0x4007E003
106 #define MCM_PLACR 0xF000300C
109 #define PM_STAT_RUN 0x01
110 #define PM_STAT_VLPR 0x04
111 #define PM_CTRL_RUNM_RUN 0x00
114 #define FTFx_CMD_BLOCKSTAT 0x00
115 #define FTFx_CMD_SECTSTAT 0x01
116 #define FTFx_CMD_LWORDPROG 0x06
117 #define FTFx_CMD_SECTERASE 0x09
118 #define FTFx_CMD_SECTWRITE 0x0b
119 #define FTFx_CMD_MASSERASE 0x44
120 #define FTFx_CMD_PGMPART 0x80
121 #define FTFx_CMD_SETFLEXRAM 0x81
123 /* The older Kinetis K series uses the following SDID layout :
130 * The newer Kinetis series uses the following SDID layout :
132 * Bit 27-24 : SUBFAMID
133 * Bit 23-20 : SERIESID
134 * Bit 19-16 : SRAMSIZE
136 * Bit 6-4 : Reserved (0)
139 * We assume that if bits 31-16 are 0 then it's an older
143 #define KINETIS_SOPT1_RAMSIZE_MASK 0x0000F000
144 #define KINETIS_SOPT1_RAMSIZE_K24FN1M 0x0000B000
146 #define KINETIS_SDID_K_SERIES_MASK 0x0000FFFF
148 #define KINETIS_SDID_DIEID_MASK 0x00000F80
150 #define KINETIS_SDID_DIEID_K22FN128 0x00000680 /* smaller pflash with FTFA */
151 #define KINETIS_SDID_DIEID_K22FN256 0x00000A80
152 #define KINETIS_SDID_DIEID_K22FN512 0x00000E80
153 #define KINETIS_SDID_DIEID_K24FN256 0x00000700
155 #define KINETIS_SDID_DIEID_K24FN1M 0x00000300 /* Detect Errata 7534 */
157 /* We can't rely solely on the FAMID field to determine the MCU
158 * type since some FAMID values identify multiple MCUs with
159 * different flash sector sizes (K20 and K22 for instance).
160 * Therefore we combine it with the DIEID bits which may possibly
161 * break if Freescale bumps the DIEID for a particular MCU. */
162 #define KINETIS_K_SDID_TYPE_MASK 0x00000FF0
163 #define KINETIS_K_SDID_K10_M50 0x00000000
164 #define KINETIS_K_SDID_K10_M72 0x00000080
165 #define KINETIS_K_SDID_K10_M100 0x00000100
166 #define KINETIS_K_SDID_K10_M120 0x00000180
167 #define KINETIS_K_SDID_K11 0x00000220
168 #define KINETIS_K_SDID_K12 0x00000200
169 #define KINETIS_K_SDID_K20_M50 0x00000010
170 #define KINETIS_K_SDID_K20_M72 0x00000090
171 #define KINETIS_K_SDID_K20_M100 0x00000110
172 #define KINETIS_K_SDID_K20_M120 0x00000190
173 #define KINETIS_K_SDID_K21_M50 0x00000230
174 #define KINETIS_K_SDID_K21_M120 0x00000330
175 #define KINETIS_K_SDID_K22_M50 0x00000210
176 #define KINETIS_K_SDID_K22_M120 0x00000310
177 #define KINETIS_K_SDID_K30_M72 0x000000A0
178 #define KINETIS_K_SDID_K30_M100 0x00000120
179 #define KINETIS_K_SDID_K40_M72 0x000000B0
180 #define KINETIS_K_SDID_K40_M100 0x00000130
181 #define KINETIS_K_SDID_K50_M72 0x000000E0
182 #define KINETIS_K_SDID_K51_M72 0x000000F0
183 #define KINETIS_K_SDID_K53 0x00000170
184 #define KINETIS_K_SDID_K60_M100 0x00000140
185 #define KINETIS_K_SDID_K60_M150 0x000001C0
186 #define KINETIS_K_SDID_K70_M150 0x000001D0
188 #define KINETIS_SDID_SERIESID_MASK 0x00F00000
189 #define KINETIS_SDID_SERIESID_K 0x00000000
190 #define KINETIS_SDID_SERIESID_KL 0x00100000
191 #define KINETIS_SDID_SERIESID_KE 0x00200000
192 #define KINETIS_SDID_SERIESID_KW 0x00500000
193 #define KINETIS_SDID_SERIESID_KV 0x00600000
195 #define KINETIS_SDID_SUBFAMID_MASK 0x0F000000
196 #define KINETIS_SDID_SUBFAMID_KX0 0x00000000
197 #define KINETIS_SDID_SUBFAMID_KX1 0x01000000
198 #define KINETIS_SDID_SUBFAMID_KX2 0x02000000
199 #define KINETIS_SDID_SUBFAMID_KX3 0x03000000
200 #define KINETIS_SDID_SUBFAMID_KX4 0x04000000
201 #define KINETIS_SDID_SUBFAMID_KX5 0x05000000
202 #define KINETIS_SDID_SUBFAMID_KX6 0x06000000
203 #define KINETIS_SDID_SUBFAMID_KX7 0x07000000
204 #define KINETIS_SDID_SUBFAMID_KX8 0x08000000
206 #define KINETIS_SDID_FAMILYID_MASK 0xF0000000
207 #define KINETIS_SDID_FAMILYID_K0X 0x00000000
208 #define KINETIS_SDID_FAMILYID_K1X 0x10000000
209 #define KINETIS_SDID_FAMILYID_K2X 0x20000000
210 #define KINETIS_SDID_FAMILYID_K3X 0x30000000
211 #define KINETIS_SDID_FAMILYID_K4X 0x40000000
212 #define KINETIS_SDID_FAMILYID_K6X 0x60000000
213 #define KINETIS_SDID_FAMILYID_K7X 0x70000000
214 #define KINETIS_SDID_FAMILYID_K8X 0x80000000
215 #define KINETIS_SDID_FAMILYID_KL8X 0x90000000
217 /* The field originally named DIEID has new name/meaning on KE1x */
218 #define KINETIS_SDID_PROJECTID_MASK KINETIS_SDID_DIEID_MASK
219 #define KINETIS_SDID_PROJECTID_KE1xF 0x00000080
220 #define KINETIS_SDID_PROJECTID_KE1xZ 0x00000100
222 struct kinetis_flash_bank
{
224 uint32_t sector_size
;
225 uint32_t max_flash_prog_size
;
226 uint32_t protection_size
;
227 uint32_t prog_base
; /* base address for FTFx operations */
228 /* same as bank->base for pflash, differs for FlexNVM */
229 uint32_t protection_block
; /* number of first protection block in this bank */
243 FS_PROGRAM_SECTOR
= 1,
244 FS_PROGRAM_LONGWORD
= 2,
245 FS_PROGRAM_PHRASE
= 4, /* Unsupported */
246 FS_INVALIDATE_CACHE_K
= 8, /* using FMC->PFB0CR/PFB01CR */
247 FS_INVALIDATE_CACHE_L
= 0x10, /* using MCM->PLACR */
248 FS_INVALIDATE_CACHE_MSCM
= 0x20,
249 FS_NO_CMD_BLOCKSTAT
= 0x40,
255 #define MDM_REG_STAT 0x00
256 #define MDM_REG_CTRL 0x04
257 #define MDM_REG_ID 0xfc
259 #define MDM_STAT_FMEACK (1<<0)
260 #define MDM_STAT_FREADY (1<<1)
261 #define MDM_STAT_SYSSEC (1<<2)
262 #define MDM_STAT_SYSRES (1<<3)
263 #define MDM_STAT_FMEEN (1<<5)
264 #define MDM_STAT_BACKDOOREN (1<<6)
265 #define MDM_STAT_LPEN (1<<7)
266 #define MDM_STAT_VLPEN (1<<8)
267 #define MDM_STAT_LLSMODEXIT (1<<9)
268 #define MDM_STAT_VLLSXMODEXIT (1<<10)
269 #define MDM_STAT_CORE_HALTED (1<<16)
270 #define MDM_STAT_CORE_SLEEPDEEP (1<<17)
271 #define MDM_STAT_CORESLEEPING (1<<18)
273 #define MDM_CTRL_FMEIP (1<<0)
274 #define MDM_CTRL_DBG_DIS (1<<1)
275 #define MDM_CTRL_DBG_REQ (1<<2)
276 #define MDM_CTRL_SYS_RES_REQ (1<<3)
277 #define MDM_CTRL_CORE_HOLD_RES (1<<4)
278 #define MDM_CTRL_VLLSX_DBG_REQ (1<<5)
279 #define MDM_CTRL_VLLSX_DBG_ACK (1<<6)
280 #define MDM_CTRL_VLLSX_STAT_ACK (1<<7)
282 #define MDM_ACCESS_TIMEOUT 500 /* msec */
285 static bool allow_fcf_writes
;
286 static uint8_t fcf_fopt
= 0xff;
289 struct flash_driver kinetis_flash
;
290 static int kinetis_write_inner(struct flash_bank
*bank
, const uint8_t *buffer
,
291 uint32_t offset
, uint32_t count
);
292 static int kinetis_auto_probe(struct flash_bank
*bank
);
295 static int kinetis_mdm_write_register(struct adiv5_dap
*dap
, unsigned reg
, uint32_t value
)
298 LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32
, reg
, value
);
300 retval
= dap_queue_ap_write(dap_ap(dap
, MDM_AP
), reg
, value
);
301 if (retval
!= ERROR_OK
) {
302 LOG_DEBUG("MDM: failed to queue a write request");
306 retval
= dap_run(dap
);
307 if (retval
!= ERROR_OK
) {
308 LOG_DEBUG("MDM: dap_run failed");
316 static int kinetis_mdm_read_register(struct adiv5_dap
*dap
, unsigned reg
, uint32_t *result
)
320 retval
= dap_queue_ap_read(dap_ap(dap
, MDM_AP
), reg
, result
);
321 if (retval
!= ERROR_OK
) {
322 LOG_DEBUG("MDM: failed to queue a read request");
326 retval
= dap_run(dap
);
327 if (retval
!= ERROR_OK
) {
328 LOG_DEBUG("MDM: dap_run failed");
332 LOG_DEBUG("MDM_REG[0x%02x]: %08" PRIX32
, reg
, *result
);
336 static int kinetis_mdm_poll_register(struct adiv5_dap
*dap
, unsigned reg
,
337 uint32_t mask
, uint32_t value
, uint32_t timeout_ms
)
341 int64_t ms_timeout
= timeval_ms() + timeout_ms
;
344 retval
= kinetis_mdm_read_register(dap
, reg
, &val
);
345 if (retval
!= ERROR_OK
|| (val
& mask
) == value
)
349 } while (timeval_ms() < ms_timeout
);
351 LOG_DEBUG("MDM: polling timed out");
356 * This command can be used to break a watchdog reset loop when
357 * connecting to an unsecured target. Unlike other commands, halt will
358 * automatically retry as it does not know how far into the boot process
359 * it is when the command is called.
361 COMMAND_HANDLER(kinetis_mdm_halt
)
363 struct target
*target
= get_current_target(CMD_CTX
);
364 struct cortex_m_common
*cortex_m
= target_to_cm(target
);
365 struct adiv5_dap
*dap
= cortex_m
->armv7m
.arm
.dap
;
369 int64_t ms_timeout
= timeval_ms() + MDM_ACCESS_TIMEOUT
;
372 LOG_ERROR("Cannot perform halt with a high-level adapter");
379 kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, MDM_CTRL_CORE_HOLD_RES
);
383 retval
= kinetis_mdm_read_register(dap
, MDM_REG_STAT
, &stat
);
384 if (retval
!= ERROR_OK
) {
385 LOG_DEBUG("MDM: failed to read MDM_REG_STAT");
389 /* Repeat setting MDM_CTRL_CORE_HOLD_RES until system is out of
390 * reset with flash ready and without security
392 if ((stat
& (MDM_STAT_FREADY
| MDM_STAT_SYSSEC
| MDM_STAT_SYSRES
))
393 == (MDM_STAT_FREADY
| MDM_STAT_SYSRES
))
396 if (timeval_ms() >= ms_timeout
) {
397 LOG_ERROR("MDM: halt timed out");
402 LOG_DEBUG("MDM: halt succeded after %d attempts.", tries
);
405 /* enable polling in case kinetis_check_flash_security_status disabled it */
406 jtag_poll_set_enabled(true);
410 target
->reset_halt
= true;
411 target
->type
->assert_reset(target
);
413 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, 0);
414 if (retval
!= ERROR_OK
) {
415 LOG_ERROR("MDM: failed to clear MDM_REG_CTRL");
419 target
->type
->deassert_reset(target
);
424 COMMAND_HANDLER(kinetis_mdm_reset
)
426 struct target
*target
= get_current_target(CMD_CTX
);
427 struct cortex_m_common
*cortex_m
= target_to_cm(target
);
428 struct adiv5_dap
*dap
= cortex_m
->armv7m
.arm
.dap
;
432 LOG_ERROR("Cannot perform reset with a high-level adapter");
436 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, MDM_CTRL_SYS_RES_REQ
);
437 if (retval
!= ERROR_OK
) {
438 LOG_ERROR("MDM: failed to write MDM_REG_CTRL");
442 retval
= kinetis_mdm_poll_register(dap
, MDM_REG_STAT
, MDM_STAT_SYSRES
, 0, 500);
443 if (retval
!= ERROR_OK
) {
444 LOG_ERROR("MDM: failed to assert reset");
448 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, 0);
449 if (retval
!= ERROR_OK
) {
450 LOG_ERROR("MDM: failed to clear MDM_REG_CTRL");
458 * This function implements the procedure to mass erase the flash via
459 * SWD/JTAG on Kinetis K and L series of devices as it is described in
460 * AN4835 "Production Flash Programming Best Practices for Kinetis K-
461 * and L-series MCUs" Section 4.2.1. To prevent a watchdog reset loop,
462 * the core remains halted after this function completes as suggested
463 * by the application note.
465 COMMAND_HANDLER(kinetis_mdm_mass_erase
)
467 struct target
*target
= get_current_target(CMD_CTX
);
468 struct cortex_m_common
*cortex_m
= target_to_cm(target
);
469 struct adiv5_dap
*dap
= cortex_m
->armv7m
.arm
.dap
;
472 LOG_ERROR("Cannot perform mass erase with a high-level adapter");
479 * ... Power on the processor, or if power has already been
480 * applied, assert the RESET pin to reset the processor. For
481 * devices that do not have a RESET pin, write the System
482 * Reset Request bit in the MDM-AP control register after
483 * establishing communication...
486 /* assert SRST if configured */
487 bool has_srst
= jtag_get_reset_config() & RESET_HAS_SRST
;
489 adapter_assert_reset();
491 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, MDM_CTRL_SYS_RES_REQ
);
492 if (retval
!= ERROR_OK
&& !has_srst
) {
493 LOG_ERROR("MDM: failed to assert reset");
494 goto deassert_reset_and_exit
;
498 * ... Read the MDM-AP status register repeatedly and wait for
499 * stable conditions suitable for mass erase:
500 * - mass erase is enabled
502 * - reset is finished
504 * Mass erase is started as soon as all conditions are met in 32
505 * subsequent status reads.
507 * In case of not stable conditions (RESET/WDOG loop in secured device)
508 * the user is asked for manual pressing of RESET button
511 int cnt_mass_erase_disabled
= 0;
513 int64_t ms_start
= timeval_ms();
514 bool man_reset_requested
= false;
518 int64_t ms_elapsed
= timeval_ms() - ms_start
;
520 if (!man_reset_requested
&& ms_elapsed
> 100) {
521 LOG_INFO("MDM: Press RESET button now if possible.");
522 man_reset_requested
= true;
525 if (ms_elapsed
> 3000) {
526 LOG_ERROR("MDM: waiting for mass erase conditions timed out.");
527 LOG_INFO("Mass erase of a secured MCU is not possible without hardware reset.");
528 LOG_INFO("Connect SRST, use 'reset_config srst_only' and retry.");
529 goto deassert_reset_and_exit
;
531 retval
= kinetis_mdm_read_register(dap
, MDM_REG_STAT
, &stat
);
532 if (retval
!= ERROR_OK
) {
537 if (!(stat
& MDM_STAT_FMEEN
)) {
539 cnt_mass_erase_disabled
++;
540 if (cnt_mass_erase_disabled
> 10) {
541 LOG_ERROR("MDM: mass erase is disabled");
542 goto deassert_reset_and_exit
;
547 if ((stat
& (MDM_STAT_FREADY
| MDM_STAT_SYSRES
)) == MDM_STAT_FREADY
)
552 } while (cnt_ready
< 32);
555 * ... Write the MDM-AP control register to set the Flash Mass
556 * Erase in Progress bit. This will start the mass erase
559 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, MDM_CTRL_SYS_RES_REQ
| MDM_CTRL_FMEIP
);
560 if (retval
!= ERROR_OK
) {
561 LOG_ERROR("MDM: failed to start mass erase");
562 goto deassert_reset_and_exit
;
566 * ... Read the MDM-AP control register until the Flash Mass
567 * Erase in Progress bit clears...
568 * Data sheed defines erase time <3.6 sec/512kB flash block.
569 * The biggest device has 4 pflash blocks => timeout 16 sec.
571 retval
= kinetis_mdm_poll_register(dap
, MDM_REG_CTRL
, MDM_CTRL_FMEIP
, 0, 16000);
572 if (retval
!= ERROR_OK
) {
573 LOG_ERROR("MDM: mass erase timeout");
574 goto deassert_reset_and_exit
;
578 /* enable polling in case kinetis_check_flash_security_status disabled it */
579 jtag_poll_set_enabled(true);
583 target
->reset_halt
= true;
584 target
->type
->assert_reset(target
);
587 * ... Negate the RESET signal or clear the System Reset Request
588 * bit in the MDM-AP control register.
590 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, 0);
591 if (retval
!= ERROR_OK
)
592 LOG_ERROR("MDM: failed to clear MDM_REG_CTRL");
594 target
->type
->deassert_reset(target
);
598 deassert_reset_and_exit
:
599 kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, 0);
601 adapter_deassert_reset();
605 static const uint32_t kinetis_known_mdm_ids
[] = {
606 0x001C0000, /* Kinetis-K Series */
607 0x001C0020, /* Kinetis-L/M/V/E Series */
611 * This function implements the procedure to connect to
612 * SWD/JTAG on Kinetis K and L series of devices as it is described in
613 * AN4835 "Production Flash Programming Best Practices for Kinetis K-
614 * and L-series MCUs" Section 4.1.1
616 COMMAND_HANDLER(kinetis_check_flash_security_status
)
618 struct target
*target
= get_current_target(CMD_CTX
);
619 struct cortex_m_common
*cortex_m
= target_to_cm(target
);
620 struct adiv5_dap
*dap
= cortex_m
->armv7m
.arm
.dap
;
623 LOG_WARNING("Cannot check flash security status with a high-level adapter");
628 return ERROR_OK
; /* too early to check, in JTAG mode ops may not be initialised */
634 * ... The MDM-AP ID register can be read to verify that the
635 * connection is working correctly...
637 retval
= kinetis_mdm_read_register(dap
, MDM_REG_ID
, &val
);
638 if (retval
!= ERROR_OK
) {
639 LOG_ERROR("MDM: failed to read ID register");
644 return ERROR_OK
; /* dap not yet initialised */
647 for (size_t i
= 0; i
< ARRAY_SIZE(kinetis_known_mdm_ids
); i
++) {
648 if (val
== kinetis_known_mdm_ids
[i
]) {
655 LOG_WARNING("MDM: unknown ID %08" PRIX32
, val
);
658 * ... Read the System Security bit to determine if security is enabled.
659 * If System Security = 0, then proceed. If System Security = 1, then
660 * communication with the internals of the processor, including the
661 * flash, will not be possible without issuing a mass erase command or
662 * unsecuring the part through other means (backdoor key unlock)...
664 retval
= kinetis_mdm_read_register(dap
, MDM_REG_STAT
, &val
);
665 if (retval
!= ERROR_OK
) {
666 LOG_ERROR("MDM: failed to read MDM_REG_STAT");
671 * System Security bit is also active for short time during reset.
672 * If a MCU has blank flash and runs in RESET/WDOG loop,
673 * System Security bit is active most of time!
674 * We should observe Flash Ready bit and read status several times
675 * to avoid false detection of secured MCU
677 int secured_score
= 0, flash_not_ready_score
= 0;
679 if ((val
& (MDM_STAT_SYSSEC
| MDM_STAT_FREADY
)) != MDM_STAT_FREADY
) {
683 for (i
= 0; i
< 32; i
++) {
684 stats
[i
] = MDM_STAT_FREADY
;
685 dap_queue_ap_read(dap_ap(dap
, MDM_AP
), MDM_REG_STAT
, &stats
[i
]);
687 retval
= dap_run(dap
);
688 if (retval
!= ERROR_OK
) {
689 LOG_DEBUG("MDM: dap_run failed when validating secured state");
692 for (i
= 0; i
< 32; i
++) {
693 if (stats
[i
] & MDM_STAT_SYSSEC
)
695 if (!(stats
[i
] & MDM_STAT_FREADY
))
696 flash_not_ready_score
++;
700 if (flash_not_ready_score
<= 8 && secured_score
> 24) {
701 jtag_poll_set_enabled(false);
703 LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
704 LOG_WARNING("**** ****");
705 LOG_WARNING("**** Your Kinetis MCU is in secured state, which means that, ****");
706 LOG_WARNING("**** with exception for very basic communication, JTAG/SWD ****");
707 LOG_WARNING("**** interface will NOT work. In order to restore its ****");
708 LOG_WARNING("**** functionality please issue 'kinetis mdm mass_erase' ****");
709 LOG_WARNING("**** command, power cycle the MCU and restart OpenOCD. ****");
710 LOG_WARNING("**** ****");
711 LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
713 } else if (flash_not_ready_score
> 24) {
714 jtag_poll_set_enabled(false);
715 LOG_WARNING("**** Your Kinetis MCU is probably locked-up in RESET/WDOG loop. ****");
716 LOG_WARNING("**** Common reason is a blank flash (at least a reset vector). ****");
717 LOG_WARNING("**** Issue 'kinetis mdm halt' command or if SRST is connected ****");
718 LOG_WARNING("**** and configured, use 'reset halt' ****");
719 LOG_WARNING("**** If MCU cannot be halted, it is likely secured and running ****");
720 LOG_WARNING("**** in RESET/WDOG loop. Issue 'kinetis mdm mass_erase' ****");
723 LOG_INFO("MDM: Chip is unsecured. Continuing.");
724 jtag_poll_set_enabled(true);
730 FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command
)
732 struct kinetis_flash_bank
*bank_info
;
735 return ERROR_COMMAND_SYNTAX_ERROR
;
737 LOG_INFO("add flash_bank kinetis %s", bank
->name
);
739 bank_info
= malloc(sizeof(struct kinetis_flash_bank
));
741 memset(bank_info
, 0, sizeof(struct kinetis_flash_bank
));
743 bank
->driver_priv
= bank_info
;
748 /* Disable the watchdog on Kinetis devices */
749 int kinetis_disable_wdog(struct target
*target
, uint32_t sim_sdid
)
751 struct working_area
*wdog_algorithm
;
752 struct armv7m_algorithm armv7m_info
;
756 static const uint8_t kinetis_unlock_wdog_code
[] = {
757 #include "../../../contrib/loaders/watchdog/armv7m_kinetis_wdog.inc"
760 /* Decide whether the connected device needs watchdog disabling.
761 * Disable for all Kx and KVx devices, return if it is a KLx */
763 if ((sim_sdid
& KINETIS_SDID_SERIESID_MASK
) == KINETIS_SDID_SERIESID_KL
)
766 /* The connected device requires watchdog disabling. */
767 retval
= target_read_u16(target
, WDOG_STCTRH
, &wdog
);
768 if (retval
!= ERROR_OK
)
771 if ((wdog
& 0x1) == 0) {
772 /* watchdog already disabled */
775 LOG_INFO("Disabling Kinetis watchdog (initial WDOG_STCTRLH = 0x%x)", wdog
);
777 if (target
->state
!= TARGET_HALTED
) {
778 LOG_ERROR("Target not halted");
779 return ERROR_TARGET_NOT_HALTED
;
782 retval
= target_alloc_working_area(target
, sizeof(kinetis_unlock_wdog_code
), &wdog_algorithm
);
783 if (retval
!= ERROR_OK
)
786 retval
= target_write_buffer(target
, wdog_algorithm
->address
,
787 sizeof(kinetis_unlock_wdog_code
), (uint8_t *)kinetis_unlock_wdog_code
);
788 if (retval
!= ERROR_OK
) {
789 target_free_working_area(target
, wdog_algorithm
);
793 armv7m_info
.common_magic
= ARMV7M_COMMON_MAGIC
;
794 armv7m_info
.core_mode
= ARM_MODE_THREAD
;
796 retval
= target_run_algorithm(target
, 0, NULL
, 0, NULL
, wdog_algorithm
->address
,
797 wdog_algorithm
->address
+ (sizeof(kinetis_unlock_wdog_code
) - 2),
798 10000, &armv7m_info
);
800 if (retval
!= ERROR_OK
)
801 LOG_ERROR("error executing kinetis wdog unlock algorithm");
803 retval
= target_read_u16(target
, WDOG_STCTRH
, &wdog
);
804 if (retval
!= ERROR_OK
)
806 LOG_INFO("WDOG_STCTRLH = 0x%x", wdog
);
808 target_free_working_area(target
, wdog_algorithm
);
813 COMMAND_HANDLER(kinetis_disable_wdog_handler
)
817 struct target
*target
= get_current_target(CMD_CTX
);
820 return ERROR_COMMAND_SYNTAX_ERROR
;
822 result
= target_read_u32(target
, SIM_SDID
, &sim_sdid
);
823 if (result
!= ERROR_OK
) {
824 LOG_ERROR("Failed to read SIMSDID");
828 result
= kinetis_disable_wdog(target
, sim_sdid
);
833 static int kinetis_ftfx_decode_error(uint8_t fstat
)
836 LOG_ERROR("Flash operation failed, illegal command");
837 return ERROR_FLASH_OPER_UNSUPPORTED
;
839 } else if (fstat
& 0x10)
840 LOG_ERROR("Flash operation failed, protection violated");
842 else if (fstat
& 0x40)
843 LOG_ERROR("Flash operation failed, read collision");
845 else if (fstat
& 0x80)
849 LOG_ERROR("Flash operation timed out");
851 return ERROR_FLASH_OPERATION_FAILED
;
854 static int kinetis_ftfx_clear_error(struct target
*target
)
856 /* reset error flags */
857 return target_write_u8(target
, FTFx_FSTAT
, 0x70);
861 static int kinetis_ftfx_prepare(struct target
*target
)
866 /* wait until busy */
867 for (i
= 0; i
< 50; i
++) {
868 result
= target_read_u8(target
, FTFx_FSTAT
, &fstat
);
869 if (result
!= ERROR_OK
)
876 if ((fstat
& 0x80) == 0) {
877 LOG_ERROR("Flash controller is busy");
878 return ERROR_FLASH_OPERATION_FAILED
;
881 /* reset error flags */
882 result
= kinetis_ftfx_clear_error(target
);
887 /* Kinetis Program-LongWord Microcodes */
888 static const uint8_t kinetis_flash_write_code
[] = {
889 #include "../../../contrib/loaders/flash/kinetis/kinetis_flash.inc"
892 /* Program LongWord Block Write */
893 static int kinetis_write_block(struct flash_bank
*bank
, const uint8_t *buffer
,
894 uint32_t offset
, uint32_t wcount
)
896 struct target
*target
= bank
->target
;
897 uint32_t buffer_size
= 2048; /* Default minimum value */
898 struct working_area
*write_algorithm
;
899 struct working_area
*source
;
900 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
901 uint32_t address
= kinfo
->prog_base
+ offset
;
902 uint32_t end_address
;
903 struct reg_param reg_params
[5];
904 struct armv7m_algorithm armv7m_info
;
908 /* Increase buffer_size if needed */
909 if (buffer_size
< (target
->working_area_size
/2))
910 buffer_size
= (target
->working_area_size
/2);
912 /* allocate working area with flash programming code */
913 if (target_alloc_working_area(target
, sizeof(kinetis_flash_write_code
),
914 &write_algorithm
) != ERROR_OK
) {
915 LOG_WARNING("no working area available, can't do block memory writes");
916 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
919 retval
= target_write_buffer(target
, write_algorithm
->address
,
920 sizeof(kinetis_flash_write_code
), kinetis_flash_write_code
);
921 if (retval
!= ERROR_OK
)
925 while (target_alloc_working_area(target
, buffer_size
, &source
) != ERROR_OK
) {
927 if (buffer_size
<= 256) {
928 /* free working area, write algorithm already allocated */
929 target_free_working_area(target
, write_algorithm
);
931 LOG_WARNING("No large enough working area available, can't do block memory writes");
932 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
936 armv7m_info
.common_magic
= ARMV7M_COMMON_MAGIC
;
937 armv7m_info
.core_mode
= ARM_MODE_THREAD
;
939 init_reg_param(®_params
[0], "r0", 32, PARAM_IN_OUT
); /* address */
940 init_reg_param(®_params
[1], "r1", 32, PARAM_OUT
); /* word count */
941 init_reg_param(®_params
[2], "r2", 32, PARAM_OUT
);
942 init_reg_param(®_params
[3], "r3", 32, PARAM_OUT
);
943 init_reg_param(®_params
[4], "r4", 32, PARAM_OUT
);
945 buf_set_u32(reg_params
[0].value
, 0, 32, address
);
946 buf_set_u32(reg_params
[1].value
, 0, 32, wcount
);
947 buf_set_u32(reg_params
[2].value
, 0, 32, source
->address
);
948 buf_set_u32(reg_params
[3].value
, 0, 32, source
->address
+ source
->size
);
949 buf_set_u32(reg_params
[4].value
, 0, 32, FTFx_FSTAT
);
951 retval
= target_run_flash_async_algorithm(target
, buffer
, wcount
, 4,
954 source
->address
, source
->size
,
955 write_algorithm
->address
, 0,
958 if (retval
== ERROR_FLASH_OPERATION_FAILED
) {
959 end_address
= buf_get_u32(reg_params
[0].value
, 0, 32);
961 LOG_ERROR("Error writing flash at %08" PRIx32
, end_address
);
963 retval
= target_read_u8(target
, FTFx_FSTAT
, &fstat
);
964 if (retval
== ERROR_OK
) {
965 retval
= kinetis_ftfx_decode_error(fstat
);
967 /* reset error flags */
968 target_write_u8(target
, FTFx_FSTAT
, 0x70);
970 } else if (retval
!= ERROR_OK
)
971 LOG_ERROR("Error executing kinetis Flash programming algorithm");
973 target_free_working_area(target
, source
);
974 target_free_working_area(target
, write_algorithm
);
976 destroy_reg_param(®_params
[0]);
977 destroy_reg_param(®_params
[1]);
978 destroy_reg_param(®_params
[2]);
979 destroy_reg_param(®_params
[3]);
980 destroy_reg_param(®_params
[4]);
985 static int kinetis_protect(struct flash_bank
*bank
, int set
, int first
, int last
)
989 if (allow_fcf_writes
) {
990 LOG_ERROR("Protection setting is possible with 'kinetis fcf_source protection' only!");
994 if (!bank
->prot_blocks
|| bank
->num_prot_blocks
== 0) {
995 LOG_ERROR("No protection possible for current bank!");
996 return ERROR_FLASH_BANK_INVALID
;
999 for (i
= first
; i
< bank
->num_prot_blocks
&& i
<= last
; i
++)
1000 bank
->prot_blocks
[i
].is_protected
= set
;
1002 LOG_INFO("Protection bits will be written at the next FCF sector erase or write.");
1003 LOG_INFO("Do not issue 'flash info' command until protection is written,");
1004 LOG_INFO("doing so would re-read protection status from MCU.");
1009 static int kinetis_protect_check(struct flash_bank
*bank
)
1011 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1016 if (kinfo
->flash_class
== FC_PFLASH
) {
1018 /* read protection register */
1019 result
= target_read_u32(bank
->target
, FTFx_FPROT3
, &fprot
);
1020 if (result
!= ERROR_OK
)
1023 /* Every bit protects 1/32 of the full flash (not necessarily just this bank) */
1025 } else if (kinfo
->flash_class
== FC_FLEX_NVM
) {
1028 /* read protection register */
1029 result
= target_read_u8(bank
->target
, FTFx_FDPROT
, &fdprot
);
1030 if (result
!= ERROR_OK
)
1036 LOG_ERROR("Protection checks for FlexRAM not supported");
1037 return ERROR_FLASH_BANK_INVALID
;
1040 b
= kinfo
->protection_block
;
1041 for (i
= 0; i
< bank
->num_prot_blocks
; i
++) {
1042 if ((fprot
>> b
) & 1)
1043 bank
->prot_blocks
[i
].is_protected
= 0;
1045 bank
->prot_blocks
[i
].is_protected
= 1;
1054 static int kinetis_fill_fcf(struct flash_bank
*bank
, uint8_t *fcf
)
1056 uint32_t fprot
= 0xffffffff;
1057 uint8_t fsec
= 0xfe; /* set MCU unsecure */
1058 uint8_t fdprot
= 0xff;
1060 uint32_t pflash_bit
;
1062 struct flash_bank
*bank_iter
;
1063 struct kinetis_flash_bank
*kinfo
;
1065 memset(fcf
, 0xff, FCF_SIZE
);
1070 /* iterate over all kinetis banks */
1071 /* current bank is bank 0, it contains FCF */
1072 for (bank_iter
= bank
; bank_iter
; bank_iter
= bank_iter
->next
) {
1073 if (bank_iter
->driver
!= &kinetis_flash
1074 || bank_iter
->target
!= bank
->target
)
1077 kinetis_auto_probe(bank_iter
);
1079 kinfo
= bank
->driver_priv
;
1083 if (kinfo
->flash_class
== FC_PFLASH
) {
1084 for (i
= 0; i
< bank_iter
->num_prot_blocks
; i
++) {
1085 if (bank_iter
->prot_blocks
[i
].is_protected
== 1)
1086 fprot
&= ~pflash_bit
;
1091 } else if (kinfo
->flash_class
== FC_FLEX_NVM
) {
1092 for (i
= 0; i
< bank_iter
->num_prot_blocks
; i
++) {
1093 if (bank_iter
->prot_blocks
[i
].is_protected
== 1)
1094 fdprot
&= ~dflash_bit
;
1102 target_buffer_set_u32(bank
->target
, fcf
+ FCF_FPROT
, fprot
);
1103 fcf
[FCF_FSEC
] = fsec
;
1104 fcf
[FCF_FOPT
] = fcf_fopt
;
1105 fcf
[FCF_FDPROT
] = fdprot
;
1109 static int kinetis_ftfx_command(struct target
*target
, uint8_t fcmd
, uint32_t faddr
,
1110 uint8_t fccob4
, uint8_t fccob5
, uint8_t fccob6
, uint8_t fccob7
,
1111 uint8_t fccob8
, uint8_t fccob9
, uint8_t fccoba
, uint8_t fccobb
,
1112 uint8_t *ftfx_fstat
)
1114 uint8_t command
[12] = {faddr
& 0xff, (faddr
>> 8) & 0xff, (faddr
>> 16) & 0xff, fcmd
,
1115 fccob7
, fccob6
, fccob5
, fccob4
,
1116 fccobb
, fccoba
, fccob9
, fccob8
};
1119 int64_t ms_timeout
= timeval_ms() + 250;
1121 result
= target_write_memory(target
, FTFx_FCCOB3
, 4, 3, command
);
1122 if (result
!= ERROR_OK
)
1126 result
= target_write_u8(target
, FTFx_FSTAT
, 0x80);
1127 if (result
!= ERROR_OK
)
1132 result
= target_read_u8(target
, FTFx_FSTAT
, &fstat
);
1134 if (result
!= ERROR_OK
)
1140 } while (timeval_ms() < ms_timeout
);
1143 *ftfx_fstat
= fstat
;
1145 if ((fstat
& 0xf0) != 0x80) {
1146 LOG_DEBUG("ftfx command failed FSTAT: %02X FCCOB: %02X%02X%02X%02X %02X%02X%02X%02X %02X%02X%02X%02X",
1147 fstat
, command
[3], command
[2], command
[1], command
[0],
1148 command
[7], command
[6], command
[5], command
[4],
1149 command
[11], command
[10], command
[9], command
[8]);
1151 return kinetis_ftfx_decode_error(fstat
);
1158 static int kinetis_check_run_mode(struct target
*target
)
1161 uint8_t pmctrl
, pmstat
;
1163 if (target
->state
!= TARGET_HALTED
) {
1164 LOG_ERROR("Target not halted");
1165 return ERROR_TARGET_NOT_HALTED
;
1168 result
= target_read_u8(target
, SMC_PMSTAT
, &pmstat
);
1169 if (result
!= ERROR_OK
)
1172 if (pmstat
== PM_STAT_RUN
)
1175 if (pmstat
== PM_STAT_VLPR
) {
1176 /* It is safe to switch from VLPR to RUN mode without changing clock */
1177 LOG_INFO("Switching from VLPR to RUN mode.");
1178 pmctrl
= PM_CTRL_RUNM_RUN
;
1179 result
= target_write_u8(target
, SMC_PMCTRL
, pmctrl
);
1180 if (result
!= ERROR_OK
)
1183 for (i
= 100; i
; i
--) {
1184 result
= target_read_u8(target
, SMC_PMSTAT
, &pmstat
);
1185 if (result
!= ERROR_OK
)
1188 if (pmstat
== PM_STAT_RUN
)
1193 LOG_ERROR("Flash operation not possible in current run mode: SMC_PMSTAT: 0x%x", pmstat
);
1194 LOG_ERROR("Issue a 'reset init' command.");
1195 return ERROR_TARGET_NOT_HALTED
;
1199 static void kinetis_invalidate_flash_cache(struct flash_bank
*bank
)
1201 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1203 if (kinfo
->flash_support
& FS_INVALIDATE_CACHE_K
)
1204 target_write_u8(bank
->target
, FMC_PFB01CR
+ 2, 0xf0);
1205 /* Set CINV_WAY bits - request invalidate of all cache ways */
1206 /* FMC_PFB0CR has same address and CINV_WAY bits as FMC_PFB01CR */
1208 else if (kinfo
->flash_support
& FS_INVALIDATE_CACHE_L
)
1209 target_write_u8(bank
->target
, MCM_PLACR
+ 1, 0x04);
1210 /* set bit CFCC - Clear Flash Controller Cache */
1212 else if (kinfo
->flash_support
& FS_INVALIDATE_CACHE_MSCM
)
1213 target_write_u32(bank
->target
, MSCM_OCMDR0
, 0x30);
1214 /* disable data prefetch and flash speculate */
1220 static int kinetis_erase(struct flash_bank
*bank
, int first
, int last
)
1223 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1225 result
= kinetis_check_run_mode(bank
->target
);
1226 if (result
!= ERROR_OK
)
1229 /* reset error flags */
1230 result
= kinetis_ftfx_prepare(bank
->target
);
1231 if (result
!= ERROR_OK
)
1234 if ((first
> bank
->num_sectors
) || (last
> bank
->num_sectors
))
1235 return ERROR_FLASH_OPERATION_FAILED
;
1238 * FIXME: TODO: use the 'Erase Flash Block' command if the
1239 * requested erase is PFlash or NVM and encompasses the entire
1240 * block. Should be quicker.
1242 for (i
= first
; i
<= last
; i
++) {
1243 /* set command and sector address */
1244 result
= kinetis_ftfx_command(bank
->target
, FTFx_CMD_SECTERASE
, kinfo
->prog_base
+ bank
->sectors
[i
].offset
,
1245 0, 0, 0, 0, 0, 0, 0, 0, NULL
);
1247 if (result
!= ERROR_OK
) {
1248 LOG_WARNING("erase sector %d failed", i
);
1249 return ERROR_FLASH_OPERATION_FAILED
;
1252 bank
->sectors
[i
].is_erased
= 1;
1255 && bank
->sectors
[i
].offset
<= FCF_ADDRESS
1256 && bank
->sectors
[i
].offset
+ bank
->sectors
[i
].size
> FCF_ADDRESS
+ FCF_SIZE
) {
1257 if (allow_fcf_writes
) {
1258 LOG_WARNING("Flash Configuration Field erased, DO NOT reset or power off the device");
1259 LOG_WARNING("until correct FCF is programmed or MCU gets security lock.");
1261 uint8_t fcf_buffer
[FCF_SIZE
];
1263 kinetis_fill_fcf(bank
, fcf_buffer
);
1264 result
= kinetis_write_inner(bank
, fcf_buffer
, FCF_ADDRESS
, FCF_SIZE
);
1265 if (result
!= ERROR_OK
)
1266 LOG_WARNING("Flash Configuration Field write failed");
1267 bank
->sectors
[i
].is_erased
= 0;
1272 kinetis_invalidate_flash_cache(bank
);
1277 static int kinetis_make_ram_ready(struct target
*target
)
1282 /* check if ram ready */
1283 result
= target_read_u8(target
, FTFx_FCNFG
, &ftfx_fcnfg
);
1284 if (result
!= ERROR_OK
)
1287 if (ftfx_fcnfg
& (1 << 1))
1288 return ERROR_OK
; /* ram ready */
1290 /* make flex ram available */
1291 result
= kinetis_ftfx_command(target
, FTFx_CMD_SETFLEXRAM
, 0x00ff0000,
1292 0, 0, 0, 0, 0, 0, 0, 0, NULL
);
1293 if (result
!= ERROR_OK
)
1294 return ERROR_FLASH_OPERATION_FAILED
;
1297 result
= target_read_u8(target
, FTFx_FCNFG
, &ftfx_fcnfg
);
1298 if (result
!= ERROR_OK
)
1301 if (ftfx_fcnfg
& (1 << 1))
1302 return ERROR_OK
; /* ram ready */
1304 return ERROR_FLASH_OPERATION_FAILED
;
1308 static int kinetis_write_sections(struct flash_bank
*bank
, const uint8_t *buffer
,
1309 uint32_t offset
, uint32_t count
)
1311 int result
= ERROR_OK
;
1312 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1313 uint8_t *buffer_aligned
= NULL
;
1315 * Kinetis uses different terms for the granularity of
1316 * sector writes, e.g. "phrase" or "128 bits". We use
1317 * the generic term "chunk". The largest possible
1318 * Kinetis "chunk" is 16 bytes (128 bits).
1320 uint32_t prog_section_chunk_bytes
= kinfo
->sector_size
>> 8;
1321 uint32_t prog_size_bytes
= kinfo
->max_flash_prog_size
;
1324 uint32_t size
= prog_size_bytes
- offset
% prog_size_bytes
;
1325 uint32_t align_begin
= offset
% prog_section_chunk_bytes
;
1327 uint32_t size_aligned
;
1328 uint16_t chunk_count
;
1334 align_end
= (align_begin
+ size
) % prog_section_chunk_bytes
;
1336 align_end
= prog_section_chunk_bytes
- align_end
;
1338 size_aligned
= align_begin
+ size
+ align_end
;
1339 chunk_count
= size_aligned
/ prog_section_chunk_bytes
;
1341 if (size
!= size_aligned
) {
1342 /* aligned section: the first, the last or the only */
1343 if (!buffer_aligned
)
1344 buffer_aligned
= malloc(prog_size_bytes
);
1346 memset(buffer_aligned
, 0xff, size_aligned
);
1347 memcpy(buffer_aligned
+ align_begin
, buffer
, size
);
1349 result
= target_write_memory(bank
->target
, FLEXRAM
,
1350 4, size_aligned
/ 4, buffer_aligned
);
1352 LOG_DEBUG("section @ %08" PRIx32
" aligned begin %" PRIu32
", end %" PRIu32
,
1353 bank
->base
+ offset
, align_begin
, align_end
);
1355 result
= target_write_memory(bank
->target
, FLEXRAM
,
1356 4, size_aligned
/ 4, buffer
);
1358 LOG_DEBUG("write section @ %08" PRIx32
" with length %" PRIu32
" bytes",
1359 bank
->base
+ offset
, size
);
1361 if (result
!= ERROR_OK
) {
1362 LOG_ERROR("target_write_memory failed");
1366 /* execute section-write command */
1367 result
= kinetis_ftfx_command(bank
->target
, FTFx_CMD_SECTWRITE
,
1368 kinfo
->prog_base
+ offset
- align_begin
,
1369 chunk_count
>>8, chunk_count
, 0, 0,
1370 0, 0, 0, 0, &ftfx_fstat
);
1372 if (result
!= ERROR_OK
) {
1373 LOG_ERROR("Error writing section at %08" PRIx32
, bank
->base
+ offset
);
1377 if (ftfx_fstat
& 0x01)
1378 LOG_ERROR("Flash write error at %08" PRIx32
, bank
->base
+ offset
);
1385 free(buffer_aligned
);
1390 static int kinetis_write_inner(struct flash_bank
*bank
, const uint8_t *buffer
,
1391 uint32_t offset
, uint32_t count
)
1393 int result
, fallback
= 0;
1394 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1396 if (!(kinfo
->flash_support
& FS_PROGRAM_SECTOR
)) {
1397 /* fallback to longword write */
1399 LOG_INFO("This device supports Program Longword execution only.");
1401 result
= kinetis_make_ram_ready(bank
->target
);
1402 if (result
!= ERROR_OK
) {
1404 LOG_WARNING("FlexRAM not ready, fallback to slow longword write.");
1408 LOG_DEBUG("flash write @08%" PRIx32
, bank
->base
+ offset
);
1410 if (fallback
== 0) {
1411 /* program section command */
1412 kinetis_write_sections(bank
, buffer
, offset
, count
);
1414 else if (kinfo
->flash_support
& FS_PROGRAM_LONGWORD
) {
1415 /* program longword command, not supported in FTFE */
1416 uint8_t *new_buffer
= NULL
;
1418 /* check word alignment */
1420 LOG_ERROR("offset 0x%" PRIx32
" breaks the required alignment", offset
);
1421 return ERROR_FLASH_DST_BREAKS_ALIGNMENT
;
1425 uint32_t old_count
= count
;
1426 count
= (old_count
| 3) + 1;
1427 new_buffer
= malloc(count
);
1428 if (new_buffer
== NULL
) {
1429 LOG_ERROR("odd number of bytes to write and no memory "
1430 "for padding buffer");
1433 LOG_INFO("odd number of bytes to write (%" PRIu32
"), extending to %" PRIu32
" "
1434 "and padding with 0xff", old_count
, count
);
1435 memset(new_buffer
+ old_count
, 0xff, count
- old_count
);
1436 buffer
= memcpy(new_buffer
, buffer
, old_count
);
1439 uint32_t words_remaining
= count
/ 4;
1441 kinetis_disable_wdog(bank
->target
, kinfo
->sim_sdid
);
1443 /* try using a block write */
1444 result
= kinetis_write_block(bank
, buffer
, offset
, words_remaining
);
1446 if (result
== ERROR_TARGET_RESOURCE_NOT_AVAILABLE
) {
1447 /* if block write failed (no sufficient working area),
1448 * we use normal (slow) single word accesses */
1449 LOG_WARNING("couldn't use block writes, falling back to single "
1452 while (words_remaining
) {
1455 LOG_DEBUG("write longword @ %08" PRIx32
, (uint32_t)(bank
->base
+ offset
));
1457 result
= kinetis_ftfx_command(bank
->target
, FTFx_CMD_LWORDPROG
, kinfo
->prog_base
+ offset
,
1458 buffer
[3], buffer
[2], buffer
[1], buffer
[0],
1459 0, 0, 0, 0, &ftfx_fstat
);
1461 if (result
!= ERROR_OK
) {
1462 LOG_ERROR("Error writing longword at %08" PRIx32
, bank
->base
+ offset
);
1466 if (ftfx_fstat
& 0x01)
1467 LOG_ERROR("Flash write error at %08" PRIx32
, bank
->base
+ offset
);
1476 LOG_ERROR("Flash write strategy not implemented");
1477 return ERROR_FLASH_OPERATION_FAILED
;
1480 kinetis_invalidate_flash_cache(bank
);
1485 static int kinetis_write(struct flash_bank
*bank
, const uint8_t *buffer
,
1486 uint32_t offset
, uint32_t count
)
1489 bool set_fcf
= false;
1492 result
= kinetis_check_run_mode(bank
->target
);
1493 if (result
!= ERROR_OK
)
1496 /* reset error flags */
1497 result
= kinetis_ftfx_prepare(bank
->target
);
1498 if (result
!= ERROR_OK
)
1501 if (bank
->base
== 0 && !allow_fcf_writes
) {
1502 if (bank
->sectors
[1].offset
<= FCF_ADDRESS
)
1503 sect
= 1; /* 1kb sector, FCF in 2nd sector */
1505 if (offset
< bank
->sectors
[sect
].offset
+ bank
->sectors
[sect
].size
1506 && offset
+ count
> bank
->sectors
[sect
].offset
)
1507 set_fcf
= true; /* write to any part of sector with FCF */
1511 uint8_t fcf_buffer
[FCF_SIZE
];
1512 uint8_t fcf_current
[FCF_SIZE
];
1514 kinetis_fill_fcf(bank
, fcf_buffer
);
1516 if (offset
< FCF_ADDRESS
) {
1517 /* write part preceding FCF */
1518 result
= kinetis_write_inner(bank
, buffer
, offset
, FCF_ADDRESS
- offset
);
1519 if (result
!= ERROR_OK
)
1523 result
= target_read_memory(bank
->target
, FCF_ADDRESS
, 4, FCF_SIZE
/ 4, fcf_current
);
1524 if (result
== ERROR_OK
&& memcmp(fcf_current
, fcf_buffer
, FCF_SIZE
) == 0)
1528 /* write FCF if differs from flash - eliminate multiple writes */
1529 result
= kinetis_write_inner(bank
, fcf_buffer
, FCF_ADDRESS
, FCF_SIZE
);
1530 if (result
!= ERROR_OK
)
1534 LOG_WARNING("Flash Configuration Field written.");
1535 LOG_WARNING("Reset or power off the device to make settings effective.");
1537 if (offset
+ count
> FCF_ADDRESS
+ FCF_SIZE
) {
1538 uint32_t delta
= FCF_ADDRESS
+ FCF_SIZE
- offset
;
1539 /* write part after FCF */
1540 result
= kinetis_write_inner(bank
, buffer
+ delta
, FCF_ADDRESS
+ FCF_SIZE
, count
- delta
);
1545 /* no FCF fiddling, normal write */
1546 return kinetis_write_inner(bank
, buffer
, offset
, count
);
1550 static int kinetis_probe(struct flash_bank
*bank
)
1553 uint8_t fcfg1_nvmsize
, fcfg1_pfsize
, fcfg1_eesize
, fcfg1_depart
;
1554 uint8_t fcfg2_maxaddr0
, fcfg2_pflsh
, fcfg2_maxaddr1
;
1555 uint32_t nvm_size
= 0, pf_size
= 0, df_size
= 0, ee_size
= 0;
1556 unsigned num_blocks
= 0, num_pflash_blocks
= 0, num_nvm_blocks
= 0, first_nvm_bank
= 0,
1557 pflash_sector_size_bytes
= 0, nvm_sector_size_bytes
= 0;
1558 struct target
*target
= bank
->target
;
1559 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1561 kinfo
->probed
= false;
1563 result
= target_read_u32(target
, SIM_SDID
, &kinfo
->sim_sdid
);
1564 if (result
!= ERROR_OK
)
1567 if ((kinfo
->sim_sdid
& (~KINETIS_SDID_K_SERIES_MASK
)) == 0) {
1568 /* older K-series MCU */
1569 uint32_t mcu_type
= kinfo
->sim_sdid
& KINETIS_K_SDID_TYPE_MASK
;
1572 case KINETIS_K_SDID_K10_M50
:
1573 case KINETIS_K_SDID_K20_M50
:
1575 pflash_sector_size_bytes
= 1<<10;
1576 nvm_sector_size_bytes
= 1<<10;
1578 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1580 case KINETIS_K_SDID_K10_M72
:
1581 case KINETIS_K_SDID_K20_M72
:
1582 case KINETIS_K_SDID_K30_M72
:
1583 case KINETIS_K_SDID_K30_M100
:
1584 case KINETIS_K_SDID_K40_M72
:
1585 case KINETIS_K_SDID_K40_M100
:
1586 case KINETIS_K_SDID_K50_M72
:
1587 /* 2kB sectors, 1kB FlexNVM sectors */
1588 pflash_sector_size_bytes
= 2<<10;
1589 nvm_sector_size_bytes
= 1<<10;
1591 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1592 kinfo
->max_flash_prog_size
= 1<<10;
1594 case KINETIS_K_SDID_K10_M100
:
1595 case KINETIS_K_SDID_K20_M100
:
1596 case KINETIS_K_SDID_K11
:
1597 case KINETIS_K_SDID_K12
:
1598 case KINETIS_K_SDID_K21_M50
:
1599 case KINETIS_K_SDID_K22_M50
:
1600 case KINETIS_K_SDID_K51_M72
:
1601 case KINETIS_K_SDID_K53
:
1602 case KINETIS_K_SDID_K60_M100
:
1604 pflash_sector_size_bytes
= 2<<10;
1605 nvm_sector_size_bytes
= 2<<10;
1607 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1609 case KINETIS_K_SDID_K21_M120
:
1610 case KINETIS_K_SDID_K22_M120
:
1611 /* 4kB sectors (MK21FN1M0, MK21FX512, MK22FN1M0, MK22FX512) */
1612 pflash_sector_size_bytes
= 4<<10;
1613 kinfo
->max_flash_prog_size
= 1<<10;
1614 nvm_sector_size_bytes
= 4<<10;
1616 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1618 case KINETIS_K_SDID_K10_M120
:
1619 case KINETIS_K_SDID_K20_M120
:
1620 case KINETIS_K_SDID_K60_M150
:
1621 case KINETIS_K_SDID_K70_M150
:
1623 pflash_sector_size_bytes
= 4<<10;
1624 nvm_sector_size_bytes
= 4<<10;
1626 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1629 LOG_ERROR("Unsupported K-family FAMID");
1632 /* Newer K-series or KL series MCU */
1633 switch (kinfo
->sim_sdid
& KINETIS_SDID_SERIESID_MASK
) {
1634 case KINETIS_SDID_SERIESID_K
:
1635 switch (kinfo
->sim_sdid
& (KINETIS_SDID_FAMILYID_MASK
| KINETIS_SDID_SUBFAMID_MASK
)) {
1636 case KINETIS_SDID_FAMILYID_K0X
| KINETIS_SDID_SUBFAMID_KX2
:
1637 /* K02FN64, K02FN128: FTFA, 2kB sectors */
1638 pflash_sector_size_bytes
= 2<<10;
1640 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_K
;
1643 case KINETIS_SDID_FAMILYID_K2X
| KINETIS_SDID_SUBFAMID_KX2
: {
1644 /* MK24FN1M reports as K22, this should detect it (according to errata note 1N83J) */
1646 result
= target_read_u32(target
, SIM_SOPT1
, &sopt1
);
1647 if (result
!= ERROR_OK
)
1650 if (((kinfo
->sim_sdid
& (KINETIS_SDID_DIEID_MASK
)) == KINETIS_SDID_DIEID_K24FN1M
) &&
1651 ((sopt1
& KINETIS_SOPT1_RAMSIZE_MASK
) == KINETIS_SOPT1_RAMSIZE_K24FN1M
)) {
1653 pflash_sector_size_bytes
= 4<<10;
1655 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1656 kinfo
->max_flash_prog_size
= 1<<10;
1659 if ((kinfo
->sim_sdid
& (KINETIS_SDID_DIEID_MASK
)) == KINETIS_SDID_DIEID_K22FN128
1660 || (kinfo
->sim_sdid
& (KINETIS_SDID_DIEID_MASK
)) == KINETIS_SDID_DIEID_K22FN256
1661 || (kinfo
->sim_sdid
& (KINETIS_SDID_DIEID_MASK
)) == KINETIS_SDID_DIEID_K22FN512
) {
1662 /* K22 with new-style SDID - smaller pflash with FTFA, 2kB sectors */
1663 pflash_sector_size_bytes
= 2<<10;
1664 /* autodetect 1 or 2 blocks */
1665 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_K
;
1668 LOG_ERROR("Unsupported Kinetis K22 DIEID");
1671 case KINETIS_SDID_FAMILYID_K2X
| KINETIS_SDID_SUBFAMID_KX4
:
1672 pflash_sector_size_bytes
= 4<<10;
1673 if ((kinfo
->sim_sdid
& (KINETIS_SDID_DIEID_MASK
)) == KINETIS_SDID_DIEID_K24FN256
) {
1674 /* K24FN256 - smaller pflash with FTFA */
1676 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_K
;
1679 /* K24FN1M without errata 7534 */
1681 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1682 kinfo
->max_flash_prog_size
= 1<<10;
1685 case KINETIS_SDID_FAMILYID_K6X
| KINETIS_SDID_SUBFAMID_KX3
:
1686 case KINETIS_SDID_FAMILYID_K6X
| KINETIS_SDID_SUBFAMID_KX1
: /* errata 7534 - should be K63 */
1688 case KINETIS_SDID_FAMILYID_K6X
| KINETIS_SDID_SUBFAMID_KX4
:
1689 case KINETIS_SDID_FAMILYID_K6X
| KINETIS_SDID_SUBFAMID_KX2
: /* errata 7534 - should be K64 */
1690 /* K64FN1M0, K64FX512 */
1691 pflash_sector_size_bytes
= 4<<10;
1692 nvm_sector_size_bytes
= 4<<10;
1693 kinfo
->max_flash_prog_size
= 1<<10;
1695 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1698 case KINETIS_SDID_FAMILYID_K2X
| KINETIS_SDID_SUBFAMID_KX6
:
1700 case KINETIS_SDID_FAMILYID_K6X
| KINETIS_SDID_SUBFAMID_KX6
:
1701 /* K66FN2M0, K66FX1M0 */
1702 pflash_sector_size_bytes
= 4<<10;
1703 nvm_sector_size_bytes
= 4<<10;
1704 kinfo
->max_flash_prog_size
= 1<<10;
1706 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_K
;
1709 case KINETIS_SDID_FAMILYID_K8X
| KINETIS_SDID_SUBFAMID_KX0
:
1710 case KINETIS_SDID_FAMILYID_K8X
| KINETIS_SDID_SUBFAMID_KX1
:
1711 case KINETIS_SDID_FAMILYID_K8X
| KINETIS_SDID_SUBFAMID_KX2
:
1712 /* K80FN256, K81FN256, K82FN256 */
1713 pflash_sector_size_bytes
= 4<<10;
1715 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_K
| FS_NO_CMD_BLOCKSTAT
;
1718 case KINETIS_SDID_FAMILYID_KL8X
| KINETIS_SDID_SUBFAMID_KX1
:
1719 case KINETIS_SDID_FAMILYID_KL8X
| KINETIS_SDID_SUBFAMID_KX2
:
1720 /* KL81Z128, KL82Z128 */
1721 pflash_sector_size_bytes
= 2<<10;
1723 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_L
| FS_NO_CMD_BLOCKSTAT
;
1727 LOG_ERROR("Unsupported Kinetis FAMILYID SUBFAMID");
1731 case KINETIS_SDID_SERIESID_KL
:
1733 pflash_sector_size_bytes
= 1<<10;
1734 nvm_sector_size_bytes
= 1<<10;
1735 /* autodetect 1 or 2 blocks */
1736 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_L
;
1739 case KINETIS_SDID_SERIESID_KV
:
1741 switch (kinfo
->sim_sdid
& (KINETIS_SDID_FAMILYID_MASK
| KINETIS_SDID_SUBFAMID_MASK
)) {
1742 case KINETIS_SDID_FAMILYID_K1X
| KINETIS_SDID_SUBFAMID_KX0
:
1743 /* KV10: FTFA, 1kB sectors */
1744 pflash_sector_size_bytes
= 1<<10;
1746 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_L
;
1749 case KINETIS_SDID_FAMILYID_K1X
| KINETIS_SDID_SUBFAMID_KX1
:
1750 /* KV11: FTFA, 2kB sectors */
1751 pflash_sector_size_bytes
= 2<<10;
1753 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_L
;
1756 case KINETIS_SDID_FAMILYID_K3X
| KINETIS_SDID_SUBFAMID_KX0
:
1757 /* KV30: FTFA, 2kB sectors, 1 block */
1758 case KINETIS_SDID_FAMILYID_K3X
| KINETIS_SDID_SUBFAMID_KX1
:
1759 /* KV31: FTFA, 2kB sectors, 2 blocks */
1760 pflash_sector_size_bytes
= 2<<10;
1761 /* autodetect 1 or 2 blocks */
1762 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_K
;
1765 case KINETIS_SDID_FAMILYID_K4X
| KINETIS_SDID_SUBFAMID_KX2
:
1766 case KINETIS_SDID_FAMILYID_K4X
| KINETIS_SDID_SUBFAMID_KX4
:
1767 case KINETIS_SDID_FAMILYID_K4X
| KINETIS_SDID_SUBFAMID_KX6
:
1768 /* KV4x: FTFA, 4kB sectors */
1769 pflash_sector_size_bytes
= 4<<10;
1771 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE_K
;
1775 LOG_ERROR("Unsupported KV FAMILYID SUBFAMID");
1779 case KINETIS_SDID_SERIESID_KE
:
1781 switch (kinfo
->sim_sdid
&
1782 (KINETIS_SDID_FAMILYID_MASK
| KINETIS_SDID_SUBFAMID_MASK
| KINETIS_SDID_PROJECTID_MASK
)) {
1783 case KINETIS_SDID_FAMILYID_K1X
| KINETIS_SDID_SUBFAMID_KX4
| KINETIS_SDID_PROJECTID_KE1xZ
:
1784 case KINETIS_SDID_FAMILYID_K1X
| KINETIS_SDID_SUBFAMID_KX5
| KINETIS_SDID_PROJECTID_KE1xZ
:
1785 /* KE1xZ: FTFE, 2kB sectors */
1786 pflash_sector_size_bytes
= 2<<10;
1787 nvm_sector_size_bytes
= 2<<10;
1788 kinfo
->max_flash_prog_size
= 1<<9;
1790 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_L
;
1793 case KINETIS_SDID_FAMILYID_K1X
| KINETIS_SDID_SUBFAMID_KX4
| KINETIS_SDID_PROJECTID_KE1xF
:
1794 case KINETIS_SDID_FAMILYID_K1X
| KINETIS_SDID_SUBFAMID_KX6
| KINETIS_SDID_PROJECTID_KE1xF
:
1795 case KINETIS_SDID_FAMILYID_K1X
| KINETIS_SDID_SUBFAMID_KX8
| KINETIS_SDID_PROJECTID_KE1xF
:
1796 /* KE1xF: FTFE, 4kB sectors */
1797 pflash_sector_size_bytes
= 4<<10;
1798 nvm_sector_size_bytes
= 2<<10;
1799 kinfo
->max_flash_prog_size
= 1<<10;
1801 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE_MSCM
;
1805 LOG_ERROR("Unsupported KE FAMILYID SUBFAMID");
1810 LOG_ERROR("Unsupported K-series");
1814 if (pflash_sector_size_bytes
== 0) {
1815 LOG_ERROR("MCU is unsupported, SDID 0x%08" PRIx32
, kinfo
->sim_sdid
);
1816 return ERROR_FLASH_OPER_UNSUPPORTED
;
1819 result
= target_read_u32(target
, SIM_FCFG1
, &kinfo
->sim_fcfg1
);
1820 if (result
!= ERROR_OK
)
1823 result
= target_read_u32(target
, SIM_FCFG2
, &kinfo
->sim_fcfg2
);
1824 if (result
!= ERROR_OK
)
1827 LOG_DEBUG("SDID: 0x%08" PRIX32
" FCFG1: 0x%08" PRIX32
" FCFG2: 0x%08" PRIX32
, kinfo
->sim_sdid
,
1828 kinfo
->sim_fcfg1
, kinfo
->sim_fcfg2
);
1830 fcfg1_nvmsize
= (uint8_t)((kinfo
->sim_fcfg1
>> 28) & 0x0f);
1831 fcfg1_pfsize
= (uint8_t)((kinfo
->sim_fcfg1
>> 24) & 0x0f);
1832 fcfg1_eesize
= (uint8_t)((kinfo
->sim_fcfg1
>> 16) & 0x0f);
1833 fcfg1_depart
= (uint8_t)((kinfo
->sim_fcfg1
>> 8) & 0x0f);
1835 fcfg2_pflsh
= (uint8_t)((kinfo
->sim_fcfg2
>> 23) & 0x01);
1836 fcfg2_maxaddr0
= (uint8_t)((kinfo
->sim_fcfg2
>> 24) & 0x7f);
1837 fcfg2_maxaddr1
= (uint8_t)((kinfo
->sim_fcfg2
>> 16) & 0x7f);
1839 if (num_blocks
== 0)
1840 num_blocks
= fcfg2_maxaddr1
? 2 : 1;
1841 else if (fcfg2_maxaddr1
== 0 && num_blocks
>= 2) {
1843 LOG_WARNING("MAXADDR1 is zero, number of flash banks adjusted to 1");
1844 } else if (fcfg2_maxaddr1
!= 0 && num_blocks
== 1) {
1846 LOG_WARNING("MAXADDR1 is non zero, number of flash banks adjusted to 2");
1849 /* when the PFLSH bit is set, there is no FlexNVM/FlexRAM */
1851 switch (fcfg1_nvmsize
) {
1857 nvm_size
= 1 << (14 + (fcfg1_nvmsize
>> 1));
1860 if (pflash_sector_size_bytes
>= 4<<10)
1871 switch (fcfg1_eesize
) {
1882 ee_size
= (16 << (10 - fcfg1_eesize
));
1889 switch (fcfg1_depart
) {
1896 df_size
= nvm_size
- (4096 << fcfg1_depart
);
1906 df_size
= 4096 << (fcfg1_depart
& 0x7);
1914 switch (fcfg1_pfsize
) {
1921 pf_size
= 1 << (14 + (fcfg1_pfsize
>> 1));
1924 /* a peculiar case: Freescale states different sizes for 0xf
1925 * K02P64M100SFARM 128 KB ... duplicate of code 0x7
1926 * K22P121M120SF8RM 256 KB ... duplicate of code 0x9
1927 * K22P121M120SF7RM 512 KB ... duplicate of code 0xb
1928 * K22P100M120SF5RM 1024 KB ... duplicate of code 0xd
1929 * K26P169M180SF5RM 2048 KB ... the only unique value
1930 * fcfg2_maxaddr0 seems to be the only clue to pf_size
1931 * Checking fcfg2_maxaddr0 later in this routine is pointless then
1934 pf_size
= ((uint32_t)fcfg2_maxaddr0
<< 13) * num_blocks
;
1936 pf_size
= ((uint32_t)fcfg2_maxaddr0
<< 13) * num_blocks
/ 2;
1937 if (pf_size
!= 2048<<10)
1938 LOG_WARNING("SIM_FCFG1 PFSIZE = 0xf: please check if pflash is %u KB", pf_size
>>10);
1946 LOG_DEBUG("FlexNVM: %" PRIu32
" PFlash: %" PRIu32
" FlexRAM: %" PRIu32
" PFLSH: %d",
1947 nvm_size
, pf_size
, ee_size
, fcfg2_pflsh
);
1949 num_pflash_blocks
= num_blocks
/ (2 - fcfg2_pflsh
);
1950 first_nvm_bank
= num_pflash_blocks
;
1951 num_nvm_blocks
= num_blocks
- num_pflash_blocks
;
1953 LOG_DEBUG("%d blocks total: %d PFlash, %d FlexNVM",
1954 num_blocks
, num_pflash_blocks
, num_nvm_blocks
);
1956 LOG_INFO("Probing flash info for bank %d", bank
->bank_number
);
1958 if ((unsigned)bank
->bank_number
< num_pflash_blocks
) {
1959 /* pflash, banks start at address zero */
1960 kinfo
->flash_class
= FC_PFLASH
;
1961 bank
->size
= (pf_size
/ num_pflash_blocks
);
1962 bank
->base
= 0x00000000 + bank
->size
* bank
->bank_number
;
1963 kinfo
->prog_base
= bank
->base
;
1964 kinfo
->sector_size
= pflash_sector_size_bytes
;
1965 /* pflash is divided into 32 protection areas for
1966 * parts with more than 32K of PFlash. For parts with
1967 * less the protection unit is set to 1024 bytes */
1968 kinfo
->protection_size
= MAX(pf_size
/ 32, 1024);
1969 bank
->num_prot_blocks
= 32 / num_pflash_blocks
;
1970 kinfo
->protection_block
= bank
->num_prot_blocks
* bank
->bank_number
;
1972 } else if ((unsigned)bank
->bank_number
< num_blocks
) {
1973 /* nvm, banks start at address 0x10000000 */
1974 unsigned nvm_ord
= bank
->bank_number
- first_nvm_bank
;
1977 kinfo
->flash_class
= FC_FLEX_NVM
;
1978 bank
->size
= (nvm_size
/ num_nvm_blocks
);
1979 bank
->base
= 0x10000000 + bank
->size
* nvm_ord
;
1980 kinfo
->prog_base
= 0x00800000 + bank
->size
* nvm_ord
;
1981 kinfo
->sector_size
= nvm_sector_size_bytes
;
1983 kinfo
->protection_size
= 0;
1985 for (i
= df_size
; ~i
& 1; i
>>= 1)
1988 kinfo
->protection_size
= df_size
/ 8; /* data flash size = 2^^n */
1990 kinfo
->protection_size
= nvm_size
/ 8; /* TODO: verify on SF1, not documented in RM */
1992 bank
->num_prot_blocks
= 8 / num_nvm_blocks
;
1993 kinfo
->protection_block
= bank
->num_prot_blocks
* nvm_ord
;
1995 /* EEPROM backup part of FlexNVM is not accessible, use df_size as a limit */
1996 if (df_size
> bank
->size
* nvm_ord
)
1997 limit
= df_size
- bank
->size
* nvm_ord
;
2001 if (bank
->size
> limit
) {
2003 LOG_DEBUG("FlexNVM bank %d limited to 0x%08" PRIx32
" due to active EEPROM backup",
2004 bank
->bank_number
, limit
);
2007 } else if ((unsigned)bank
->bank_number
== num_blocks
) {
2008 LOG_ERROR("FlexRAM support not yet implemented");
2009 return ERROR_FLASH_OPER_UNSUPPORTED
;
2011 LOG_ERROR("Cannot determine parameters for bank %d, only %d banks on device",
2012 bank
->bank_number
, num_blocks
);
2013 return ERROR_FLASH_BANK_INVALID
;
2016 if (bank
->bank_number
== 0 && ((uint32_t)fcfg2_maxaddr0
<< 13) != bank
->size
)
2017 LOG_WARNING("MAXADDR0 0x%02" PRIx8
" check failed,"
2018 " please report to OpenOCD mailing list", fcfg2_maxaddr0
);
2020 if (bank
->bank_number
== 1 && ((uint32_t)fcfg2_maxaddr1
<< 13) != bank
->size
)
2021 LOG_WARNING("MAXADDR1 0x%02" PRIx8
" check failed,"
2022 " please report to OpenOCD mailing list", fcfg2_maxaddr1
);
2024 if ((unsigned)bank
->bank_number
== first_nvm_bank
2025 && ((uint32_t)fcfg2_maxaddr1
<< 13) != df_size
)
2026 LOG_WARNING("FlexNVM MAXADDR1 0x%02" PRIx8
" check failed,"
2027 " please report to OpenOCD mailing list", fcfg2_maxaddr1
);
2030 if (bank
->sectors
) {
2031 free(bank
->sectors
);
2032 bank
->sectors
= NULL
;
2034 if (bank
->prot_blocks
) {
2035 free(bank
->prot_blocks
);
2036 bank
->prot_blocks
= NULL
;
2039 if (kinfo
->sector_size
== 0) {
2040 LOG_ERROR("Unknown sector size for bank %d", bank
->bank_number
);
2041 return ERROR_FLASH_BANK_INVALID
;
2044 if (kinfo
->flash_support
& FS_PROGRAM_SECTOR
2045 && kinfo
->max_flash_prog_size
== 0) {
2046 kinfo
->max_flash_prog_size
= kinfo
->sector_size
;
2047 /* Program section size is equal to sector size by default */
2050 bank
->num_sectors
= bank
->size
/ kinfo
->sector_size
;
2052 if (bank
->num_sectors
> 0) {
2053 /* FlexNVM bank can be used for EEPROM backup therefore zero sized */
2054 bank
->sectors
= alloc_block_array(0, kinfo
->sector_size
, bank
->num_sectors
);
2058 bank
->prot_blocks
= alloc_block_array(0, kinfo
->protection_size
, bank
->num_prot_blocks
);
2059 if (!bank
->prot_blocks
)
2063 bank
->num_prot_blocks
= 0;
2066 kinfo
->probed
= true;
2071 static int kinetis_auto_probe(struct flash_bank
*bank
)
2073 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
2075 if (kinfo
&& kinfo
->probed
)
2078 return kinetis_probe(bank
);
2081 static int kinetis_info(struct flash_bank
*bank
, char *buf
, int buf_size
)
2083 const char *bank_class_names
[] = {
2084 "(ANY)", "PFlash", "FlexNVM", "FlexRAM"
2087 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
2089 (void) snprintf(buf
, buf_size
,
2090 "%s driver for %s flash bank %s at 0x%8.8" PRIx32
"",
2091 bank
->driver
->name
, bank_class_names
[kinfo
->flash_class
],
2092 bank
->name
, bank
->base
);
2097 static int kinetis_blank_check(struct flash_bank
*bank
)
2099 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
2102 /* suprisingly blank check does not work in VLPR and HSRUN modes */
2103 result
= kinetis_check_run_mode(bank
->target
);
2104 if (result
!= ERROR_OK
)
2107 /* reset error flags */
2108 result
= kinetis_ftfx_prepare(bank
->target
);
2109 if (result
!= ERROR_OK
)
2112 if (kinfo
->flash_class
== FC_PFLASH
|| kinfo
->flash_class
== FC_FLEX_NVM
) {
2113 bool block_dirty
= true;
2114 bool use_block_cmd
= !(kinfo
->flash_support
& FS_NO_CMD_BLOCKSTAT
);
2117 if (use_block_cmd
&& kinfo
->flash_class
== FC_FLEX_NVM
) {
2118 uint8_t fcfg1_depart
= (uint8_t)((kinfo
->sim_fcfg1
>> 8) & 0x0f);
2119 /* block operation cannot be used on FlexNVM when EEPROM backup partition is set */
2120 if (fcfg1_depart
!= 0xf && fcfg1_depart
!= 0)
2121 use_block_cmd
= false;
2124 if (use_block_cmd
) {
2125 /* check if whole bank is blank */
2126 result
= kinetis_ftfx_command(bank
->target
, FTFx_CMD_BLOCKSTAT
, kinfo
->prog_base
,
2127 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat
);
2129 if (result
!= ERROR_OK
)
2130 kinetis_ftfx_clear_error(bank
->target
);
2131 else if ((ftfx_fstat
& 0x01) == 0)
2132 block_dirty
= false;
2136 /* the whole bank is not erased, check sector-by-sector */
2138 for (i
= 0; i
< bank
->num_sectors
; i
++) {
2140 result
= kinetis_ftfx_command(bank
->target
, FTFx_CMD_SECTSTAT
,
2141 kinfo
->prog_base
+ bank
->sectors
[i
].offset
,
2142 1, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat
);
2144 if (result
== ERROR_OK
) {
2145 bank
->sectors
[i
].is_erased
= !(ftfx_fstat
& 0x01);
2147 LOG_DEBUG("Ignoring errored PFlash sector blank-check");
2148 kinetis_ftfx_clear_error(bank
->target
);
2149 bank
->sectors
[i
].is_erased
= -1;
2153 /* the whole bank is erased, update all sectors */
2155 for (i
= 0; i
< bank
->num_sectors
; i
++)
2156 bank
->sectors
[i
].is_erased
= 1;
2159 LOG_WARNING("kinetis_blank_check not supported yet for FlexRAM");
2160 return ERROR_FLASH_OPERATION_FAILED
;
2167 COMMAND_HANDLER(kinetis_nvm_partition
)
2170 unsigned long par
, log2
= 0, ee1
= 0, ee2
= 0;
2171 enum { SHOW_INFO
, DF_SIZE
, EEBKP_SIZE
} sz_type
= SHOW_INFO
;
2173 uint8_t load_flex_ram
= 1;
2174 uint8_t ee_size_code
= 0x3f;
2175 uint8_t flex_nvm_partition_code
= 0;
2176 uint8_t ee_split
= 3;
2177 struct target
*target
= get_current_target(CMD_CTX
);
2178 struct flash_bank
*bank
;
2179 struct kinetis_flash_bank
*kinfo
;
2182 if (CMD_ARGC
>= 2) {
2183 if (strcmp(CMD_ARGV
[0], "dataflash") == 0)
2185 else if (strcmp(CMD_ARGV
[0], "eebkp") == 0)
2186 sz_type
= EEBKP_SIZE
;
2188 par
= strtoul(CMD_ARGV
[1], NULL
, 10);
2189 while (par
>> (log2
+ 3))
2194 result
= target_read_u32(target
, SIM_FCFG1
, &sim_fcfg1
);
2195 if (result
!= ERROR_OK
)
2198 flex_nvm_partition_code
= (uint8_t)((sim_fcfg1
>> 8) & 0x0f);
2199 switch (flex_nvm_partition_code
) {
2201 command_print(CMD_CTX
, "No EEPROM backup, data flash only");
2209 command_print(CMD_CTX
, "EEPROM backup %d KB", 4 << flex_nvm_partition_code
);
2212 command_print(CMD_CTX
, "No data flash, EEPROM backup only");
2220 command_print(CMD_CTX
, "data flash %d KB", 4 << (flex_nvm_partition_code
& 7));
2223 command_print(CMD_CTX
, "No EEPROM backup, data flash only (DEPART not set)");
2226 command_print(CMD_CTX
, "Unsupported EEPROM backup size code 0x%02" PRIx8
, flex_nvm_partition_code
);
2231 flex_nvm_partition_code
= 0x8 | log2
;
2235 flex_nvm_partition_code
= log2
;
2240 ee1
= ee2
= strtoul(CMD_ARGV
[2], NULL
, 10) / 2;
2241 else if (CMD_ARGC
>= 4) {
2242 ee1
= strtoul(CMD_ARGV
[2], NULL
, 10);
2243 ee2
= strtoul(CMD_ARGV
[3], NULL
, 10);
2246 enable
= ee1
+ ee2
> 0;
2248 for (log2
= 2; ; log2
++) {
2249 if (ee1
+ ee2
== (16u << 10) >> log2
)
2251 if (ee1
+ ee2
> (16u << 10) >> log2
|| log2
>= 9) {
2252 LOG_ERROR("Unsupported EEPROM size");
2253 return ERROR_FLASH_OPERATION_FAILED
;
2259 else if (ee1
* 7 == ee2
)
2261 else if (ee1
!= ee2
) {
2262 LOG_ERROR("Unsupported EEPROM sizes ratio");
2263 return ERROR_FLASH_OPERATION_FAILED
;
2266 ee_size_code
= log2
| ee_split
<< 4;
2270 COMMAND_PARSE_ON_OFF(CMD_ARGV
[4], enable
);
2274 LOG_INFO("DEPART 0x%" PRIx8
", EEPROM size code 0x%" PRIx8
,
2275 flex_nvm_partition_code
, ee_size_code
);
2277 result
= kinetis_check_run_mode(target
);
2278 if (result
!= ERROR_OK
)
2281 /* reset error flags */
2282 result
= kinetis_ftfx_prepare(target
);
2283 if (result
!= ERROR_OK
)
2286 result
= kinetis_ftfx_command(target
, FTFx_CMD_PGMPART
, load_flex_ram
,
2287 ee_size_code
, flex_nvm_partition_code
, 0, 0,
2289 if (result
!= ERROR_OK
)
2292 command_print(CMD_CTX
, "FlexNVM partition set. Please reset MCU.");
2294 for (i
= 1; i
< 4; i
++) {
2295 bank
= get_flash_bank_by_num_noprobe(i
);
2299 kinfo
= bank
->driver_priv
;
2300 if (kinfo
&& kinfo
->flash_class
== FC_FLEX_NVM
)
2301 kinfo
->probed
= false; /* re-probe before next use */
2304 command_print(CMD_CTX
, "FlexNVM banks will be re-probed to set new data flash size.");
2308 COMMAND_HANDLER(kinetis_fcf_source_handler
)
2311 return ERROR_COMMAND_SYNTAX_ERROR
;
2313 if (CMD_ARGC
== 1) {
2314 if (strcmp(CMD_ARGV
[0], "write") == 0)
2315 allow_fcf_writes
= true;
2316 else if (strcmp(CMD_ARGV
[0], "protection") == 0)
2317 allow_fcf_writes
= false;
2319 return ERROR_COMMAND_SYNTAX_ERROR
;
2322 if (allow_fcf_writes
) {
2323 command_print(CMD_CTX
, "Arbitrary Flash Configuration Field writes enabled.");
2324 command_print(CMD_CTX
, "Protection info writes to FCF disabled.");
2325 LOG_WARNING("BEWARE: incorrect flash configuration may permanently lock the device.");
2327 command_print(CMD_CTX
, "Protection info writes to Flash Configuration Field enabled.");
2328 command_print(CMD_CTX
, "Arbitrary FCF writes disabled. Mode safe from unwanted locking of the device.");
2334 COMMAND_HANDLER(kinetis_fopt_handler
)
2337 return ERROR_COMMAND_SYNTAX_ERROR
;
2340 fcf_fopt
= (uint8_t)strtoul(CMD_ARGV
[0], NULL
, 0);
2342 command_print(CMD_CTX
, "FCF_FOPT 0x%02" PRIx8
, fcf_fopt
);
2348 static const struct command_registration kinetis_security_command_handlers
[] = {
2350 .name
= "check_security",
2351 .mode
= COMMAND_EXEC
,
2352 .help
= "Check status of device security lock",
2354 .handler
= kinetis_check_flash_security_status
,
2358 .mode
= COMMAND_EXEC
,
2359 .help
= "Issue a halt via the MDM-AP",
2361 .handler
= kinetis_mdm_halt
,
2364 .name
= "mass_erase",
2365 .mode
= COMMAND_EXEC
,
2366 .help
= "Issue a complete flash erase via the MDM-AP",
2368 .handler
= kinetis_mdm_mass_erase
,
2371 .mode
= COMMAND_EXEC
,
2372 .help
= "Issue a reset via the MDM-AP",
2374 .handler
= kinetis_mdm_reset
,
2376 COMMAND_REGISTRATION_DONE
2379 static const struct command_registration kinetis_exec_command_handlers
[] = {
2382 .mode
= COMMAND_ANY
,
2383 .help
= "MDM-AP command group",
2385 .chain
= kinetis_security_command_handlers
,
2388 .name
= "disable_wdog",
2389 .mode
= COMMAND_EXEC
,
2390 .help
= "Disable the watchdog timer",
2392 .handler
= kinetis_disable_wdog_handler
,
2395 .name
= "nvm_partition",
2396 .mode
= COMMAND_EXEC
,
2397 .help
= "Show/set data flash or EEPROM backup size in kilobytes,"
2398 " set two EEPROM sizes in bytes and FlexRAM loading during reset",
2399 .usage
= "('info'|'dataflash' size|'eebkp' size) [eesize1 eesize2] ['on'|'off']",
2400 .handler
= kinetis_nvm_partition
,
2403 .name
= "fcf_source",
2404 .mode
= COMMAND_EXEC
,
2405 .help
= "Use protection as a source for Flash Configuration Field or allow writing arbitrary values to the FCF"
2406 " Mode 'protection' is safe from unwanted locking of the device.",
2407 .usage
= "['protection'|'write']",
2408 .handler
= kinetis_fcf_source_handler
,
2412 .mode
= COMMAND_EXEC
,
2413 .help
= "FCF_FOPT value source in 'kinetis fcf_source protection' mode",
2415 .handler
= kinetis_fopt_handler
,
2417 COMMAND_REGISTRATION_DONE
2420 static const struct command_registration kinetis_command_handler
[] = {
2423 .mode
= COMMAND_ANY
,
2424 .help
= "Kinetis flash controller commands",
2426 .chain
= kinetis_exec_command_handlers
,
2428 COMMAND_REGISTRATION_DONE
2433 struct flash_driver kinetis_flash
= {
2435 .commands
= kinetis_command_handler
,
2436 .flash_bank_command
= kinetis_flash_bank_command
,
2437 .erase
= kinetis_erase
,
2438 .protect
= kinetis_protect
,
2439 .write
= kinetis_write
,
2440 .read
= default_flash_read
,
2441 .probe
= kinetis_probe
,
2442 .auto_probe
= kinetis_auto_probe
,
2443 .erase_check
= kinetis_blank_check
,
2444 .protect_check
= kinetis_protect_check
,
2445 .info
= kinetis_info
,