1 /***************************************************************************
2 * Copyright (C) 2011 by Mathias Kuester *
5 * Copyright (C) 2011 sleep(5) ltd *
6 * tomas@sleepfive.com *
8 * Copyright (C) 2012 by Christopher D. Kilgour *
9 * techie at whiterocker.com *
11 * Copyright (C) 2013 Nemui Trinomius *
12 * nemuisan_kawausogasuki@live.jp *
14 * Copyright (C) 2015 Tomas Vanek *
17 * This program is free software; you can redistribute it and/or modify *
18 * it under the terms of the GNU General Public License as published by *
19 * the Free Software Foundation; either version 2 of the License, or *
20 * (at your option) any later version. *
22 * This program is distributed in the hope that it will be useful, *
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
25 * GNU General Public License for more details. *
27 * You should have received a copy of the GNU General Public License *
28 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
29 ***************************************************************************/
35 #include "jtag/interface.h"
37 #include <helper/binarybuffer.h>
38 #include <helper/time_support.h>
39 #include <target/target_type.h>
40 #include <target/algorithm.h>
41 #include <target/armv7m.h>
42 #include <target/cortex_m.h>
45 * Implementation Notes
47 * The persistent memories in the Kinetis chip families K10 through
48 * K70 are all manipulated with the Flash Memory Module. Some
49 * variants call this module the FTFE, others call it the FTFL. To
50 * indicate that both are considered here, we use FTFX.
52 * Within the module, according to the chip variant, the persistent
53 * memory is divided into what Freescale terms Program Flash, FlexNVM,
54 * and FlexRAM. All chip variants have Program Flash. Some chip
55 * variants also have FlexNVM and FlexRAM, which always appear
58 * A given Kinetis chip may have 1, 2 or 4 blocks of flash. Here we map
59 * each block to a separate bank. Each block size varies by chip and
60 * may be determined by the read-only SIM_FCFG1 register. The sector
61 * size within each bank/block varies by chip, and may be 1, 2 or 4k.
62 * The sector size may be different for flash and FlexNVM.
64 * The first half of the flash (1 or 2 blocks) is always Program Flash
65 * and always starts at address 0x00000000. The "PFLSH" flag, bit 23
66 * of the read-only SIM_FCFG2 register, determines whether the second
67 * half of the flash is also Program Flash or FlexNVM+FlexRAM. When
68 * PFLSH is set, the second from the first half. When PFLSH is clear,
69 * the second half of flash is FlexNVM and always starts at address
70 * 0x10000000. FlexRAM, which is also present when PFLSH is clear,
71 * always starts at address 0x14000000.
73 * The Flash Memory Module provides a register set where flash
74 * commands are loaded to perform flash operations like erase and
75 * program. Different commands are available depending on whether
76 * Program Flash or FlexNVM/FlexRAM is being manipulated. Although
77 * the commands used are quite consistent between flash blocks, the
78 * parameters they accept differ according to the flash sector size.
83 #define FCF_ADDRESS 0x00000400
87 #define FCF_FDPROT 0xf
90 #define FLEXRAM 0x14000000
92 #define FMC_PFB01CR 0x4001f004
93 #define FTFx_FSTAT 0x40020000
94 #define FTFx_FCNFG 0x40020001
95 #define FTFx_FCCOB3 0x40020004
96 #define FTFx_FPROT3 0x40020010
97 #define FTFx_FDPROT 0x40020017
98 #define SIM_SDID 0x40048024
99 #define SIM_SOPT1 0x40047000
100 #define SIM_FCFG1 0x4004804c
101 #define SIM_FCFG2 0x40048050
102 #define WDOG_STCTRH 0x40052000
103 #define SMC_PMCTRL 0x4007E001
104 #define SMC_PMSTAT 0x4007E003
107 #define PM_STAT_RUN 0x01
108 #define PM_STAT_VLPR 0x04
109 #define PM_CTRL_RUNM_RUN 0x00
112 #define FTFx_CMD_BLOCKSTAT 0x00
113 #define FTFx_CMD_SECTSTAT 0x01
114 #define FTFx_CMD_LWORDPROG 0x06
115 #define FTFx_CMD_SECTERASE 0x09
116 #define FTFx_CMD_SECTWRITE 0x0b
117 #define FTFx_CMD_MASSERASE 0x44
118 #define FTFx_CMD_PGMPART 0x80
119 #define FTFx_CMD_SETFLEXRAM 0x81
121 /* The older Kinetis K series uses the following SDID layout :
128 * The newer Kinetis series uses the following SDID layout :
130 * Bit 27-24 : SUBFAMID
131 * Bit 23-20 : SERIESID
132 * Bit 19-16 : SRAMSIZE
134 * Bit 6-4 : Reserved (0)
137 * We assume that if bits 31-16 are 0 then it's an older
141 #define KINETIS_SOPT1_RAMSIZE_MASK 0x0000F000
142 #define KINETIS_SOPT1_RAMSIZE_K24FN1M 0x0000B000
144 #define KINETIS_SDID_K_SERIES_MASK 0x0000FFFF
146 #define KINETIS_SDID_DIEID_MASK 0x00000F80
148 #define KINETIS_SDID_DIEID_K22FN128 0x00000680 /* smaller pflash with FTFA */
149 #define KINETIS_SDID_DIEID_K22FN256 0x00000A80
150 #define KINETIS_SDID_DIEID_K22FN512 0x00000E80
151 #define KINETIS_SDID_DIEID_K24FN256 0x00000700
153 #define KINETIS_SDID_DIEID_K24FN1M 0x00000300 /* Detect Errata 7534 */
155 /* We can't rely solely on the FAMID field to determine the MCU
156 * type since some FAMID values identify multiple MCUs with
157 * different flash sector sizes (K20 and K22 for instance).
158 * Therefore we combine it with the DIEID bits which may possibly
159 * break if Freescale bumps the DIEID for a particular MCU. */
160 #define KINETIS_K_SDID_TYPE_MASK 0x00000FF0
161 #define KINETIS_K_SDID_K10_M50 0x00000000
162 #define KINETIS_K_SDID_K10_M72 0x00000080
163 #define KINETIS_K_SDID_K10_M100 0x00000100
164 #define KINETIS_K_SDID_K10_M120 0x00000180
165 #define KINETIS_K_SDID_K11 0x00000220
166 #define KINETIS_K_SDID_K12 0x00000200
167 #define KINETIS_K_SDID_K20_M50 0x00000010
168 #define KINETIS_K_SDID_K20_M72 0x00000090
169 #define KINETIS_K_SDID_K20_M100 0x00000110
170 #define KINETIS_K_SDID_K20_M120 0x00000190
171 #define KINETIS_K_SDID_K21_M50 0x00000230
172 #define KINETIS_K_SDID_K21_M120 0x00000330
173 #define KINETIS_K_SDID_K22_M50 0x00000210
174 #define KINETIS_K_SDID_K22_M120 0x00000310
175 #define KINETIS_K_SDID_K30_M72 0x000000A0
176 #define KINETIS_K_SDID_K30_M100 0x00000120
177 #define KINETIS_K_SDID_K40_M72 0x000000B0
178 #define KINETIS_K_SDID_K40_M100 0x00000130
179 #define KINETIS_K_SDID_K50_M72 0x000000E0
180 #define KINETIS_K_SDID_K51_M72 0x000000F0
181 #define KINETIS_K_SDID_K53 0x00000170
182 #define KINETIS_K_SDID_K60_M100 0x00000140
183 #define KINETIS_K_SDID_K60_M150 0x000001C0
184 #define KINETIS_K_SDID_K70_M150 0x000001D0
186 #define KINETIS_SDID_SERIESID_MASK 0x00F00000
187 #define KINETIS_SDID_SERIESID_K 0x00000000
188 #define KINETIS_SDID_SERIESID_KL 0x00100000
189 #define KINETIS_SDID_SERIESID_KW 0x00500000
190 #define KINETIS_SDID_SERIESID_KV 0x00600000
192 #define KINETIS_SDID_SUBFAMID_MASK 0x0F000000
193 #define KINETIS_SDID_SUBFAMID_KX0 0x00000000
194 #define KINETIS_SDID_SUBFAMID_KX1 0x01000000
195 #define KINETIS_SDID_SUBFAMID_KX2 0x02000000
196 #define KINETIS_SDID_SUBFAMID_KX3 0x03000000
197 #define KINETIS_SDID_SUBFAMID_KX4 0x04000000
198 #define KINETIS_SDID_SUBFAMID_KX5 0x05000000
199 #define KINETIS_SDID_SUBFAMID_KX6 0x06000000
201 #define KINETIS_SDID_FAMILYID_MASK 0xF0000000
202 #define KINETIS_SDID_FAMILYID_K0X 0x00000000
203 #define KINETIS_SDID_FAMILYID_K1X 0x10000000
204 #define KINETIS_SDID_FAMILYID_K2X 0x20000000
205 #define KINETIS_SDID_FAMILYID_K3X 0x30000000
206 #define KINETIS_SDID_FAMILYID_K4X 0x40000000
207 #define KINETIS_SDID_FAMILYID_K6X 0x60000000
208 #define KINETIS_SDID_FAMILYID_K7X 0x70000000
210 struct kinetis_flash_bank
{
212 uint32_t sector_size
;
213 uint32_t max_flash_prog_size
;
214 uint32_t protection_size
;
215 uint32_t prog_base
; /* base address for FTFx operations */
216 /* same as bank->base for pflash, differs for FlexNVM */
217 uint32_t protection_block
; /* number of first protection block in this bank */
231 FS_PROGRAM_SECTOR
= 1,
232 FS_PROGRAM_LONGWORD
= 2,
233 FS_PROGRAM_PHRASE
= 4, /* Unsupported */
234 FS_INVALIDATE_CACHE
= 8,
240 #define MDM_REG_STAT 0x00
241 #define MDM_REG_CTRL 0x04
242 #define MDM_REG_ID 0xfc
244 #define MDM_STAT_FMEACK (1<<0)
245 #define MDM_STAT_FREADY (1<<1)
246 #define MDM_STAT_SYSSEC (1<<2)
247 #define MDM_STAT_SYSRES (1<<3)
248 #define MDM_STAT_FMEEN (1<<5)
249 #define MDM_STAT_BACKDOOREN (1<<6)
250 #define MDM_STAT_LPEN (1<<7)
251 #define MDM_STAT_VLPEN (1<<8)
252 #define MDM_STAT_LLSMODEXIT (1<<9)
253 #define MDM_STAT_VLLSXMODEXIT (1<<10)
254 #define MDM_STAT_CORE_HALTED (1<<16)
255 #define MDM_STAT_CORE_SLEEPDEEP (1<<17)
256 #define MDM_STAT_CORESLEEPING (1<<18)
258 #define MDM_CTRL_FMEIP (1<<0)
259 #define MDM_CTRL_DBG_DIS (1<<1)
260 #define MDM_CTRL_DBG_REQ (1<<2)
261 #define MDM_CTRL_SYS_RES_REQ (1<<3)
262 #define MDM_CTRL_CORE_HOLD_RES (1<<4)
263 #define MDM_CTRL_VLLSX_DBG_REQ (1<<5)
264 #define MDM_CTRL_VLLSX_DBG_ACK (1<<6)
265 #define MDM_CTRL_VLLSX_STAT_ACK (1<<7)
267 #define MDM_ACCESS_TIMEOUT 500 /* msec */
270 static bool allow_fcf_writes
;
271 static uint8_t fcf_fopt
= 0xff;
274 struct flash_driver kinetis_flash
;
275 static int kinetis_write_inner(struct flash_bank
*bank
, const uint8_t *buffer
,
276 uint32_t offset
, uint32_t count
);
277 static int kinetis_auto_probe(struct flash_bank
*bank
);
280 static int kinetis_mdm_write_register(struct adiv5_dap
*dap
, unsigned reg
, uint32_t value
)
283 LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32
, reg
, value
);
285 retval
= dap_queue_ap_write(dap_ap(dap
, MDM_AP
), reg
, value
);
286 if (retval
!= ERROR_OK
) {
287 LOG_DEBUG("MDM: failed to queue a write request");
291 retval
= dap_run(dap
);
292 if (retval
!= ERROR_OK
) {
293 LOG_DEBUG("MDM: dap_run failed");
301 static int kinetis_mdm_read_register(struct adiv5_dap
*dap
, unsigned reg
, uint32_t *result
)
305 retval
= dap_queue_ap_read(dap_ap(dap
, MDM_AP
), reg
, result
);
306 if (retval
!= ERROR_OK
) {
307 LOG_DEBUG("MDM: failed to queue a read request");
311 retval
= dap_run(dap
);
312 if (retval
!= ERROR_OK
) {
313 LOG_DEBUG("MDM: dap_run failed");
317 LOG_DEBUG("MDM_REG[0x%02x]: %08" PRIX32
, reg
, *result
);
321 static int kinetis_mdm_poll_register(struct adiv5_dap
*dap
, unsigned reg
,
322 uint32_t mask
, uint32_t value
, uint32_t timeout_ms
)
326 int64_t ms_timeout
= timeval_ms() + timeout_ms
;
329 retval
= kinetis_mdm_read_register(dap
, reg
, &val
);
330 if (retval
!= ERROR_OK
|| (val
& mask
) == value
)
334 } while (timeval_ms() < ms_timeout
);
336 LOG_DEBUG("MDM: polling timed out");
341 * This command can be used to break a watchdog reset loop when
342 * connecting to an unsecured target. Unlike other commands, halt will
343 * automatically retry as it does not know how far into the boot process
344 * it is when the command is called.
346 COMMAND_HANDLER(kinetis_mdm_halt
)
348 struct target
*target
= get_current_target(CMD_CTX
);
349 struct cortex_m_common
*cortex_m
= target_to_cm(target
);
350 struct adiv5_dap
*dap
= cortex_m
->armv7m
.arm
.dap
;
354 int64_t ms_timeout
= timeval_ms() + MDM_ACCESS_TIMEOUT
;
357 LOG_ERROR("Cannot perform halt with a high-level adapter");
364 kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, MDM_CTRL_CORE_HOLD_RES
);
368 retval
= kinetis_mdm_read_register(dap
, MDM_REG_STAT
, &stat
);
369 if (retval
!= ERROR_OK
) {
370 LOG_DEBUG("MDM: failed to read MDM_REG_STAT");
374 /* Repeat setting MDM_CTRL_CORE_HOLD_RES until system is out of
375 * reset with flash ready and without security
377 if ((stat
& (MDM_STAT_FREADY
| MDM_STAT_SYSSEC
| MDM_STAT_SYSRES
))
378 == (MDM_STAT_FREADY
| MDM_STAT_SYSRES
))
381 if (timeval_ms() >= ms_timeout
) {
382 LOG_ERROR("MDM: halt timed out");
387 LOG_DEBUG("MDM: halt succeded after %d attempts.", tries
);
390 /* enable polling in case kinetis_check_flash_security_status disabled it */
391 jtag_poll_set_enabled(true);
395 target
->reset_halt
= true;
396 target
->type
->assert_reset(target
);
398 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, 0);
399 if (retval
!= ERROR_OK
) {
400 LOG_ERROR("MDM: failed to clear MDM_REG_CTRL");
404 target
->type
->deassert_reset(target
);
409 COMMAND_HANDLER(kinetis_mdm_reset
)
411 struct target
*target
= get_current_target(CMD_CTX
);
412 struct cortex_m_common
*cortex_m
= target_to_cm(target
);
413 struct adiv5_dap
*dap
= cortex_m
->armv7m
.arm
.dap
;
417 LOG_ERROR("Cannot perform reset with a high-level adapter");
421 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, MDM_CTRL_SYS_RES_REQ
);
422 if (retval
!= ERROR_OK
) {
423 LOG_ERROR("MDM: failed to write MDM_REG_CTRL");
427 retval
= kinetis_mdm_poll_register(dap
, MDM_REG_STAT
, MDM_STAT_SYSRES
, 0, 500);
428 if (retval
!= ERROR_OK
) {
429 LOG_ERROR("MDM: failed to assert reset");
433 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, 0);
434 if (retval
!= ERROR_OK
) {
435 LOG_ERROR("MDM: failed to clear MDM_REG_CTRL");
443 * This function implements the procedure to mass erase the flash via
444 * SWD/JTAG on Kinetis K and L series of devices as it is described in
445 * AN4835 "Production Flash Programming Best Practices for Kinetis K-
446 * and L-series MCUs" Section 4.2.1. To prevent a watchdog reset loop,
447 * the core remains halted after this function completes as suggested
448 * by the application note.
450 COMMAND_HANDLER(kinetis_mdm_mass_erase
)
452 struct target
*target
= get_current_target(CMD_CTX
);
453 struct cortex_m_common
*cortex_m
= target_to_cm(target
);
454 struct adiv5_dap
*dap
= cortex_m
->armv7m
.arm
.dap
;
457 LOG_ERROR("Cannot perform mass erase with a high-level adapter");
464 * ... Power on the processor, or if power has already been
465 * applied, assert the RESET pin to reset the processor. For
466 * devices that do not have a RESET pin, write the System
467 * Reset Request bit in the MDM-AP control register after
468 * establishing communication...
471 /* assert SRST if configured */
472 bool has_srst
= jtag_get_reset_config() & RESET_HAS_SRST
;
474 adapter_assert_reset();
476 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, MDM_CTRL_SYS_RES_REQ
);
477 if (retval
!= ERROR_OK
&& !has_srst
) {
478 LOG_ERROR("MDM: failed to assert reset");
479 goto deassert_reset_and_exit
;
483 * ... Read the MDM-AP status register repeatedly and wait for
484 * stable conditions suitable for mass erase:
485 * - mass erase is enabled
487 * - reset is finished
489 * Mass erase is started as soon as all conditions are met in 32
490 * subsequent status reads.
492 * In case of not stable conditions (RESET/WDOG loop in secured device)
493 * the user is asked for manual pressing of RESET button
496 int cnt_mass_erase_disabled
= 0;
498 int64_t ms_start
= timeval_ms();
499 bool man_reset_requested
= false;
503 int64_t ms_elapsed
= timeval_ms() - ms_start
;
505 if (!man_reset_requested
&& ms_elapsed
> 100) {
506 LOG_INFO("MDM: Press RESET button now if possible.");
507 man_reset_requested
= true;
510 if (ms_elapsed
> 3000) {
511 LOG_ERROR("MDM: waiting for mass erase conditions timed out.");
512 LOG_INFO("Mass erase of a secured MCU is not possible without hardware reset.");
513 LOG_INFO("Connect SRST, use 'reset_config srst_only' and retry.");
514 goto deassert_reset_and_exit
;
516 retval
= kinetis_mdm_read_register(dap
, MDM_REG_STAT
, &stat
);
517 if (retval
!= ERROR_OK
) {
522 if (!(stat
& MDM_STAT_FMEEN
)) {
524 cnt_mass_erase_disabled
++;
525 if (cnt_mass_erase_disabled
> 10) {
526 LOG_ERROR("MDM: mass erase is disabled");
527 goto deassert_reset_and_exit
;
532 if ((stat
& (MDM_STAT_FREADY
| MDM_STAT_SYSRES
)) == MDM_STAT_FREADY
)
537 } while (cnt_ready
< 32);
540 * ... Write the MDM-AP control register to set the Flash Mass
541 * Erase in Progress bit. This will start the mass erase
544 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, MDM_CTRL_SYS_RES_REQ
| MDM_CTRL_FMEIP
);
545 if (retval
!= ERROR_OK
) {
546 LOG_ERROR("MDM: failed to start mass erase");
547 goto deassert_reset_and_exit
;
551 * ... Read the MDM-AP control register until the Flash Mass
552 * Erase in Progress bit clears...
553 * Data sheed defines erase time <3.6 sec/512kB flash block.
554 * The biggest device has 4 pflash blocks => timeout 16 sec.
556 retval
= kinetis_mdm_poll_register(dap
, MDM_REG_CTRL
, MDM_CTRL_FMEIP
, 0, 16000);
557 if (retval
!= ERROR_OK
) {
558 LOG_ERROR("MDM: mass erase timeout");
559 goto deassert_reset_and_exit
;
563 /* enable polling in case kinetis_check_flash_security_status disabled it */
564 jtag_poll_set_enabled(true);
568 target
->reset_halt
= true;
569 target
->type
->assert_reset(target
);
572 * ... Negate the RESET signal or clear the System Reset Request
573 * bit in the MDM-AP control register.
575 retval
= kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, 0);
576 if (retval
!= ERROR_OK
)
577 LOG_ERROR("MDM: failed to clear MDM_REG_CTRL");
579 target
->type
->deassert_reset(target
);
583 deassert_reset_and_exit
:
584 kinetis_mdm_write_register(dap
, MDM_REG_CTRL
, 0);
586 adapter_deassert_reset();
590 static const uint32_t kinetis_known_mdm_ids
[] = {
591 0x001C0000, /* Kinetis-K Series */
592 0x001C0020, /* Kinetis-L/M/V/E Series */
596 * This function implements the procedure to connect to
597 * SWD/JTAG on Kinetis K and L series of devices as it is described in
598 * AN4835 "Production Flash Programming Best Practices for Kinetis K-
599 * and L-series MCUs" Section 4.1.1
601 COMMAND_HANDLER(kinetis_check_flash_security_status
)
603 struct target
*target
= get_current_target(CMD_CTX
);
604 struct cortex_m_common
*cortex_m
= target_to_cm(target
);
605 struct adiv5_dap
*dap
= cortex_m
->armv7m
.arm
.dap
;
608 LOG_WARNING("Cannot check flash security status with a high-level adapter");
616 * ... The MDM-AP ID register can be read to verify that the
617 * connection is working correctly...
619 retval
= kinetis_mdm_read_register(dap
, MDM_REG_ID
, &val
);
620 if (retval
!= ERROR_OK
) {
621 LOG_ERROR("MDM: failed to read ID register");
629 for (size_t i
= 0; i
< ARRAY_SIZE(kinetis_known_mdm_ids
); i
++) {
630 if (val
== kinetis_known_mdm_ids
[i
]) {
637 LOG_WARNING("MDM: unknown ID %08" PRIX32
, val
);
640 * ... Read the System Security bit to determine if security is enabled.
641 * If System Security = 0, then proceed. If System Security = 1, then
642 * communication with the internals of the processor, including the
643 * flash, will not be possible without issuing a mass erase command or
644 * unsecuring the part through other means (backdoor key unlock)...
646 retval
= kinetis_mdm_read_register(dap
, MDM_REG_STAT
, &val
);
647 if (retval
!= ERROR_OK
) {
648 LOG_ERROR("MDM: failed to read MDM_REG_STAT");
653 * System Security bit is also active for short time during reset.
654 * If a MCU has blank flash and runs in RESET/WDOG loop,
655 * System Security bit is active most of time!
656 * We should observe Flash Ready bit and read status several times
657 * to avoid false detection of secured MCU
659 int secured_score
= 0, flash_not_ready_score
= 0;
661 if ((val
& (MDM_STAT_SYSSEC
| MDM_STAT_FREADY
)) != MDM_STAT_FREADY
) {
665 for (i
= 0; i
< 32; i
++) {
666 stats
[i
] = MDM_STAT_FREADY
;
667 dap_queue_ap_read(dap_ap(dap
, MDM_AP
), MDM_REG_STAT
, &stats
[i
]);
669 retval
= dap_run(dap
);
670 if (retval
!= ERROR_OK
) {
671 LOG_DEBUG("MDM: dap_run failed when validating secured state");
674 for (i
= 0; i
< 32; i
++) {
675 if (stats
[i
] & MDM_STAT_SYSSEC
)
677 if (!(stats
[i
] & MDM_STAT_FREADY
))
678 flash_not_ready_score
++;
682 if (flash_not_ready_score
<= 8 && secured_score
> 24) {
683 jtag_poll_set_enabled(false);
685 LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
686 LOG_WARNING("**** ****");
687 LOG_WARNING("**** Your Kinetis MCU is in secured state, which means that, ****");
688 LOG_WARNING("**** with exception for very basic communication, JTAG/SWD ****");
689 LOG_WARNING("**** interface will NOT work. In order to restore its ****");
690 LOG_WARNING("**** functionality please issue 'kinetis mdm mass_erase' ****");
691 LOG_WARNING("**** command, power cycle the MCU and restart OpenOCD. ****");
692 LOG_WARNING("**** ****");
693 LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
695 } else if (flash_not_ready_score
> 24) {
696 jtag_poll_set_enabled(false);
697 LOG_WARNING("**** Your Kinetis MCU is probably locked-up in RESET/WDOG loop. ****");
698 LOG_WARNING("**** Common reason is a blank flash (at least a reset vector). ****");
699 LOG_WARNING("**** Issue 'kinetis mdm halt' command or if SRST is connected ****");
700 LOG_WARNING("**** and configured, use 'reset halt' ****");
701 LOG_WARNING("**** If MCU cannot be halted, it is likely secured and running ****");
702 LOG_WARNING("**** in RESET/WDOG loop. Issue 'kinetis mdm mass_erase' ****");
705 LOG_INFO("MDM: Chip is unsecured. Continuing.");
706 jtag_poll_set_enabled(true);
712 FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command
)
714 struct kinetis_flash_bank
*bank_info
;
717 return ERROR_COMMAND_SYNTAX_ERROR
;
719 LOG_INFO("add flash_bank kinetis %s", bank
->name
);
721 bank_info
= malloc(sizeof(struct kinetis_flash_bank
));
723 memset(bank_info
, 0, sizeof(struct kinetis_flash_bank
));
725 bank
->driver_priv
= bank_info
;
730 /* Disable the watchdog on Kinetis devices */
731 int kinetis_disable_wdog(struct target
*target
, uint32_t sim_sdid
)
733 struct working_area
*wdog_algorithm
;
734 struct armv7m_algorithm armv7m_info
;
738 static const uint8_t kinetis_unlock_wdog_code
[] = {
739 #include "../../../contrib/loaders/watchdog/armv7m_kinetis_wdog.inc"
742 /* Decide whether the connected device needs watchdog disabling.
743 * Disable for all Kx and KVx devices, return if it is a KLx */
745 if ((sim_sdid
& KINETIS_SDID_SERIESID_MASK
) == KINETIS_SDID_SERIESID_KL
)
748 /* The connected device requires watchdog disabling. */
749 retval
= target_read_u16(target
, WDOG_STCTRH
, &wdog
);
750 if (retval
!= ERROR_OK
)
753 if ((wdog
& 0x1) == 0) {
754 /* watchdog already disabled */
757 LOG_INFO("Disabling Kinetis watchdog (initial WDOG_STCTRLH = 0x%x)", wdog
);
759 if (target
->state
!= TARGET_HALTED
) {
760 LOG_ERROR("Target not halted");
761 return ERROR_TARGET_NOT_HALTED
;
764 retval
= target_alloc_working_area(target
, sizeof(kinetis_unlock_wdog_code
), &wdog_algorithm
);
765 if (retval
!= ERROR_OK
)
768 retval
= target_write_buffer(target
, wdog_algorithm
->address
,
769 sizeof(kinetis_unlock_wdog_code
), (uint8_t *)kinetis_unlock_wdog_code
);
770 if (retval
!= ERROR_OK
) {
771 target_free_working_area(target
, wdog_algorithm
);
775 armv7m_info
.common_magic
= ARMV7M_COMMON_MAGIC
;
776 armv7m_info
.core_mode
= ARM_MODE_THREAD
;
778 retval
= target_run_algorithm(target
, 0, NULL
, 0, NULL
, wdog_algorithm
->address
,
779 wdog_algorithm
->address
+ (sizeof(kinetis_unlock_wdog_code
) - 2),
780 10000, &armv7m_info
);
782 if (retval
!= ERROR_OK
)
783 LOG_ERROR("error executing kinetis wdog unlock algorithm");
785 retval
= target_read_u16(target
, WDOG_STCTRH
, &wdog
);
786 if (retval
!= ERROR_OK
)
788 LOG_INFO("WDOG_STCTRLH = 0x%x", wdog
);
790 target_free_working_area(target
, wdog_algorithm
);
795 COMMAND_HANDLER(kinetis_disable_wdog_handler
)
799 struct target
*target
= get_current_target(CMD_CTX
);
802 return ERROR_COMMAND_SYNTAX_ERROR
;
804 result
= target_read_u32(target
, SIM_SDID
, &sim_sdid
);
805 if (result
!= ERROR_OK
) {
806 LOG_ERROR("Failed to read SIMSDID");
810 result
= kinetis_disable_wdog(target
, sim_sdid
);
815 static int kinetis_ftfx_decode_error(uint8_t fstat
)
818 LOG_ERROR("Flash operation failed, illegal command");
819 return ERROR_FLASH_OPER_UNSUPPORTED
;
821 } else if (fstat
& 0x10)
822 LOG_ERROR("Flash operation failed, protection violated");
824 else if (fstat
& 0x40)
825 LOG_ERROR("Flash operation failed, read collision");
827 else if (fstat
& 0x80)
831 LOG_ERROR("Flash operation timed out");
833 return ERROR_FLASH_OPERATION_FAILED
;
837 static int kinetis_ftfx_prepare(struct target
*target
)
842 /* wait until busy */
843 for (i
= 0; i
< 50; i
++) {
844 result
= target_read_u8(target
, FTFx_FSTAT
, &fstat
);
845 if (result
!= ERROR_OK
)
852 if ((fstat
& 0x80) == 0) {
853 LOG_ERROR("Flash controller is busy");
854 return ERROR_FLASH_OPERATION_FAILED
;
857 /* reset error flags */
858 result
= target_write_u8(target
, FTFx_FSTAT
, 0x70);
863 /* Kinetis Program-LongWord Microcodes */
864 static const uint8_t kinetis_flash_write_code
[] = {
866 * r0 - workarea buffer
867 * r1 - target address
877 /* for(register uint32_t i=0;i<wcount;i++){ */
878 0x04, 0x1C, /* mov r4, r0 */
879 0x00, 0x23, /* mov r3, #0 */
881 0x0E, 0x1A, /* sub r6, r1, r0 */
882 0xA6, 0x19, /* add r6, r4, r6 */
883 0x93, 0x42, /* cmp r3, r2 */
884 0x16, 0xD0, /* beq .L9 */
886 /* while((FTFx_FSTAT&FTFA_FSTAT_CCIF_MASK) != FTFA_FSTAT_CCIF_MASK){}; */
887 0x0B, 0x4D, /* ldr r5, .L10 */
888 0x2F, 0x78, /* ldrb r7, [r5] */
889 0x7F, 0xB2, /* sxtb r7, r7 */
890 0x00, 0x2F, /* cmp r7, #0 */
891 0xFA, 0xDA, /* bge .L5 */
892 /* FTFx_FSTAT = FTFA_FSTAT_ACCERR_MASK|FTFA_FSTAT_FPVIOL_MASK|FTFA_FSTAT_RDCO */
893 0x70, 0x27, /* mov r7, #112 */
894 0x2F, 0x70, /* strb r7, [r5] */
895 /* FTFx_FCCOB3 = faddr; */
896 0x09, 0x4F, /* ldr r7, .L10+4 */
897 0x3E, 0x60, /* str r6, [r7] */
898 0x06, 0x27, /* mov r7, #6 */
899 /* FTFx_FCCOB0 = 0x06; */
900 0x08, 0x4E, /* ldr r6, .L10+8 */
901 0x37, 0x70, /* strb r7, [r6] */
902 /* FTFx_FCCOB7 = *pLW; */
903 0x80, 0xCC, /* ldmia r4!, {r7} */
904 0x08, 0x4E, /* ldr r6, .L10+12 */
905 0x37, 0x60, /* str r7, [r6] */
906 /* FTFx_FSTAT = FTFA_FSTAT_CCIF_MASK; */
907 0x80, 0x27, /* mov r7, #128 */
908 0x2F, 0x70, /* strb r7, [r5] */
910 /* while((FTFx_FSTAT&FTFA_FSTAT_CCIF_MASK) != FTFA_FSTAT_CCIF_MASK){}; */
911 0x2E, 0x78, /* ldrb r6, [r5] */
912 0x77, 0xB2, /* sxtb r7, r6 */
913 0x00, 0x2F, /* cmp r7, #0 */
914 0xFB, 0xDA, /* bge .L4 */
915 0x01, 0x33, /* add r3, r3, #1 */
916 0xE4, 0xE7, /* b .L2 */
918 0x00, 0xBE, /* bkpt #0 */
920 0x00, 0x00, 0x02, 0x40, /* .word 1073872896 */
921 0x04, 0x00, 0x02, 0x40, /* .word 1073872900 */
922 0x07, 0x00, 0x02, 0x40, /* .word 1073872903 */
923 0x08, 0x00, 0x02, 0x40, /* .word 1073872904 */
926 /* Program LongWord Block Write */
927 static int kinetis_write_block(struct flash_bank
*bank
, const uint8_t *buffer
,
928 uint32_t offset
, uint32_t wcount
)
930 struct target
*target
= bank
->target
;
931 uint32_t buffer_size
= 2048; /* Default minimum value */
932 struct working_area
*write_algorithm
;
933 struct working_area
*source
;
934 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
935 uint32_t address
= kinfo
->prog_base
+ offset
;
936 struct reg_param reg_params
[3];
937 struct armv7m_algorithm armv7m_info
;
938 int retval
= ERROR_OK
;
941 * r0 - workarea buffer
942 * r1 - target address
951 /* Increase buffer_size if needed */
952 if (buffer_size
< (target
->working_area_size
/2))
953 buffer_size
= (target
->working_area_size
/2);
955 /* allocate working area with flash programming code */
956 if (target_alloc_working_area(target
, sizeof(kinetis_flash_write_code
),
957 &write_algorithm
) != ERROR_OK
) {
958 LOG_WARNING("no working area available, can't do block memory writes");
959 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
962 retval
= target_write_buffer(target
, write_algorithm
->address
,
963 sizeof(kinetis_flash_write_code
), kinetis_flash_write_code
);
964 if (retval
!= ERROR_OK
)
968 while (target_alloc_working_area(target
, buffer_size
, &source
) != ERROR_OK
) {
970 if (buffer_size
<= 256) {
971 /* free working area, write algorithm already allocated */
972 target_free_working_area(target
, write_algorithm
);
974 LOG_WARNING("No large enough working area available, can't do block memory writes");
975 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
979 armv7m_info
.common_magic
= ARMV7M_COMMON_MAGIC
;
980 armv7m_info
.core_mode
= ARM_MODE_THREAD
;
982 init_reg_param(®_params
[0], "r0", 32, PARAM_OUT
); /* *pLW (*buffer) */
983 init_reg_param(®_params
[1], "r1", 32, PARAM_OUT
); /* faddr */
984 init_reg_param(®_params
[2], "r2", 32, PARAM_OUT
); /* number of words to program */
986 /* write code buffer and use Flash programming code within kinetis */
987 /* Set breakpoint to 0 with time-out of 1000 ms */
989 uint32_t thisrun_count
= (wcount
> (buffer_size
/ 4)) ? (buffer_size
/ 4) : wcount
;
991 retval
= target_write_buffer(target
, source
->address
, thisrun_count
* 4, buffer
);
992 if (retval
!= ERROR_OK
)
995 buf_set_u32(reg_params
[0].value
, 0, 32, source
->address
);
996 buf_set_u32(reg_params
[1].value
, 0, 32, address
);
997 buf_set_u32(reg_params
[2].value
, 0, 32, thisrun_count
);
999 retval
= target_run_algorithm(target
, 0, NULL
, 3, reg_params
,
1000 write_algorithm
->address
, 0, 100000, &armv7m_info
);
1001 if (retval
!= ERROR_OK
) {
1002 LOG_ERROR("Error executing kinetis Flash programming algorithm");
1003 retval
= ERROR_FLASH_OPERATION_FAILED
;
1007 buffer
+= thisrun_count
* 4;
1008 address
+= thisrun_count
* 4;
1009 wcount
-= thisrun_count
;
1012 target_free_working_area(target
, source
);
1013 target_free_working_area(target
, write_algorithm
);
1015 destroy_reg_param(®_params
[0]);
1016 destroy_reg_param(®_params
[1]);
1017 destroy_reg_param(®_params
[2]);
1022 static int kinetis_protect(struct flash_bank
*bank
, int set
, int first
, int last
)
1026 if (allow_fcf_writes
) {
1027 LOG_ERROR("Protection setting is possible with 'kinetis fcf_source protection' only!");
1031 if (!bank
->prot_blocks
|| bank
->num_prot_blocks
== 0) {
1032 LOG_ERROR("No protection possible for current bank!");
1033 return ERROR_FLASH_BANK_INVALID
;
1036 for (i
= first
; i
< bank
->num_prot_blocks
&& i
<= last
; i
++)
1037 bank
->prot_blocks
[i
].is_protected
= set
;
1039 LOG_INFO("Protection bits will be written at the next FCF sector erase or write.");
1040 LOG_INFO("Do not issue 'flash info' command until protection is written,");
1041 LOG_INFO("doing so would re-read protection status from MCU.");
1046 static int kinetis_protect_check(struct flash_bank
*bank
)
1048 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1053 if (kinfo
->flash_class
== FC_PFLASH
) {
1055 /* read protection register */
1056 result
= target_read_u32(bank
->target
, FTFx_FPROT3
, &fprot
);
1057 if (result
!= ERROR_OK
)
1060 /* Every bit protects 1/32 of the full flash (not necessarily just this bank) */
1062 } else if (kinfo
->flash_class
== FC_FLEX_NVM
) {
1065 /* read protection register */
1066 result
= target_read_u8(bank
->target
, FTFx_FDPROT
, &fdprot
);
1067 if (result
!= ERROR_OK
)
1073 LOG_ERROR("Protection checks for FlexRAM not supported");
1074 return ERROR_FLASH_BANK_INVALID
;
1077 b
= kinfo
->protection_block
;
1078 for (i
= 0; i
< bank
->num_prot_blocks
; i
++) {
1079 if ((fprot
>> b
) & 1)
1080 bank
->prot_blocks
[i
].is_protected
= 0;
1082 bank
->prot_blocks
[i
].is_protected
= 1;
1091 static int kinetis_fill_fcf(struct flash_bank
*bank
, uint8_t *fcf
)
1093 uint32_t fprot
= 0xffffffff;
1094 uint8_t fsec
= 0xfe; /* set MCU unsecure */
1095 uint8_t fdprot
= 0xff;
1097 uint32_t pflash_bit
;
1099 struct flash_bank
*bank_iter
;
1100 struct kinetis_flash_bank
*kinfo
;
1102 memset(fcf
, 0xff, FCF_SIZE
);
1107 /* iterate over all kinetis banks */
1108 /* current bank is bank 0, it contains FCF */
1109 for (bank_iter
= bank
; bank_iter
; bank_iter
= bank_iter
->next
) {
1110 if (bank_iter
->driver
!= &kinetis_flash
1111 || bank_iter
->target
!= bank
->target
)
1114 kinetis_auto_probe(bank_iter
);
1116 kinfo
= bank
->driver_priv
;
1120 if (kinfo
->flash_class
== FC_PFLASH
) {
1121 for (i
= 0; i
< bank_iter
->num_prot_blocks
; i
++) {
1122 if (bank_iter
->prot_blocks
[i
].is_protected
== 1)
1123 fprot
&= ~pflash_bit
;
1128 } else if (kinfo
->flash_class
== FC_FLEX_NVM
) {
1129 for (i
= 0; i
< bank_iter
->num_prot_blocks
; i
++) {
1130 if (bank_iter
->prot_blocks
[i
].is_protected
== 1)
1131 fdprot
&= ~dflash_bit
;
1139 target_buffer_set_u32(bank
->target
, fcf
+ FCF_FPROT
, fprot
);
1140 fcf
[FCF_FSEC
] = fsec
;
1141 fcf
[FCF_FOPT
] = fcf_fopt
;
1142 fcf
[FCF_FDPROT
] = fdprot
;
1146 static int kinetis_ftfx_command(struct target
*target
, uint8_t fcmd
, uint32_t faddr
,
1147 uint8_t fccob4
, uint8_t fccob5
, uint8_t fccob6
, uint8_t fccob7
,
1148 uint8_t fccob8
, uint8_t fccob9
, uint8_t fccoba
, uint8_t fccobb
,
1149 uint8_t *ftfx_fstat
)
1151 uint8_t command
[12] = {faddr
& 0xff, (faddr
>> 8) & 0xff, (faddr
>> 16) & 0xff, fcmd
,
1152 fccob7
, fccob6
, fccob5
, fccob4
,
1153 fccobb
, fccoba
, fccob9
, fccob8
};
1156 int64_t ms_timeout
= timeval_ms() + 250;
1158 result
= target_write_memory(target
, FTFx_FCCOB3
, 4, 3, command
);
1159 if (result
!= ERROR_OK
)
1163 result
= target_write_u8(target
, FTFx_FSTAT
, 0x80);
1164 if (result
!= ERROR_OK
)
1169 result
= target_read_u8(target
, FTFx_FSTAT
, &fstat
);
1171 if (result
!= ERROR_OK
)
1177 } while (timeval_ms() < ms_timeout
);
1180 *ftfx_fstat
= fstat
;
1182 if ((fstat
& 0xf0) != 0x80) {
1183 LOG_DEBUG("ftfx command failed FSTAT: %02X FCCOB: %02X%02X%02X%02X %02X%02X%02X%02X %02X%02X%02X%02X",
1184 fstat
, command
[3], command
[2], command
[1], command
[0],
1185 command
[7], command
[6], command
[5], command
[4],
1186 command
[11], command
[10], command
[9], command
[8]);
1188 return kinetis_ftfx_decode_error(fstat
);
1195 static int kinetis_check_run_mode(struct target
*target
)
1198 uint8_t pmctrl
, pmstat
;
1200 if (target
->state
!= TARGET_HALTED
) {
1201 LOG_ERROR("Target not halted");
1202 return ERROR_TARGET_NOT_HALTED
;
1205 result
= target_read_u8(target
, SMC_PMSTAT
, &pmstat
);
1206 if (result
!= ERROR_OK
)
1209 if (pmstat
== PM_STAT_RUN
)
1212 if (pmstat
== PM_STAT_VLPR
) {
1213 /* It is safe to switch from VLPR to RUN mode without changing clock */
1214 LOG_INFO("Switching from VLPR to RUN mode.");
1215 pmctrl
= PM_CTRL_RUNM_RUN
;
1216 result
= target_write_u8(target
, SMC_PMCTRL
, pmctrl
);
1217 if (result
!= ERROR_OK
)
1220 for (i
= 100; i
; i
--) {
1221 result
= target_read_u8(target
, SMC_PMSTAT
, &pmstat
);
1222 if (result
!= ERROR_OK
)
1225 if (pmstat
== PM_STAT_RUN
)
1230 LOG_ERROR("Flash operation not possible in current run mode: SMC_PMSTAT: 0x%x", pmstat
);
1231 LOG_ERROR("Issue a 'reset init' command.");
1232 return ERROR_TARGET_NOT_HALTED
;
1236 static void kinetis_invalidate_flash_cache(struct flash_bank
*bank
)
1238 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1239 uint8_t pfb01cr_byte2
= 0xf0;
1241 if (!(kinfo
->flash_support
& FS_INVALIDATE_CACHE
))
1244 target_write_memory(bank
->target
, FMC_PFB01CR
+ 2, 1, 1, &pfb01cr_byte2
);
1249 static int kinetis_erase(struct flash_bank
*bank
, int first
, int last
)
1252 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1254 result
= kinetis_check_run_mode(bank
->target
);
1255 if (result
!= ERROR_OK
)
1258 /* reset error flags */
1259 result
= kinetis_ftfx_prepare(bank
->target
);
1260 if (result
!= ERROR_OK
)
1263 if ((first
> bank
->num_sectors
) || (last
> bank
->num_sectors
))
1264 return ERROR_FLASH_OPERATION_FAILED
;
1267 * FIXME: TODO: use the 'Erase Flash Block' command if the
1268 * requested erase is PFlash or NVM and encompasses the entire
1269 * block. Should be quicker.
1271 for (i
= first
; i
<= last
; i
++) {
1272 /* set command and sector address */
1273 result
= kinetis_ftfx_command(bank
->target
, FTFx_CMD_SECTERASE
, kinfo
->prog_base
+ bank
->sectors
[i
].offset
,
1274 0, 0, 0, 0, 0, 0, 0, 0, NULL
);
1276 if (result
!= ERROR_OK
) {
1277 LOG_WARNING("erase sector %d failed", i
);
1278 return ERROR_FLASH_OPERATION_FAILED
;
1281 bank
->sectors
[i
].is_erased
= 1;
1284 && bank
->sectors
[i
].offset
<= FCF_ADDRESS
1285 && bank
->sectors
[i
].offset
+ bank
->sectors
[i
].size
> FCF_ADDRESS
+ FCF_SIZE
) {
1286 if (allow_fcf_writes
) {
1287 LOG_WARNING("Flash Configuration Field erased, DO NOT reset or power off the device");
1288 LOG_WARNING("until correct FCF is programmed or MCU gets security lock.");
1290 uint8_t fcf_buffer
[FCF_SIZE
];
1292 kinetis_fill_fcf(bank
, fcf_buffer
);
1293 result
= kinetis_write_inner(bank
, fcf_buffer
, FCF_ADDRESS
, FCF_SIZE
);
1294 if (result
!= ERROR_OK
)
1295 LOG_WARNING("Flash Configuration Field write failed");
1296 bank
->sectors
[i
].is_erased
= 0;
1301 kinetis_invalidate_flash_cache(bank
);
1306 static int kinetis_make_ram_ready(struct target
*target
)
1311 /* check if ram ready */
1312 result
= target_read_u8(target
, FTFx_FCNFG
, &ftfx_fcnfg
);
1313 if (result
!= ERROR_OK
)
1316 if (ftfx_fcnfg
& (1 << 1))
1317 return ERROR_OK
; /* ram ready */
1319 /* make flex ram available */
1320 result
= kinetis_ftfx_command(target
, FTFx_CMD_SETFLEXRAM
, 0x00ff0000,
1321 0, 0, 0, 0, 0, 0, 0, 0, NULL
);
1322 if (result
!= ERROR_OK
)
1323 return ERROR_FLASH_OPERATION_FAILED
;
1326 result
= target_read_u8(target
, FTFx_FCNFG
, &ftfx_fcnfg
);
1327 if (result
!= ERROR_OK
)
1330 if (ftfx_fcnfg
& (1 << 1))
1331 return ERROR_OK
; /* ram ready */
1333 return ERROR_FLASH_OPERATION_FAILED
;
1337 static int kinetis_write_sections(struct flash_bank
*bank
, const uint8_t *buffer
,
1338 uint32_t offset
, uint32_t count
)
1341 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1342 uint8_t *buffer_aligned
= NULL
;
1344 * Kinetis uses different terms for the granularity of
1345 * sector writes, e.g. "phrase" or "128 bits". We use
1346 * the generic term "chunk". The largest possible
1347 * Kinetis "chunk" is 16 bytes (128 bits).
1349 uint32_t prog_section_chunk_bytes
= kinfo
->sector_size
>> 8;
1350 uint32_t prog_size_bytes
= kinfo
->max_flash_prog_size
;
1353 uint32_t size
= prog_size_bytes
- offset
% prog_size_bytes
;
1354 uint32_t align_begin
= offset
% prog_section_chunk_bytes
;
1356 uint32_t size_aligned
;
1357 uint16_t chunk_count
;
1363 align_end
= (align_begin
+ size
) % prog_section_chunk_bytes
;
1365 align_end
= prog_section_chunk_bytes
- align_end
;
1367 size_aligned
= align_begin
+ size
+ align_end
;
1368 chunk_count
= size_aligned
/ prog_section_chunk_bytes
;
1370 if (size
!= size_aligned
) {
1371 /* aligned section: the first, the last or the only */
1372 if (!buffer_aligned
)
1373 buffer_aligned
= malloc(prog_size_bytes
);
1375 memset(buffer_aligned
, 0xff, size_aligned
);
1376 memcpy(buffer_aligned
+ align_begin
, buffer
, size
);
1378 result
= target_write_memory(bank
->target
, FLEXRAM
,
1379 4, size_aligned
/ 4, buffer_aligned
);
1381 LOG_DEBUG("section @ %08" PRIx32
" aligned begin %" PRIu32
", end %" PRIu32
,
1382 bank
->base
+ offset
, align_begin
, align_end
);
1384 result
= target_write_memory(bank
->target
, FLEXRAM
,
1385 4, size_aligned
/ 4, buffer
);
1387 LOG_DEBUG("write section @ %08" PRIx32
" with length %" PRIu32
" bytes",
1388 bank
->base
+ offset
, size
);
1390 if (result
!= ERROR_OK
) {
1391 LOG_ERROR("target_write_memory failed");
1395 /* execute section-write command */
1396 result
= kinetis_ftfx_command(bank
->target
, FTFx_CMD_SECTWRITE
,
1397 kinfo
->prog_base
+ offset
- align_begin
,
1398 chunk_count
>>8, chunk_count
, 0, 0,
1399 0, 0, 0, 0, &ftfx_fstat
);
1401 if (result
!= ERROR_OK
) {
1402 LOG_ERROR("Error writing section at %08" PRIx32
, bank
->base
+ offset
);
1406 if (ftfx_fstat
& 0x01)
1407 LOG_ERROR("Flash write error at %08" PRIx32
, bank
->base
+ offset
);
1414 free(buffer_aligned
);
1419 static int kinetis_write_inner(struct flash_bank
*bank
, const uint8_t *buffer
,
1420 uint32_t offset
, uint32_t count
)
1422 int result
, fallback
= 0;
1423 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1425 if (!(kinfo
->flash_support
& FS_PROGRAM_SECTOR
)) {
1426 /* fallback to longword write */
1428 LOG_WARNING("This device supports Program Longword execution only.");
1430 result
= kinetis_make_ram_ready(bank
->target
);
1431 if (result
!= ERROR_OK
) {
1433 LOG_WARNING("FlexRAM not ready, fallback to slow longword write.");
1437 LOG_DEBUG("flash write @08%" PRIx32
, bank
->base
+ offset
);
1439 if (fallback
== 0) {
1440 /* program section command */
1441 kinetis_write_sections(bank
, buffer
, offset
, count
);
1443 else if (kinfo
->flash_support
& FS_PROGRAM_LONGWORD
) {
1444 /* program longword command, not supported in FTFE */
1445 uint8_t *new_buffer
= NULL
;
1447 /* check word alignment */
1449 LOG_ERROR("offset 0x%" PRIx32
" breaks the required alignment", offset
);
1450 return ERROR_FLASH_DST_BREAKS_ALIGNMENT
;
1454 uint32_t old_count
= count
;
1455 count
= (old_count
| 3) + 1;
1456 new_buffer
= malloc(count
);
1457 if (new_buffer
== NULL
) {
1458 LOG_ERROR("odd number of bytes to write and no memory "
1459 "for padding buffer");
1462 LOG_INFO("odd number of bytes to write (%" PRIu32
"), extending to %" PRIu32
" "
1463 "and padding with 0xff", old_count
, count
);
1464 memset(new_buffer
+ old_count
, 0xff, count
- old_count
);
1465 buffer
= memcpy(new_buffer
, buffer
, old_count
);
1468 uint32_t words_remaining
= count
/ 4;
1470 kinetis_disable_wdog(bank
->target
, kinfo
->sim_sdid
);
1472 /* try using a block write */
1473 result
= kinetis_write_block(bank
, buffer
, offset
, words_remaining
);
1475 if (result
== ERROR_TARGET_RESOURCE_NOT_AVAILABLE
) {
1476 /* if block write failed (no sufficient working area),
1477 * we use normal (slow) single word accesses */
1478 LOG_WARNING("couldn't use block writes, falling back to single "
1481 while (words_remaining
) {
1484 LOG_DEBUG("write longword @ %08" PRIx32
, (uint32_t)(bank
->base
+ offset
));
1486 result
= kinetis_ftfx_command(bank
->target
, FTFx_CMD_LWORDPROG
, kinfo
->prog_base
+ offset
,
1487 buffer
[3], buffer
[2], buffer
[1], buffer
[0],
1488 0, 0, 0, 0, &ftfx_fstat
);
1490 if (result
!= ERROR_OK
) {
1491 LOG_ERROR("Error writing longword at %08" PRIx32
, bank
->base
+ offset
);
1495 if (ftfx_fstat
& 0x01)
1496 LOG_ERROR("Flash write error at %08" PRIx32
, bank
->base
+ offset
);
1505 LOG_ERROR("Flash write strategy not implemented");
1506 return ERROR_FLASH_OPERATION_FAILED
;
1509 kinetis_invalidate_flash_cache(bank
);
1514 static int kinetis_write(struct flash_bank
*bank
, const uint8_t *buffer
,
1515 uint32_t offset
, uint32_t count
)
1518 bool set_fcf
= false;
1521 result
= kinetis_check_run_mode(bank
->target
);
1522 if (result
!= ERROR_OK
)
1525 /* reset error flags */
1526 result
= kinetis_ftfx_prepare(bank
->target
);
1527 if (result
!= ERROR_OK
)
1530 if (bank
->base
== 0 && !allow_fcf_writes
) {
1531 if (bank
->sectors
[1].offset
<= FCF_ADDRESS
)
1532 sect
= 1; /* 1kb sector, FCF in 2nd sector */
1534 if (offset
< bank
->sectors
[sect
].offset
+ bank
->sectors
[sect
].size
1535 && offset
+ count
> bank
->sectors
[sect
].offset
)
1536 set_fcf
= true; /* write to any part of sector with FCF */
1540 uint8_t fcf_buffer
[FCF_SIZE
];
1541 uint8_t fcf_current
[FCF_SIZE
];
1543 kinetis_fill_fcf(bank
, fcf_buffer
);
1545 if (offset
< FCF_ADDRESS
) {
1546 /* write part preceding FCF */
1547 result
= kinetis_write_inner(bank
, buffer
, offset
, FCF_ADDRESS
- offset
);
1548 if (result
!= ERROR_OK
)
1552 result
= target_read_memory(bank
->target
, FCF_ADDRESS
, 4, FCF_SIZE
/ 4, fcf_current
);
1553 if (result
== ERROR_OK
&& memcmp(fcf_current
, fcf_buffer
, FCF_SIZE
) == 0)
1557 /* write FCF if differs from flash - eliminate multiple writes */
1558 result
= kinetis_write_inner(bank
, fcf_buffer
, FCF_ADDRESS
, FCF_SIZE
);
1559 if (result
!= ERROR_OK
)
1563 LOG_WARNING("Flash Configuration Field written.");
1564 LOG_WARNING("Reset or power off the device to make settings effective.");
1566 if (offset
+ count
> FCF_ADDRESS
+ FCF_SIZE
) {
1567 uint32_t delta
= FCF_ADDRESS
+ FCF_SIZE
- offset
;
1568 /* write part after FCF */
1569 result
= kinetis_write_inner(bank
, buffer
+ delta
, FCF_ADDRESS
+ FCF_SIZE
, count
- delta
);
1574 /* no FCF fiddling, normal write */
1575 return kinetis_write_inner(bank
, buffer
, offset
, count
);
1579 static int kinetis_probe(struct flash_bank
*bank
)
1582 uint8_t fcfg1_nvmsize
, fcfg1_pfsize
, fcfg1_eesize
, fcfg1_depart
;
1583 uint8_t fcfg2_maxaddr0
, fcfg2_pflsh
, fcfg2_maxaddr1
;
1584 uint32_t nvm_size
= 0, pf_size
= 0, df_size
= 0, ee_size
= 0;
1585 unsigned num_blocks
= 0, num_pflash_blocks
= 0, num_nvm_blocks
= 0, first_nvm_bank
= 0,
1586 pflash_sector_size_bytes
= 0, nvm_sector_size_bytes
= 0;
1587 struct target
*target
= bank
->target
;
1588 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
1590 kinfo
->probed
= false;
1592 result
= target_read_u32(target
, SIM_SDID
, &kinfo
->sim_sdid
);
1593 if (result
!= ERROR_OK
)
1596 if ((kinfo
->sim_sdid
& (~KINETIS_SDID_K_SERIES_MASK
)) == 0) {
1597 /* older K-series MCU */
1598 uint32_t mcu_type
= kinfo
->sim_sdid
& KINETIS_K_SDID_TYPE_MASK
;
1601 case KINETIS_K_SDID_K10_M50
:
1602 case KINETIS_K_SDID_K20_M50
:
1604 pflash_sector_size_bytes
= 1<<10;
1605 nvm_sector_size_bytes
= 1<<10;
1607 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE
;
1609 case KINETIS_K_SDID_K10_M72
:
1610 case KINETIS_K_SDID_K20_M72
:
1611 case KINETIS_K_SDID_K30_M72
:
1612 case KINETIS_K_SDID_K30_M100
:
1613 case KINETIS_K_SDID_K40_M72
:
1614 case KINETIS_K_SDID_K40_M100
:
1615 case KINETIS_K_SDID_K50_M72
:
1616 /* 2kB sectors, 1kB FlexNVM sectors */
1617 pflash_sector_size_bytes
= 2<<10;
1618 nvm_sector_size_bytes
= 1<<10;
1620 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE
;
1621 kinfo
->max_flash_prog_size
= 1<<10;
1623 case KINETIS_K_SDID_K10_M100
:
1624 case KINETIS_K_SDID_K20_M100
:
1625 case KINETIS_K_SDID_K11
:
1626 case KINETIS_K_SDID_K12
:
1627 case KINETIS_K_SDID_K21_M50
:
1628 case KINETIS_K_SDID_K22_M50
:
1629 case KINETIS_K_SDID_K51_M72
:
1630 case KINETIS_K_SDID_K53
:
1631 case KINETIS_K_SDID_K60_M100
:
1633 pflash_sector_size_bytes
= 2<<10;
1634 nvm_sector_size_bytes
= 2<<10;
1636 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE
;
1638 case KINETIS_K_SDID_K21_M120
:
1639 case KINETIS_K_SDID_K22_M120
:
1640 /* 4kB sectors (MK21FN1M0, MK21FX512, MK22FN1M0, MK22FX512) */
1641 pflash_sector_size_bytes
= 4<<10;
1642 kinfo
->max_flash_prog_size
= 1<<10;
1643 nvm_sector_size_bytes
= 4<<10;
1645 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE
;
1647 case KINETIS_K_SDID_K10_M120
:
1648 case KINETIS_K_SDID_K20_M120
:
1649 case KINETIS_K_SDID_K60_M150
:
1650 case KINETIS_K_SDID_K70_M150
:
1652 pflash_sector_size_bytes
= 4<<10;
1653 nvm_sector_size_bytes
= 4<<10;
1655 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE
;
1658 LOG_ERROR("Unsupported K-family FAMID");
1661 /* Newer K-series or KL series MCU */
1662 switch (kinfo
->sim_sdid
& KINETIS_SDID_SERIESID_MASK
) {
1663 case KINETIS_SDID_SERIESID_K
:
1664 switch (kinfo
->sim_sdid
& (KINETIS_SDID_FAMILYID_MASK
| KINETIS_SDID_SUBFAMID_MASK
)) {
1665 case KINETIS_SDID_FAMILYID_K0X
| KINETIS_SDID_SUBFAMID_KX2
:
1666 /* K02FN64, K02FN128: FTFA, 2kB sectors */
1667 pflash_sector_size_bytes
= 2<<10;
1669 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE
;
1672 case KINETIS_SDID_FAMILYID_K2X
| KINETIS_SDID_SUBFAMID_KX2
: {
1673 /* MK24FN1M reports as K22, this should detect it (according to errata note 1N83J) */
1675 result
= target_read_u32(target
, SIM_SOPT1
, &sopt1
);
1676 if (result
!= ERROR_OK
)
1679 if (((kinfo
->sim_sdid
& (KINETIS_SDID_DIEID_MASK
)) == KINETIS_SDID_DIEID_K24FN1M
) &&
1680 ((sopt1
& KINETIS_SOPT1_RAMSIZE_MASK
) == KINETIS_SOPT1_RAMSIZE_K24FN1M
)) {
1682 pflash_sector_size_bytes
= 4<<10;
1684 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE
;
1685 kinfo
->max_flash_prog_size
= 1<<10;
1688 if ((kinfo
->sim_sdid
& (KINETIS_SDID_DIEID_MASK
)) == KINETIS_SDID_DIEID_K22FN128
1689 || (kinfo
->sim_sdid
& (KINETIS_SDID_DIEID_MASK
)) == KINETIS_SDID_DIEID_K22FN256
1690 || (kinfo
->sim_sdid
& (KINETIS_SDID_DIEID_MASK
)) == KINETIS_SDID_DIEID_K22FN512
) {
1691 /* K22 with new-style SDID - smaller pflash with FTFA, 2kB sectors */
1692 pflash_sector_size_bytes
= 2<<10;
1693 /* autodetect 1 or 2 blocks */
1694 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE
;
1697 LOG_ERROR("Unsupported Kinetis K22 DIEID");
1700 case KINETIS_SDID_FAMILYID_K2X
| KINETIS_SDID_SUBFAMID_KX4
:
1701 pflash_sector_size_bytes
= 4<<10;
1702 if ((kinfo
->sim_sdid
& (KINETIS_SDID_DIEID_MASK
)) == KINETIS_SDID_DIEID_K24FN256
) {
1703 /* K24FN256 - smaller pflash with FTFA */
1705 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE
;
1708 /* K24FN1M without errata 7534 */
1710 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE
;
1711 kinfo
->max_flash_prog_size
= 1<<10;
1714 case KINETIS_SDID_FAMILYID_K6X
| KINETIS_SDID_SUBFAMID_KX3
:
1715 case KINETIS_SDID_FAMILYID_K6X
| KINETIS_SDID_SUBFAMID_KX1
: /* errata 7534 - should be K63 */
1717 case KINETIS_SDID_FAMILYID_K6X
| KINETIS_SDID_SUBFAMID_KX4
:
1718 case KINETIS_SDID_FAMILYID_K6X
| KINETIS_SDID_SUBFAMID_KX2
: /* errata 7534 - should be K64 */
1719 /* K64FN1M0, K64FX512 */
1720 pflash_sector_size_bytes
= 4<<10;
1721 nvm_sector_size_bytes
= 4<<10;
1722 kinfo
->max_flash_prog_size
= 1<<10;
1724 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE
;
1727 case KINETIS_SDID_FAMILYID_K2X
| KINETIS_SDID_SUBFAMID_KX6
:
1729 case KINETIS_SDID_FAMILYID_K6X
| KINETIS_SDID_SUBFAMID_KX6
:
1730 /* K66FN2M0, K66FX1M0 */
1731 pflash_sector_size_bytes
= 4<<10;
1732 nvm_sector_size_bytes
= 4<<10;
1733 kinfo
->max_flash_prog_size
= 1<<10;
1735 kinfo
->flash_support
= FS_PROGRAM_PHRASE
| FS_PROGRAM_SECTOR
| FS_INVALIDATE_CACHE
;
1738 LOG_ERROR("Unsupported Kinetis FAMILYID SUBFAMID");
1742 case KINETIS_SDID_SERIESID_KL
:
1744 pflash_sector_size_bytes
= 1<<10;
1745 nvm_sector_size_bytes
= 1<<10;
1746 /* autodetect 1 or 2 blocks */
1747 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
;
1750 case KINETIS_SDID_SERIESID_KV
:
1752 switch (kinfo
->sim_sdid
& (KINETIS_SDID_FAMILYID_MASK
| KINETIS_SDID_SUBFAMID_MASK
)) {
1753 case KINETIS_SDID_FAMILYID_K1X
| KINETIS_SDID_SUBFAMID_KX0
:
1754 /* KV10: FTFA, 1kB sectors */
1755 pflash_sector_size_bytes
= 1<<10;
1757 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
;
1760 case KINETIS_SDID_FAMILYID_K1X
| KINETIS_SDID_SUBFAMID_KX1
:
1761 /* KV11: FTFA, 2kB sectors */
1762 pflash_sector_size_bytes
= 2<<10;
1764 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
;
1767 case KINETIS_SDID_FAMILYID_K3X
| KINETIS_SDID_SUBFAMID_KX0
:
1768 /* KV30: FTFA, 2kB sectors, 1 block */
1769 case KINETIS_SDID_FAMILYID_K3X
| KINETIS_SDID_SUBFAMID_KX1
:
1770 /* KV31: FTFA, 2kB sectors, 2 blocks */
1771 pflash_sector_size_bytes
= 2<<10;
1772 /* autodetect 1 or 2 blocks */
1773 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE
;
1776 case KINETIS_SDID_FAMILYID_K4X
| KINETIS_SDID_SUBFAMID_KX2
:
1777 case KINETIS_SDID_FAMILYID_K4X
| KINETIS_SDID_SUBFAMID_KX4
:
1778 case KINETIS_SDID_FAMILYID_K4X
| KINETIS_SDID_SUBFAMID_KX6
:
1779 /* KV4x: FTFA, 4kB sectors */
1780 pflash_sector_size_bytes
= 4<<10;
1782 kinfo
->flash_support
= FS_PROGRAM_LONGWORD
| FS_INVALIDATE_CACHE
;
1786 LOG_ERROR("Unsupported KV FAMILYID SUBFAMID");
1791 LOG_ERROR("Unsupported K-series");
1795 if (pflash_sector_size_bytes
== 0) {
1796 LOG_ERROR("MCU is unsupported, SDID 0x%08" PRIx32
, kinfo
->sim_sdid
);
1797 return ERROR_FLASH_OPER_UNSUPPORTED
;
1800 result
= target_read_u32(target
, SIM_FCFG1
, &kinfo
->sim_fcfg1
);
1801 if (result
!= ERROR_OK
)
1804 result
= target_read_u32(target
, SIM_FCFG2
, &kinfo
->sim_fcfg2
);
1805 if (result
!= ERROR_OK
)
1808 LOG_DEBUG("SDID: 0x%08" PRIX32
" FCFG1: 0x%08" PRIX32
" FCFG2: 0x%08" PRIX32
, kinfo
->sim_sdid
,
1809 kinfo
->sim_fcfg1
, kinfo
->sim_fcfg2
);
1811 fcfg1_nvmsize
= (uint8_t)((kinfo
->sim_fcfg1
>> 28) & 0x0f);
1812 fcfg1_pfsize
= (uint8_t)((kinfo
->sim_fcfg1
>> 24) & 0x0f);
1813 fcfg1_eesize
= (uint8_t)((kinfo
->sim_fcfg1
>> 16) & 0x0f);
1814 fcfg1_depart
= (uint8_t)((kinfo
->sim_fcfg1
>> 8) & 0x0f);
1816 fcfg2_pflsh
= (uint8_t)((kinfo
->sim_fcfg2
>> 23) & 0x01);
1817 fcfg2_maxaddr0
= (uint8_t)((kinfo
->sim_fcfg2
>> 24) & 0x7f);
1818 fcfg2_maxaddr1
= (uint8_t)((kinfo
->sim_fcfg2
>> 16) & 0x7f);
1820 if (num_blocks
== 0)
1821 num_blocks
= fcfg2_maxaddr1
? 2 : 1;
1822 else if (fcfg2_maxaddr1
== 0 && num_blocks
>= 2) {
1824 LOG_WARNING("MAXADDR1 is zero, number of flash banks adjusted to 1");
1825 } else if (fcfg2_maxaddr1
!= 0 && num_blocks
== 1) {
1827 LOG_WARNING("MAXADDR1 is non zero, number of flash banks adjusted to 2");
1830 /* when the PFLSH bit is set, there is no FlexNVM/FlexRAM */
1832 switch (fcfg1_nvmsize
) {
1838 nvm_size
= 1 << (14 + (fcfg1_nvmsize
>> 1));
1841 if (pflash_sector_size_bytes
>= 4<<10)
1852 switch (fcfg1_eesize
) {
1863 ee_size
= (16 << (10 - fcfg1_eesize
));
1870 switch (fcfg1_depart
) {
1877 df_size
= nvm_size
- (4096 << fcfg1_depart
);
1887 df_size
= 4096 << (fcfg1_depart
& 0x7);
1895 switch (fcfg1_pfsize
) {
1902 pf_size
= 1 << (14 + (fcfg1_pfsize
>> 1));
1905 /* a peculiar case: Freescale states different sizes for 0xf
1906 * K02P64M100SFARM 128 KB ... duplicate of code 0x7
1907 * K22P121M120SF8RM 256 KB ... duplicate of code 0x9
1908 * K22P121M120SF7RM 512 KB ... duplicate of code 0xb
1909 * K22P100M120SF5RM 1024 KB ... duplicate of code 0xd
1910 * K26P169M180SF5RM 2048 KB ... the only unique value
1911 * fcfg2_maxaddr0 seems to be the only clue to pf_size
1912 * Checking fcfg2_maxaddr0 later in this routine is pointless then
1915 pf_size
= ((uint32_t)fcfg2_maxaddr0
<< 13) * num_blocks
;
1917 pf_size
= ((uint32_t)fcfg2_maxaddr0
<< 13) * num_blocks
/ 2;
1918 if (pf_size
!= 2048<<10)
1919 LOG_WARNING("SIM_FCFG1 PFSIZE = 0xf: please check if pflash is %u KB", pf_size
>>10);
1927 LOG_DEBUG("FlexNVM: %" PRIu32
" PFlash: %" PRIu32
" FlexRAM: %" PRIu32
" PFLSH: %d",
1928 nvm_size
, pf_size
, ee_size
, fcfg2_pflsh
);
1930 num_pflash_blocks
= num_blocks
/ (2 - fcfg2_pflsh
);
1931 first_nvm_bank
= num_pflash_blocks
;
1932 num_nvm_blocks
= num_blocks
- num_pflash_blocks
;
1934 LOG_DEBUG("%d blocks total: %d PFlash, %d FlexNVM",
1935 num_blocks
, num_pflash_blocks
, num_nvm_blocks
);
1937 LOG_INFO("Probing flash info for bank %d", bank
->bank_number
);
1939 if ((unsigned)bank
->bank_number
< num_pflash_blocks
) {
1940 /* pflash, banks start at address zero */
1941 kinfo
->flash_class
= FC_PFLASH
;
1942 bank
->size
= (pf_size
/ num_pflash_blocks
);
1943 bank
->base
= 0x00000000 + bank
->size
* bank
->bank_number
;
1944 kinfo
->prog_base
= bank
->base
;
1945 kinfo
->sector_size
= pflash_sector_size_bytes
;
1946 /* pflash is divided into 32 protection areas for
1947 * parts with more than 32K of PFlash. For parts with
1948 * less the protection unit is set to 1024 bytes */
1949 kinfo
->protection_size
= MAX(pf_size
/ 32, 1024);
1950 bank
->num_prot_blocks
= 32 / num_pflash_blocks
;
1951 kinfo
->protection_block
= bank
->num_prot_blocks
* bank
->bank_number
;
1953 } else if ((unsigned)bank
->bank_number
< num_blocks
) {
1954 /* nvm, banks start at address 0x10000000 */
1955 unsigned nvm_ord
= bank
->bank_number
- first_nvm_bank
;
1958 kinfo
->flash_class
= FC_FLEX_NVM
;
1959 bank
->size
= (nvm_size
/ num_nvm_blocks
);
1960 bank
->base
= 0x10000000 + bank
->size
* nvm_ord
;
1961 kinfo
->prog_base
= 0x00800000 + bank
->size
* nvm_ord
;
1962 kinfo
->sector_size
= nvm_sector_size_bytes
;
1964 kinfo
->protection_size
= 0;
1966 for (i
= df_size
; ~i
& 1; i
>>= 1)
1969 kinfo
->protection_size
= df_size
/ 8; /* data flash size = 2^^n */
1971 kinfo
->protection_size
= nvm_size
/ 8; /* TODO: verify on SF1, not documented in RM */
1973 bank
->num_prot_blocks
= 8 / num_nvm_blocks
;
1974 kinfo
->protection_block
= bank
->num_prot_blocks
* nvm_ord
;
1976 /* EEPROM backup part of FlexNVM is not accessible, use df_size as a limit */
1977 if (df_size
> bank
->size
* nvm_ord
)
1978 limit
= df_size
- bank
->size
* nvm_ord
;
1982 if (bank
->size
> limit
) {
1984 LOG_DEBUG("FlexNVM bank %d limited to 0x%08" PRIx32
" due to active EEPROM backup",
1985 bank
->bank_number
, limit
);
1988 } else if ((unsigned)bank
->bank_number
== num_blocks
) {
1989 LOG_ERROR("FlexRAM support not yet implemented");
1990 return ERROR_FLASH_OPER_UNSUPPORTED
;
1992 LOG_ERROR("Cannot determine parameters for bank %d, only %d banks on device",
1993 bank
->bank_number
, num_blocks
);
1994 return ERROR_FLASH_BANK_INVALID
;
1997 if (bank
->bank_number
== 0 && ((uint32_t)fcfg2_maxaddr0
<< 13) != bank
->size
)
1998 LOG_WARNING("MAXADDR0 0x%02" PRIx8
" check failed,"
1999 " please report to OpenOCD mailing list", fcfg2_maxaddr0
);
2001 if (bank
->bank_number
== 1 && ((uint32_t)fcfg2_maxaddr1
<< 13) != bank
->size
)
2002 LOG_WARNING("MAXADDR1 0x%02" PRIx8
" check failed,"
2003 " please report to OpenOCD mailing list", fcfg2_maxaddr1
);
2005 if ((unsigned)bank
->bank_number
== first_nvm_bank
2006 && ((uint32_t)fcfg2_maxaddr1
<< 13) != df_size
)
2007 LOG_WARNING("FlexNVM MAXADDR1 0x%02" PRIx8
" check failed,"
2008 " please report to OpenOCD mailing list", fcfg2_maxaddr1
);
2011 if (bank
->sectors
) {
2012 free(bank
->sectors
);
2013 bank
->sectors
= NULL
;
2015 if (bank
->prot_blocks
) {
2016 free(bank
->prot_blocks
);
2017 bank
->prot_blocks
= NULL
;
2020 if (kinfo
->sector_size
== 0) {
2021 LOG_ERROR("Unknown sector size for bank %d", bank
->bank_number
);
2022 return ERROR_FLASH_BANK_INVALID
;
2025 if (kinfo
->flash_support
& FS_PROGRAM_SECTOR
2026 && kinfo
->max_flash_prog_size
== 0) {
2027 kinfo
->max_flash_prog_size
= kinfo
->sector_size
;
2028 /* Program section size is equal to sector size by default */
2031 bank
->num_sectors
= bank
->size
/ kinfo
->sector_size
;
2033 if (bank
->num_sectors
> 0) {
2034 /* FlexNVM bank can be used for EEPROM backup therefore zero sized */
2035 bank
->sectors
= alloc_block_array(0, kinfo
->sector_size
, bank
->num_sectors
);
2039 bank
->prot_blocks
= alloc_block_array(0, kinfo
->protection_size
, bank
->num_prot_blocks
);
2040 if (!bank
->prot_blocks
)
2044 bank
->num_prot_blocks
= 0;
2047 kinfo
->probed
= true;
2052 static int kinetis_auto_probe(struct flash_bank
*bank
)
2054 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
2056 if (kinfo
&& kinfo
->probed
)
2059 return kinetis_probe(bank
);
2062 static int kinetis_info(struct flash_bank
*bank
, char *buf
, int buf_size
)
2064 const char *bank_class_names
[] = {
2065 "(ANY)", "PFlash", "FlexNVM", "FlexRAM"
2068 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
2070 (void) snprintf(buf
, buf_size
,
2071 "%s driver for %s flash bank %s at 0x%8.8" PRIx32
"",
2072 bank
->driver
->name
, bank_class_names
[kinfo
->flash_class
],
2073 bank
->name
, bank
->base
);
2078 static int kinetis_blank_check(struct flash_bank
*bank
)
2080 struct kinetis_flash_bank
*kinfo
= bank
->driver_priv
;
2083 /* suprisingly blank check does not work in VLPR and HSRUN modes */
2084 result
= kinetis_check_run_mode(bank
->target
);
2085 if (result
!= ERROR_OK
)
2088 /* reset error flags */
2089 result
= kinetis_ftfx_prepare(bank
->target
);
2090 if (result
!= ERROR_OK
)
2093 if (kinfo
->flash_class
== FC_PFLASH
|| kinfo
->flash_class
== FC_FLEX_NVM
) {
2094 bool block_dirty
= false;
2097 if (kinfo
->flash_class
== FC_FLEX_NVM
) {
2098 uint8_t fcfg1_depart
= (uint8_t)((kinfo
->sim_fcfg1
>> 8) & 0x0f);
2099 /* block operation cannot be used on FlexNVM when EEPROM backup partition is set */
2100 if (fcfg1_depart
!= 0xf && fcfg1_depart
!= 0)
2105 /* check if whole bank is blank */
2106 result
= kinetis_ftfx_command(bank
->target
, FTFx_CMD_BLOCKSTAT
, kinfo
->prog_base
,
2107 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat
);
2109 if (result
!= ERROR_OK
|| (ftfx_fstat
& 0x01))
2114 /* the whole bank is not erased, check sector-by-sector */
2116 for (i
= 0; i
< bank
->num_sectors
; i
++) {
2118 result
= kinetis_ftfx_command(bank
->target
, FTFx_CMD_SECTSTAT
,
2119 kinfo
->prog_base
+ bank
->sectors
[i
].offset
,
2120 1, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat
);
2122 if (result
== ERROR_OK
) {
2123 bank
->sectors
[i
].is_erased
= !(ftfx_fstat
& 0x01);
2125 LOG_DEBUG("Ignoring errored PFlash sector blank-check");
2126 bank
->sectors
[i
].is_erased
= -1;
2130 /* the whole bank is erased, update all sectors */
2132 for (i
= 0; i
< bank
->num_sectors
; i
++)
2133 bank
->sectors
[i
].is_erased
= 1;
2136 LOG_WARNING("kinetis_blank_check not supported yet for FlexRAM");
2137 return ERROR_FLASH_OPERATION_FAILED
;
2144 COMMAND_HANDLER(kinetis_nvm_partition
)
2147 unsigned long par
, log2
= 0, ee1
= 0, ee2
= 0;
2148 enum { SHOW_INFO
, DF_SIZE
, EEBKP_SIZE
} sz_type
= SHOW_INFO
;
2150 uint8_t load_flex_ram
= 1;
2151 uint8_t ee_size_code
= 0x3f;
2152 uint8_t flex_nvm_partition_code
= 0;
2153 uint8_t ee_split
= 3;
2154 struct target
*target
= get_current_target(CMD_CTX
);
2155 struct flash_bank
*bank
;
2156 struct kinetis_flash_bank
*kinfo
;
2159 if (CMD_ARGC
>= 2) {
2160 if (strcmp(CMD_ARGV
[0], "dataflash") == 0)
2162 else if (strcmp(CMD_ARGV
[0], "eebkp") == 0)
2163 sz_type
= EEBKP_SIZE
;
2165 par
= strtoul(CMD_ARGV
[1], NULL
, 10);
2166 while (par
>> (log2
+ 3))
2171 result
= target_read_u32(target
, SIM_FCFG1
, &sim_fcfg1
);
2172 if (result
!= ERROR_OK
)
2175 flex_nvm_partition_code
= (uint8_t)((sim_fcfg1
>> 8) & 0x0f);
2176 switch (flex_nvm_partition_code
) {
2178 command_print(CMD_CTX
, "No EEPROM backup, data flash only");
2186 command_print(CMD_CTX
, "EEPROM backup %d KB", 4 << flex_nvm_partition_code
);
2189 command_print(CMD_CTX
, "No data flash, EEPROM backup only");
2197 command_print(CMD_CTX
, "data flash %d KB", 4 << (flex_nvm_partition_code
& 7));
2200 command_print(CMD_CTX
, "No EEPROM backup, data flash only (DEPART not set)");
2203 command_print(CMD_CTX
, "Unsupported EEPROM backup size code 0x%02" PRIx8
, flex_nvm_partition_code
);
2208 flex_nvm_partition_code
= 0x8 | log2
;
2212 flex_nvm_partition_code
= log2
;
2217 ee1
= ee2
= strtoul(CMD_ARGV
[2], NULL
, 10) / 2;
2218 else if (CMD_ARGC
>= 4) {
2219 ee1
= strtoul(CMD_ARGV
[2], NULL
, 10);
2220 ee2
= strtoul(CMD_ARGV
[3], NULL
, 10);
2223 enable
= ee1
+ ee2
> 0;
2225 for (log2
= 2; ; log2
++) {
2226 if (ee1
+ ee2
== (16u << 10) >> log2
)
2228 if (ee1
+ ee2
> (16u << 10) >> log2
|| log2
>= 9) {
2229 LOG_ERROR("Unsupported EEPROM size");
2230 return ERROR_FLASH_OPERATION_FAILED
;
2236 else if (ee1
* 7 == ee2
)
2238 else if (ee1
!= ee2
) {
2239 LOG_ERROR("Unsupported EEPROM sizes ratio");
2240 return ERROR_FLASH_OPERATION_FAILED
;
2243 ee_size_code
= log2
| ee_split
<< 4;
2247 COMMAND_PARSE_ON_OFF(CMD_ARGV
[4], enable
);
2251 LOG_INFO("DEPART 0x%" PRIx8
", EEPROM size code 0x%" PRIx8
,
2252 flex_nvm_partition_code
, ee_size_code
);
2254 result
= kinetis_check_run_mode(target
);
2255 if (result
!= ERROR_OK
)
2258 /* reset error flags */
2259 result
= kinetis_ftfx_prepare(target
);
2260 if (result
!= ERROR_OK
)
2263 result
= kinetis_ftfx_command(target
, FTFx_CMD_PGMPART
, load_flex_ram
,
2264 ee_size_code
, flex_nvm_partition_code
, 0, 0,
2266 if (result
!= ERROR_OK
)
2269 command_print(CMD_CTX
, "FlexNVM partition set. Please reset MCU.");
2271 for (i
= 1; i
< 4; i
++) {
2272 bank
= get_flash_bank_by_num_noprobe(i
);
2276 kinfo
= bank
->driver_priv
;
2277 if (kinfo
&& kinfo
->flash_class
== FC_FLEX_NVM
)
2278 kinfo
->probed
= false; /* re-probe before next use */
2281 command_print(CMD_CTX
, "FlexNVM banks will be re-probed to set new data flash size.");
2285 COMMAND_HANDLER(kinetis_fcf_source_handler
)
2288 return ERROR_COMMAND_SYNTAX_ERROR
;
2290 if (CMD_ARGC
== 1) {
2291 if (strcmp(CMD_ARGV
[0], "write") == 0)
2292 allow_fcf_writes
= true;
2293 else if (strcmp(CMD_ARGV
[0], "protection") == 0)
2294 allow_fcf_writes
= false;
2296 return ERROR_COMMAND_SYNTAX_ERROR
;
2299 if (allow_fcf_writes
) {
2300 command_print(CMD_CTX
, "Arbitrary Flash Configuration Field writes enabled.");
2301 command_print(CMD_CTX
, "Protection info writes to FCF disabled.");
2302 LOG_WARNING("BEWARE: incorrect flash configuration may permanently lock the device.");
2304 command_print(CMD_CTX
, "Protection info writes to Flash Configuration Field enabled.");
2305 command_print(CMD_CTX
, "Arbitrary FCF writes disabled. Mode safe from unwanted locking of the device.");
2311 COMMAND_HANDLER(kinetis_fopt_handler
)
2314 return ERROR_COMMAND_SYNTAX_ERROR
;
2317 fcf_fopt
= (uint8_t)strtoul(CMD_ARGV
[0], NULL
, 0);
2319 command_print(CMD_CTX
, "FCF_FOPT 0x%02" PRIx8
, fcf_fopt
);
2325 static const struct command_registration kinetis_security_command_handlers
[] = {
2327 .name
= "check_security",
2328 .mode
= COMMAND_EXEC
,
2329 .help
= "Check status of device security lock",
2331 .handler
= kinetis_check_flash_security_status
,
2335 .mode
= COMMAND_EXEC
,
2336 .help
= "Issue a halt via the MDM-AP",
2338 .handler
= kinetis_mdm_halt
,
2341 .name
= "mass_erase",
2342 .mode
= COMMAND_EXEC
,
2343 .help
= "Issue a complete flash erase via the MDM-AP",
2345 .handler
= kinetis_mdm_mass_erase
,
2348 .mode
= COMMAND_EXEC
,
2349 .help
= "Issue a reset via the MDM-AP",
2351 .handler
= kinetis_mdm_reset
,
2353 COMMAND_REGISTRATION_DONE
2356 static const struct command_registration kinetis_exec_command_handlers
[] = {
2359 .mode
= COMMAND_ANY
,
2360 .help
= "MDM-AP command group",
2362 .chain
= kinetis_security_command_handlers
,
2365 .name
= "disable_wdog",
2366 .mode
= COMMAND_EXEC
,
2367 .help
= "Disable the watchdog timer",
2369 .handler
= kinetis_disable_wdog_handler
,
2372 .name
= "nvm_partition",
2373 .mode
= COMMAND_EXEC
,
2374 .help
= "Show/set data flash or EEPROM backup size in kilobytes,"
2375 " set two EEPROM sizes in bytes and FlexRAM loading during reset",
2376 .usage
= "('info'|'dataflash' size|'eebkp' size) [eesize1 eesize2] ['on'|'off']",
2377 .handler
= kinetis_nvm_partition
,
2380 .name
= "fcf_source",
2381 .mode
= COMMAND_EXEC
,
2382 .help
= "Use protection as a source for Flash Configuration Field or allow writing arbitrary values to the FCF"
2383 " Mode 'protection' is safe from unwanted locking of the device.",
2384 .usage
= "['protection'|'write']",
2385 .handler
= kinetis_fcf_source_handler
,
2389 .mode
= COMMAND_EXEC
,
2390 .help
= "FCF_FOPT value source in 'kinetis fcf_source protection' mode",
2392 .handler
= kinetis_fopt_handler
,
2394 COMMAND_REGISTRATION_DONE
2397 static const struct command_registration kinetis_command_handler
[] = {
2400 .mode
= COMMAND_ANY
,
2401 .help
= "Kinetis flash controller commands",
2403 .chain
= kinetis_exec_command_handlers
,
2405 COMMAND_REGISTRATION_DONE
2410 struct flash_driver kinetis_flash
= {
2412 .commands
= kinetis_command_handler
,
2413 .flash_bank_command
= kinetis_flash_bank_command
,
2414 .erase
= kinetis_erase
,
2415 .protect
= kinetis_protect
,
2416 .write
= kinetis_write
,
2417 .read
= default_flash_read
,
2418 .probe
= kinetis_probe
,
2419 .auto_probe
= kinetis_auto_probe
,
2420 .erase_check
= kinetis_blank_check
,
2421 .protect_check
= kinetis_protect_check
,
2422 .info
= kinetis_info
,