1 /***************************************************************************
2 * Copyright (C) 2010 by Antonio Borneo <borneo.antonio@gmail.com> *
3 * Modified by Megan Wachs <megan@sifive.com> from the original stmsmi.c *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
17 ***************************************************************************/
19 /* The Freedom E SPI controller is a SPI bus controller
20 * specifically designed for SPI Flash Memories on Freedom E platforms.
22 * Two working modes are available:
23 * - SW mode: the SPI is controlled by SW. Any custom commands can be sent
24 * on the bus. Writes are only possible in this mode.
25 * - HW mode: Memory content is directly
26 * accessible in CPU memory space. CPU can read and execute memory content.
30 * To have flash memory mapped in CPU memory space, the controller
31 * must have "HW mode" enabled.
32 * 1) The command "reset init" has to initialize the controller and put
33 * it in HW mode (this is actually the default out of reset for Freedom E systems).
34 * 2) every command in this file have to return to prompt in HW mode. */
42 #include <jtag/jtag.h>
43 #include <helper/time_support.h>
44 #include <target/algorithm.h>
45 #include "target/riscv/riscv.h"
47 /* Register offsets */
49 #define FESPI_REG_SCKDIV 0x00
50 #define FESPI_REG_SCKMODE 0x04
51 #define FESPI_REG_CSID 0x10
52 #define FESPI_REG_CSDEF 0x14
53 #define FESPI_REG_CSMODE 0x18
55 #define FESPI_REG_DCSSCK 0x28
56 #define FESPI_REG_DSCKCS 0x2a
57 #define FESPI_REG_DINTERCS 0x2c
58 #define FESPI_REG_DINTERXFR 0x2e
60 #define FESPI_REG_FMT 0x40
61 #define FESPI_REG_TXFIFO 0x48
62 #define FESPI_REG_RXFIFO 0x4c
63 #define FESPI_REG_TXCTRL 0x50
64 #define FESPI_REG_RXCTRL 0x54
66 #define FESPI_REG_FCTRL 0x60
67 #define FESPI_REG_FFMT 0x64
69 #define FESPI_REG_IE 0x70
70 #define FESPI_REG_IP 0x74
74 #define FESPI_SCK_POL 0x1
75 #define FESPI_SCK_PHA 0x2
77 #define FESPI_FMT_PROTO(x) ((x) & 0x3)
78 #define FESPI_FMT_ENDIAN(x) (((x) & 0x1) << 2)
79 #define FESPI_FMT_DIR(x) (((x) & 0x1) << 3)
80 #define FESPI_FMT_LEN(x) (((x) & 0xf) << 16)
83 #define FESPI_TXWM(x) ((x) & 0xffff)
85 #define FESPI_RXWM(x) ((x) & 0xffff)
87 #define FESPI_IP_TXWM 0x1
88 #define FESPI_IP_RXWM 0x2
90 #define FESPI_FCTRL_EN 0x1
92 #define FESPI_INSN_CMD_EN 0x1
93 #define FESPI_INSN_ADDR_LEN(x) (((x) & 0x7) << 1)
94 #define FESPI_INSN_PAD_CNT(x) (((x) & 0xf) << 4)
95 #define FESPI_INSN_CMD_PROTO(x) (((x) & 0x3) << 8)
96 #define FESPI_INSN_ADDR_PROTO(x) (((x) & 0x3) << 10)
97 #define FESPI_INSN_DATA_PROTO(x) (((x) & 0x3) << 12)
98 #define FESPI_INSN_CMD_CODE(x) (((x) & 0xff) << 16)
99 #define FESPI_INSN_PAD_CODE(x) (((x) & 0xff) << 24)
103 #define FESPI_CSMODE_AUTO 0
104 #define FESPI_CSMODE_HOLD 2
105 #define FESPI_CSMODE_OFF 3
107 #define FESPI_DIR_RX 0
108 #define FESPI_DIR_TX 1
110 #define FESPI_PROTO_S 0
111 #define FESPI_PROTO_D 1
112 #define FESPI_PROTO_Q 2
114 #define FESPI_ENDIAN_MSB 0
115 #define FESPI_ENDIAN_LSB 1
119 #define FESPI_CMD_TIMEOUT (100)
120 #define FESPI_PROBE_TIMEOUT (100)
121 #define FESPI_MAX_TIMEOUT (3000)
124 struct fespi_flash_bank
{
126 target_addr_t ctrl_base
;
127 const struct flash_device
*dev
;
130 struct fespi_target
{
136 /* TODO !!! What is the right naming convention here? */
137 static const struct fespi_target target_devices
[] = {
138 /* name, tap_idcode, ctrl_base */
139 { "Freedom E300 SPI Flash", 0x10e31913 , 0x10014000 },
143 FLASH_BANK_COMMAND_HANDLER(fespi_flash_bank_command
)
145 struct fespi_flash_bank
*fespi_info
;
147 LOG_DEBUG("%s", __func__
);
150 return ERROR_COMMAND_SYNTAX_ERROR
;
152 fespi_info
= malloc(sizeof(struct fespi_flash_bank
));
153 if (fespi_info
== NULL
) {
154 LOG_ERROR("not enough memory");
158 bank
->driver_priv
= fespi_info
;
159 fespi_info
->probed
= 0;
160 fespi_info
->ctrl_base
= 0;
162 COMMAND_PARSE_ADDRESS(CMD_ARGV
[6], fespi_info
->ctrl_base
);
163 LOG_DEBUG("ASSUMING FESPI device at ctrl_base = " TARGET_ADDR_FMT
,
164 fespi_info
->ctrl_base
);
170 static int fespi_read_reg(struct flash_bank
*bank
, uint32_t *value
, target_addr_t address
)
172 struct target
*target
= bank
->target
;
173 struct fespi_flash_bank
*fespi_info
= bank
->driver_priv
;
175 int result
= target_read_u32(target
, fespi_info
->ctrl_base
+ address
, value
);
176 if (result
!= ERROR_OK
) {
177 LOG_ERROR("fespi_read_reg() error at " TARGET_ADDR_FMT
,
178 fespi_info
->ctrl_base
+ address
);
184 static int fespi_write_reg(struct flash_bank
*bank
, target_addr_t address
, uint32_t value
)
186 struct target
*target
= bank
->target
;
187 struct fespi_flash_bank
*fespi_info
= bank
->driver_priv
;
189 int result
= target_write_u32(target
, fespi_info
->ctrl_base
+ address
, value
);
190 if (result
!= ERROR_OK
) {
191 LOG_ERROR("fespi_write_reg() error writing 0x%x to " TARGET_ADDR_FMT
,
192 value
, fespi_info
->ctrl_base
+ address
);
198 static int fespi_disable_hw_mode(struct flash_bank
*bank
)
201 if (fespi_read_reg(bank
, &fctrl
, FESPI_REG_FCTRL
) != ERROR_OK
)
203 return fespi_write_reg(bank
, FESPI_REG_FCTRL
, fctrl
& ~FESPI_FCTRL_EN
);
206 static int fespi_enable_hw_mode(struct flash_bank
*bank
)
209 if (fespi_read_reg(bank
, &fctrl
, FESPI_REG_FCTRL
) != ERROR_OK
)
211 return fespi_write_reg(bank
, FESPI_REG_FCTRL
, fctrl
| FESPI_FCTRL_EN
);
214 static int fespi_set_dir(struct flash_bank
*bank
, bool dir
)
217 if (fespi_read_reg(bank
, &fmt
, FESPI_REG_FMT
) != ERROR_OK
)
220 return fespi_write_reg(bank
, FESPI_REG_FMT
,
221 (fmt
& ~(FESPI_FMT_DIR(0xFFFFFFFF))) | FESPI_FMT_DIR(dir
));
224 static int fespi_txwm_wait(struct flash_bank
*bank
)
226 int64_t start
= timeval_ms();
230 if (fespi_read_reg(bank
, &ip
, FESPI_REG_IP
) != ERROR_OK
)
232 if (ip
& FESPI_IP_TXWM
)
234 int64_t now
= timeval_ms();
235 if (now
- start
> 1000) {
236 LOG_ERROR("ip.txwm didn't get set.");
237 return ERROR_TARGET_TIMEOUT
;
244 static int fespi_tx(struct flash_bank
*bank
, uint8_t in
)
246 int64_t start
= timeval_ms();
250 if (fespi_read_reg(bank
, &txfifo
, FESPI_REG_TXFIFO
) != ERROR_OK
)
254 int64_t now
= timeval_ms();
255 if (now
- start
> 1000) {
256 LOG_ERROR("txfifo stayed negative.");
257 return ERROR_TARGET_TIMEOUT
;
261 return fespi_write_reg(bank
, FESPI_REG_TXFIFO
, in
);
264 static int fespi_rx(struct flash_bank
*bank
, uint8_t *out
)
266 int64_t start
= timeval_ms();
270 if (fespi_read_reg(bank
, &value
, FESPI_REG_RXFIFO
) != ERROR_OK
)
274 int64_t now
= timeval_ms();
275 if (now
- start
> 1000) {
276 LOG_ERROR("rxfifo didn't go positive (value=0x%x).", value
);
277 return ERROR_TARGET_TIMEOUT
;
287 /* TODO!!! Why don't we need to call this after writing? */
288 static int fespi_wip(struct flash_bank
*bank
, int timeout
)
292 fespi_set_dir(bank
, FESPI_DIR_RX
);
294 if (fespi_write_reg(bank
, FESPI_REG_CSMODE
, FESPI_CSMODE_HOLD
) != ERROR_OK
)
296 endtime
= timeval_ms() + timeout
;
298 fespi_tx(bank
, SPIFLASH_READ_STATUS
);
299 if (fespi_rx(bank
, NULL
) != ERROR_OK
)
307 if (fespi_rx(bank
, &rx
) != ERROR_OK
)
309 if ((rx
& SPIFLASH_BSY_BIT
) == 0) {
310 if (fespi_write_reg(bank
, FESPI_REG_CSMODE
, FESPI_CSMODE_AUTO
) != ERROR_OK
)
312 fespi_set_dir(bank
, FESPI_DIR_TX
);
315 } while (timeval_ms() < endtime
);
317 LOG_ERROR("timeout");
321 static int fespi_erase_sector(struct flash_bank
*bank
, int sector
)
323 struct fespi_flash_bank
*fespi_info
= bank
->driver_priv
;
326 retval
= fespi_tx(bank
, SPIFLASH_WRITE_ENABLE
);
327 if (retval
!= ERROR_OK
)
329 retval
= fespi_txwm_wait(bank
);
330 if (retval
!= ERROR_OK
)
333 if (fespi_write_reg(bank
, FESPI_REG_CSMODE
, FESPI_CSMODE_HOLD
) != ERROR_OK
)
335 retval
= fespi_tx(bank
, fespi_info
->dev
->erase_cmd
);
336 if (retval
!= ERROR_OK
)
338 sector
= bank
->sectors
[sector
].offset
;
339 retval
= fespi_tx(bank
, sector
>> 16);
340 if (retval
!= ERROR_OK
)
342 retval
= fespi_tx(bank
, sector
>> 8);
343 if (retval
!= ERROR_OK
)
345 retval
= fespi_tx(bank
, sector
);
346 if (retval
!= ERROR_OK
)
348 retval
= fespi_txwm_wait(bank
);
349 if (retval
!= ERROR_OK
)
351 if (fespi_write_reg(bank
, FESPI_REG_CSMODE
, FESPI_CSMODE_AUTO
) != ERROR_OK
)
354 retval
= fespi_wip(bank
, FESPI_MAX_TIMEOUT
);
355 if (retval
!= ERROR_OK
)
361 static int fespi_erase(struct flash_bank
*bank
, int first
, int last
)
363 struct target
*target
= bank
->target
;
364 struct fespi_flash_bank
*fespi_info
= bank
->driver_priv
;
365 int retval
= ERROR_OK
;
368 LOG_DEBUG("%s: from sector %d to sector %d", __func__
, first
, last
);
370 if (target
->state
!= TARGET_HALTED
) {
371 LOG_ERROR("Target not halted");
372 return ERROR_TARGET_NOT_HALTED
;
375 if ((first
< 0) || (last
< first
) || (last
>= bank
->num_sectors
)) {
376 LOG_ERROR("Flash sector invalid");
377 return ERROR_FLASH_SECTOR_INVALID
;
380 if (!(fespi_info
->probed
)) {
381 LOG_ERROR("Flash bank not probed");
382 return ERROR_FLASH_BANK_NOT_PROBED
;
385 for (sector
= first
; sector
<= last
; sector
++) {
386 if (bank
->sectors
[sector
].is_protected
) {
387 LOG_ERROR("Flash sector %d protected", sector
);
392 if (fespi_info
->dev
->erase_cmd
== 0x00)
393 return ERROR_FLASH_OPER_UNSUPPORTED
;
395 if (fespi_write_reg(bank
, FESPI_REG_TXCTRL
, FESPI_TXWM(1)) != ERROR_OK
)
397 retval
= fespi_txwm_wait(bank
);
398 if (retval
!= ERROR_OK
) {
399 LOG_ERROR("WM Didn't go high before attempting.");
403 /* Disable Hardware accesses*/
404 if (fespi_disable_hw_mode(bank
) != ERROR_OK
)
408 retval
= fespi_wip(bank
, FESPI_PROBE_TIMEOUT
);
409 if (retval
!= ERROR_OK
)
412 for (sector
= first
; sector
<= last
; sector
++) {
413 retval
= fespi_erase_sector(bank
, sector
);
414 if (retval
!= ERROR_OK
)
419 /* Switch to HW mode before return to prompt */
421 if (fespi_enable_hw_mode(bank
) != ERROR_OK
)
426 static int fespi_protect(struct flash_bank
*bank
, int set
,
431 for (sector
= first
; sector
<= last
; sector
++)
432 bank
->sectors
[sector
].is_protected
= set
;
436 static int slow_fespi_write_buffer(struct flash_bank
*bank
,
437 const uint8_t *buffer
, uint32_t offset
, uint32_t len
)
441 if (offset
& 0xFF000000) {
442 LOG_ERROR("FESPI interface does not support greater than 3B addressing, can't write to offset 0x%x",
447 /* TODO!!! assert that len < page size */
449 fespi_tx(bank
, SPIFLASH_WRITE_ENABLE
);
450 fespi_txwm_wait(bank
);
452 if (fespi_write_reg(bank
, FESPI_REG_CSMODE
, FESPI_CSMODE_HOLD
) != ERROR_OK
)
455 fespi_tx(bank
, SPIFLASH_PAGE_PROGRAM
);
457 fespi_tx(bank
, offset
>> 16);
458 fespi_tx(bank
, offset
>> 8);
459 fespi_tx(bank
, offset
);
461 for (ii
= 0; ii
< len
; ii
++)
462 fespi_tx(bank
, buffer
[ii
]);
464 fespi_txwm_wait(bank
);
466 if (fespi_write_reg(bank
, FESPI_REG_CSMODE
, FESPI_CSMODE_AUTO
) != ERROR_OK
)
474 static const uint8_t algorithm_bin
[] = {
475 #include "../../../contrib/loaders/flash/fespi/fespi.inc"
479 #define STEP_TXWM_WAIT 12
480 #define STEP_WRITE_REG 16
481 #define STEP_WIP_WAIT 20
482 #define STEP_SET_DIR 24
483 #define STEP_NOP 0xff
485 struct algorithm_steps
{
491 static struct algorithm_steps
*as_new(void)
493 struct algorithm_steps
*as
= calloc(1, sizeof(struct algorithm_steps
));
495 as
->steps
= malloc(as
->size
* sizeof(as
->steps
[0]));
499 static struct algorithm_steps
*as_delete(struct algorithm_steps
*as
)
501 for (unsigned step
= 0; step
< as
->used
; step
++) {
502 free(as
->steps
[step
]);
503 as
->steps
[step
] = NULL
;
510 static int as_empty(struct algorithm_steps
*as
)
512 for (unsigned s
= 0; s
< as
->used
; s
++) {
513 if (as
->steps
[s
][0] != STEP_NOP
)
519 /* Return size of compiled program. */
520 static unsigned as_compile(struct algorithm_steps
*as
, uint8_t *target
,
521 unsigned target_size
)
524 bool finish_early
= false;
525 for (unsigned s
= 0; s
< as
->used
&& !finish_early
; s
++) {
526 unsigned bytes_left
= target_size
- offset
;
527 switch (as
->steps
[s
][0]) {
532 unsigned size
= as
->steps
[s
][1];
533 if (size
+ 3 > bytes_left
) {
537 memcpy(target
+ offset
, as
->steps
[s
], size
+ 2);
542 if (4 > bytes_left
) {
546 memcpy(target
+ offset
, as
->steps
[s
], 3);
550 if (3 > bytes_left
) {
554 memcpy(target
+ offset
, as
->steps
[s
], 2);
559 if (2 > bytes_left
) {
563 memcpy(target
+ offset
, as
->steps
[s
], 1);
570 as
->steps
[s
][0] = STEP_NOP
;
572 assert(offset
+ 1 <= target_size
);
573 target
[offset
++] = STEP_EXIT
;
575 LOG_DEBUG("%d-byte program:", offset
);
576 for (unsigned i
= 0; i
< offset
;) {
578 for (unsigned x
= 0; i
< offset
&& x
< 16; x
++, i
++)
579 sprintf(buf
+ x
*3, "%02x ", target
[i
]);
580 LOG_DEBUG("%s", buf
);
586 static void as_add_step(struct algorithm_steps
*as
, uint8_t *step
)
588 if (as
->used
== as
->size
) {
590 as
->steps
= realloc(as
->steps
, sizeof(as
->steps
[0]) * as
->size
);
591 LOG_DEBUG("Increased size to 0x%x", as
->size
);
593 as
->steps
[as
->used
] = step
;
597 static void as_add_tx(struct algorithm_steps
*as
, unsigned count
, const uint8_t *data
)
599 LOG_DEBUG("count=%d", count
);
601 unsigned step_count
= MIN(count
, 255);
602 uint8_t *step
= malloc(step_count
+ 2);
604 step
[1] = step_count
;
605 memcpy(step
+ 2, data
, step_count
);
606 as_add_step(as
, step
);
612 static void as_add_tx1(struct algorithm_steps
*as
, uint8_t byte
)
616 as_add_tx(as
, 1, data
);
619 static void as_add_write_reg(struct algorithm_steps
*as
, uint8_t offset
, uint8_t data
)
621 uint8_t *step
= malloc(3);
622 step
[0] = STEP_WRITE_REG
;
625 as_add_step(as
, step
);
628 static void as_add_txwm_wait(struct algorithm_steps
*as
)
630 uint8_t *step
= malloc(1);
631 step
[0] = STEP_TXWM_WAIT
;
632 as_add_step(as
, step
);
635 static void as_add_wip_wait(struct algorithm_steps
*as
)
637 uint8_t *step
= malloc(1);
638 step
[0] = STEP_WIP_WAIT
;
639 as_add_step(as
, step
);
642 static void as_add_set_dir(struct algorithm_steps
*as
, bool dir
)
644 uint8_t *step
= malloc(2);
645 step
[0] = STEP_SET_DIR
;
646 step
[1] = FESPI_FMT_DIR(dir
);
647 as_add_step(as
, step
);
650 /* This should write something less than or equal to a page.*/
651 static int steps_add_buffer_write(struct algorithm_steps
*as
,
652 const uint8_t *buffer
, uint32_t chip_offset
, uint32_t len
)
654 if (chip_offset
& 0xFF000000) {
655 LOG_ERROR("FESPI interface does not support greater than 3B addressing, can't write to offset 0x%x",
660 as_add_tx1(as
, SPIFLASH_WRITE_ENABLE
);
661 as_add_txwm_wait(as
);
662 as_add_write_reg(as
, FESPI_REG_CSMODE
, FESPI_CSMODE_HOLD
);
665 SPIFLASH_PAGE_PROGRAM
,
670 as_add_tx(as
, sizeof(setup
), setup
);
672 as_add_tx(as
, len
, buffer
);
673 as_add_txwm_wait(as
);
674 as_add_write_reg(as
, FESPI_REG_CSMODE
, FESPI_CSMODE_AUTO
);
677 as_add_set_dir(as
, FESPI_DIR_RX
);
678 as_add_write_reg(as
, FESPI_REG_CSMODE
, FESPI_CSMODE_HOLD
);
680 as_add_write_reg(as
, FESPI_REG_CSMODE
, FESPI_CSMODE_AUTO
);
681 as_add_set_dir(as
, FESPI_DIR_TX
);
686 static int steps_execute(struct algorithm_steps
*as
,
687 struct flash_bank
*bank
, struct working_area
*algorithm_wa
,
688 struct working_area
*data_wa
)
690 struct target
*target
= bank
->target
;
691 struct fespi_flash_bank
*fespi_info
= bank
->driver_priv
;
692 uint32_t ctrl_base
= fespi_info
->ctrl_base
;
693 int xlen
= riscv_xlen(target
);
695 struct reg_param reg_params
[2];
696 init_reg_param(®_params
[0], "a0", xlen
, PARAM_OUT
);
697 init_reg_param(®_params
[1], "a1", xlen
, PARAM_OUT
);
698 buf_set_u64(reg_params
[0].value
, 0, xlen
, ctrl_base
);
699 buf_set_u64(reg_params
[1].value
, 0, xlen
, data_wa
->address
);
701 int retval
= ERROR_OK
;
702 while (!as_empty(as
)) {
704 uint8_t *data_buf
= malloc(data_wa
->size
);
705 unsigned bytes
= as_compile(as
, data_buf
, data_wa
->size
);
706 retval
= target_write_buffer(target
, data_wa
->address
, bytes
,
709 if (retval
!= ERROR_OK
) {
710 LOG_ERROR("Failed to write data to " TARGET_ADDR_FMT
": %d",
711 data_wa
->address
, retval
);
715 retval
= target_run_algorithm(target
, 0, NULL
, 2, reg_params
,
716 algorithm_wa
->address
, algorithm_wa
->address
+ 4,
718 if (retval
!= ERROR_OK
) {
719 LOG_ERROR("Failed to execute algorithm at " TARGET_ADDR_FMT
": %d",
720 algorithm_wa
->address
, retval
);
726 destroy_reg_param(®_params
[1]);
727 destroy_reg_param(®_params
[0]);
731 static int fespi_write(struct flash_bank
*bank
, const uint8_t *buffer
,
732 uint32_t offset
, uint32_t count
)
734 struct target
*target
= bank
->target
;
735 struct fespi_flash_bank
*fespi_info
= bank
->driver_priv
;
736 uint32_t cur_count
, page_size
, page_offset
;
738 int retval
= ERROR_OK
;
740 LOG_DEBUG("%s: offset=0x%08" PRIx32
" count=0x%08" PRIx32
,
741 __func__
, offset
, count
);
743 if (target
->state
!= TARGET_HALTED
) {
744 LOG_ERROR("Target not halted");
745 return ERROR_TARGET_NOT_HALTED
;
748 if (offset
+ count
> fespi_info
->dev
->size_in_bytes
) {
749 LOG_WARNING("Write past end of flash. Extra data discarded.");
750 count
= fespi_info
->dev
->size_in_bytes
- offset
;
753 /* Check sector protection */
754 for (sector
= 0; sector
< bank
->num_sectors
; sector
++) {
755 /* Start offset in or before this sector? */
756 /* End offset in or behind this sector? */
758 (bank
->sectors
[sector
].offset
+ bank
->sectors
[sector
].size
))
759 && ((offset
+ count
- 1) >= bank
->sectors
[sector
].offset
)
760 && bank
->sectors
[sector
].is_protected
) {
761 LOG_ERROR("Flash sector %d protected", sector
);
766 struct working_area
*algorithm_wa
;
767 if (target_alloc_working_area(target
, sizeof(algorithm_bin
),
768 &algorithm_wa
) != ERROR_OK
) {
769 LOG_WARNING("Couldn't allocate %zd-byte working area.",
770 sizeof(algorithm_bin
));
773 retval
= target_write_buffer(target
, algorithm_wa
->address
,
774 sizeof(algorithm_bin
), algorithm_bin
);
775 if (retval
!= ERROR_OK
) {
776 LOG_ERROR("Failed to write code to " TARGET_ADDR_FMT
": %d",
777 algorithm_wa
->address
, retval
);
778 target_free_working_area(target
, algorithm_wa
);
783 struct working_area
*data_wa
= NULL
;
784 unsigned data_wa_size
= 2 * count
;
786 if (data_wa_size
< 128) {
787 LOG_WARNING("Couldn't allocate data working area.");
788 target_free_working_area(target
, algorithm_wa
);
791 if (target_alloc_working_area_try(target
, data_wa_size
, &data_wa
) ==
799 /* If no valid page_size, use reasonable default. */
800 page_size
= fespi_info
->dev
->pagesize
?
801 fespi_info
->dev
->pagesize
: SPIFLASH_DEF_PAGESIZE
;
803 fespi_txwm_wait(bank
);
805 /* Disable Hardware accesses*/
806 if (fespi_disable_hw_mode(bank
) != ERROR_OK
)
809 struct algorithm_steps
*as
= as_new();
812 retval
= fespi_wip(bank
, FESPI_PROBE_TIMEOUT
);
813 if (retval
!= ERROR_OK
)
816 page_offset
= offset
% page_size
;
817 /* central part, aligned words */
819 /* clip block at page boundary */
820 if (page_offset
+ count
> page_size
)
821 cur_count
= page_size
- page_offset
;
826 retval
= steps_add_buffer_write(as
, buffer
, offset
, cur_count
);
828 retval
= slow_fespi_write_buffer(bank
, buffer
, offset
, cur_count
);
829 if (retval
!= ERROR_OK
)
839 retval
= steps_execute(as
, bank
, algorithm_wa
, data_wa
);
843 target_free_working_area(target
, data_wa
);
844 target_free_working_area(target
, algorithm_wa
);
849 /* Switch to HW mode before return to prompt */
850 if (fespi_enable_hw_mode(bank
) != ERROR_OK
)
855 /* Return ID of flash device */
856 /* On exit, SW mode is kept */
857 static int fespi_read_flash_id(struct flash_bank
*bank
, uint32_t *id
)
859 struct target
*target
= bank
->target
;
862 if (target
->state
!= TARGET_HALTED
) {
863 LOG_ERROR("Target not halted");
864 return ERROR_TARGET_NOT_HALTED
;
867 fespi_txwm_wait(bank
);
870 retval
= fespi_wip(bank
, FESPI_PROBE_TIMEOUT
);
871 if (retval
!= ERROR_OK
)
874 fespi_set_dir(bank
, FESPI_DIR_RX
);
876 /* Send SPI command "read ID" */
877 if (fespi_write_reg(bank
, FESPI_REG_CSMODE
, FESPI_CSMODE_HOLD
) != ERROR_OK
)
880 fespi_tx(bank
, SPIFLASH_READ_ID
);
881 /* Send dummy bytes to actually read the ID.*/
886 /* read ID from Receive Register */
888 if (fespi_rx(bank
, NULL
) != ERROR_OK
)
891 if (fespi_rx(bank
, &rx
) != ERROR_OK
)
894 if (fespi_rx(bank
, &rx
) != ERROR_OK
)
897 if (fespi_rx(bank
, &rx
) != ERROR_OK
)
901 if (fespi_write_reg(bank
, FESPI_REG_CSMODE
, FESPI_CSMODE_AUTO
) != ERROR_OK
)
904 fespi_set_dir(bank
, FESPI_DIR_TX
);
909 static int fespi_probe(struct flash_bank
*bank
)
911 struct target
*target
= bank
->target
;
912 struct fespi_flash_bank
*fespi_info
= bank
->driver_priv
;
913 struct flash_sector
*sectors
;
914 uint32_t id
= 0; /* silence uninitialized warning */
915 const struct fespi_target
*target_device
;
919 if (fespi_info
->probed
)
921 fespi_info
->probed
= 0;
923 if (fespi_info
->ctrl_base
== 0) {
924 for (target_device
= target_devices
; target_device
->name
; ++target_device
)
925 if (target_device
->tap_idcode
== target
->tap
->idcode
)
928 if (!target_device
->name
) {
929 LOG_ERROR("Device ID 0x%" PRIx32
" is not known as FESPI capable",
930 target
->tap
->idcode
);
934 fespi_info
->ctrl_base
= target_device
->ctrl_base
;
936 LOG_DEBUG("Valid FESPI on device %s at address " TARGET_ADDR_FMT
,
937 target_device
->name
, bank
->base
);
940 LOG_DEBUG("Assuming FESPI as specified at address " TARGET_ADDR_FMT
941 " with ctrl at " TARGET_ADDR_FMT
, fespi_info
->ctrl_base
,
945 /* read and decode flash ID; returns in SW mode */
946 if (fespi_write_reg(bank
, FESPI_REG_TXCTRL
, FESPI_TXWM(1)) != ERROR_OK
)
948 fespi_set_dir(bank
, FESPI_DIR_TX
);
950 /* Disable Hardware accesses*/
951 if (fespi_disable_hw_mode(bank
) != ERROR_OK
)
954 retval
= fespi_read_flash_id(bank
, &id
);
956 if (fespi_enable_hw_mode(bank
) != ERROR_OK
)
958 if (retval
!= ERROR_OK
)
961 fespi_info
->dev
= NULL
;
962 for (const struct flash_device
*p
= flash_devices
; p
->name
; p
++)
963 if (p
->device_id
== id
) {
968 if (!fespi_info
->dev
) {
969 LOG_ERROR("Unknown flash device (ID 0x%08" PRIx32
")", id
);
973 LOG_INFO("Found flash device \'%s\' (ID 0x%08" PRIx32
")",
974 fespi_info
->dev
->name
, fespi_info
->dev
->device_id
);
976 /* Set correct size value */
977 bank
->size
= fespi_info
->dev
->size_in_bytes
;
979 if (bank
->size
<= (1UL << 16))
980 LOG_WARNING("device needs 2-byte addresses - not implemented");
981 if (bank
->size
> (1UL << 24))
982 LOG_WARNING("device needs paging or 4-byte addresses - not implemented");
984 /* if no sectors, treat whole bank as single sector */
985 sectorsize
= fespi_info
->dev
->sectorsize
?
986 fespi_info
->dev
->sectorsize
: fespi_info
->dev
->size_in_bytes
;
988 /* create and fill sectors array */
989 bank
->num_sectors
= fespi_info
->dev
->size_in_bytes
/ sectorsize
;
990 sectors
= malloc(sizeof(struct flash_sector
) * bank
->num_sectors
);
991 if (sectors
== NULL
) {
992 LOG_ERROR("not enough memory");
996 for (int sector
= 0; sector
< bank
->num_sectors
; sector
++) {
997 sectors
[sector
].offset
= sector
* sectorsize
;
998 sectors
[sector
].size
= sectorsize
;
999 sectors
[sector
].is_erased
= -1;
1000 sectors
[sector
].is_protected
= 0;
1003 bank
->sectors
= sectors
;
1004 fespi_info
->probed
= 1;
1008 static int fespi_auto_probe(struct flash_bank
*bank
)
1010 struct fespi_flash_bank
*fespi_info
= bank
->driver_priv
;
1011 if (fespi_info
->probed
)
1013 return fespi_probe(bank
);
1016 static int fespi_protect_check(struct flash_bank
*bank
)
1018 /* Nothing to do. Protection is only handled in SW. */
1022 static int get_fespi_info(struct flash_bank
*bank
, char *buf
, int buf_size
)
1024 struct fespi_flash_bank
*fespi_info
= bank
->driver_priv
;
1026 if (!(fespi_info
->probed
)) {
1027 snprintf(buf
, buf_size
,
1028 "\nFESPI flash bank not probed yet\n");
1032 snprintf(buf
, buf_size
, "\nFESPI flash information:\n"
1033 " Device \'%s\' (ID 0x%08" PRIx32
")\n",
1034 fespi_info
->dev
->name
, fespi_info
->dev
->device_id
);
1039 const struct flash_driver fespi_flash
= {
1041 .flash_bank_command
= fespi_flash_bank_command
,
1042 .erase
= fespi_erase
,
1043 .protect
= fespi_protect
,
1044 .write
= fespi_write
,
1045 .read
= default_flash_read
,
1046 .probe
= fespi_probe
,
1047 .auto_probe
= fespi_auto_probe
,
1048 .erase_check
= default_flash_blank_check
,
1049 .protect_check
= fespi_protect_check
,
1050 .info
= get_fespi_info
,
1051 .free_driver_priv
= default_flash_free_driver_priv
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