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Cleanup: removal of obsolete semicolons
[openocd.git] / src / flash / nor / em357.c
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
7 *
8 * Copyright (C) 2011 by Erik Botö
9 * erik.boto@pelagicore.com
10 *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
15 * *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
20 * *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program; if not, write to the *
23 * Free Software Foundation, Inc., *
24 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
25 ***************************************************************************/
26
27 #ifdef HAVE_CONFIG_H
28 #include "config.h"
29 #endif
30
31 #include "imp.h"
32 #include <helper/binarybuffer.h>
33 #include <target/algorithm.h>
34 #include <target/armv7m.h>
35
36 /* em357 register locations */
37
38 #define EM357_FLASH_ACR 0x40008000
39 #define EM357_FLASH_KEYR 0x40008004
40 #define EM357_FLASH_OPTKEYR 0x40008008
41 #define EM357_FLASH_SR 0x4000800C
42 #define EM357_FLASH_CR 0x40008010
43 #define EM357_FLASH_AR 0x40008014
44 #define EM357_FLASH_OBR 0x4000801C
45 #define EM357_FLASH_WRPR 0x40008020
46
47 #define EM357_FPEC_CLK 0x4000402c
48 /* option byte location */
49
50 #define EM357_OB_RDP 0x08040800
51 #define EM357_OB_WRP0 0x08040808
52 #define EM357_OB_WRP1 0x0804080A
53 #define EM357_OB_WRP2 0x0804080C
54
55 /* FLASH_CR register bits */
56
57 #define FLASH_PG (1 << 0)
58 #define FLASH_PER (1 << 1)
59 #define FLASH_MER (1 << 2)
60 #define FLASH_OPTPG (1 << 4)
61 #define FLASH_OPTER (1 << 5)
62 #define FLASH_STRT (1 << 6)
63 #define FLASH_LOCK (1 << 7)
64 #define FLASH_OPTWRE (1 << 9)
65
66 /* FLASH_SR register bits */
67
68 #define FLASH_BSY (1 << 0)
69 #define FLASH_PGERR (1 << 2)
70 #define FLASH_WRPRTERR (1 << 4)
71 #define FLASH_EOP (1 << 5)
72
73 /* EM357_FLASH_OBR bit definitions (reading) */
74
75 #define OPT_ERROR 0
76 #define OPT_READOUT 1
77
78 /* register unlock keys */
79
80 #define KEY1 0x45670123
81 #define KEY2 0xCDEF89AB
82
83 struct em357_options {
84 uint16_t RDP;
85 uint16_t user_options;
86 uint16_t protection[3];
87 };
88
89 struct em357_flash_bank {
90 struct em357_options option_bytes;
91 int ppage_size;
92 int probed;
93 };
94
95 static int em357_mass_erase(struct flash_bank *bank);
96
97 /* flash bank em357 <base> <size> 0 0 <target#>
98 */
99 FLASH_BANK_COMMAND_HANDLER(em357_flash_bank_command)
100 {
101 struct em357_flash_bank *em357_info;
102
103 if (CMD_ARGC < 6)
104 return ERROR_COMMAND_SYNTAX_ERROR;
105
106 em357_info = malloc(sizeof(struct em357_flash_bank));
107 bank->driver_priv = em357_info;
108
109 em357_info->probed = 0;
110
111 return ERROR_OK;
112 }
113
114 static inline int em357_get_flash_status(struct flash_bank *bank, uint32_t *status)
115 {
116 struct target *target = bank->target;
117 return target_read_u32(target, EM357_FLASH_SR, status);
118 }
119
120 static int em357_wait_status_busy(struct flash_bank *bank, int timeout)
121 {
122 struct target *target = bank->target;
123 uint32_t status;
124 int retval = ERROR_OK;
125
126 /* wait for busy to clear */
127 for (;; ) {
128 retval = em357_get_flash_status(bank, &status);
129 if (retval != ERROR_OK)
130 return retval;
131 LOG_DEBUG("status: 0x%" PRIx32 "", status);
132 if ((status & FLASH_BSY) == 0)
133 break;
134 if (timeout-- <= 0) {
135 LOG_ERROR("timed out waiting for flash");
136 return ERROR_FAIL;
137 }
138 alive_sleep(1);
139 }
140
141 if (status & FLASH_WRPRTERR) {
142 LOG_ERROR("em357 device protected");
143 retval = ERROR_FAIL;
144 }
145
146 if (status & FLASH_PGERR) {
147 LOG_ERROR("em357 device programming failed");
148 retval = ERROR_FAIL;
149 }
150
151 /* Clear but report errors */
152 if (status & (FLASH_WRPRTERR | FLASH_PGERR)) {
153 /* If this operation fails, we ignore it and report the original
154 * retval
155 */
156 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR | FLASH_PGERR);
157 }
158 return retval;
159 }
160
161 static int em357_read_options(struct flash_bank *bank)
162 {
163 uint32_t optiondata;
164 struct em357_flash_bank *em357_info = NULL;
165 struct target *target = bank->target;
166
167 em357_info = bank->driver_priv;
168
169 /* read current option bytes */
170 int retval = target_read_u32(target, EM357_FLASH_OBR, &optiondata);
171 if (retval != ERROR_OK)
172 return retval;
173
174 em357_info->option_bytes.user_options = (uint16_t)0xFFFC | ((optiondata >> 2) & 0x03);
175 em357_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
176
177 if (optiondata & (1 << OPT_READOUT))
178 LOG_INFO("Device Security Bit Set");
179
180 /* each bit refers to a 4bank protection */
181 retval = target_read_u32(target, EM357_FLASH_WRPR, &optiondata);
182 if (retval != ERROR_OK)
183 return retval;
184
185 em357_info->option_bytes.protection[0] = (uint16_t)optiondata;
186 em357_info->option_bytes.protection[1] = (uint16_t)(optiondata >> 8);
187 em357_info->option_bytes.protection[2] = (uint16_t)(optiondata >> 16);
188
189 return ERROR_OK;
190 }
191
192 static int em357_erase_options(struct flash_bank *bank)
193 {
194 struct em357_flash_bank *em357_info = NULL;
195 struct target *target = bank->target;
196
197 em357_info = bank->driver_priv;
198
199 /* read current options */
200 em357_read_options(bank);
201
202 /* unlock flash registers */
203 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
204 if (retval != ERROR_OK)
205 return retval;
206
207 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
208 if (retval != ERROR_OK)
209 return retval;
210
211 /* unlock option flash registers */
212 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
213 if (retval != ERROR_OK)
214 return retval;
215 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
216 if (retval != ERROR_OK)
217 return retval;
218
219 /* erase option bytes */
220 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_OPTWRE);
221 if (retval != ERROR_OK)
222 return retval;
223 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
224 if (retval != ERROR_OK)
225 return retval;
226
227 retval = em357_wait_status_busy(bank, 10);
228 if (retval != ERROR_OK)
229 return retval;
230
231 /* clear readout protection and complementary option bytes
232 * this will also force a device unlock if set */
233 em357_info->option_bytes.RDP = 0x5AA5;
234
235 return ERROR_OK;
236 }
237
238 static int em357_write_options(struct flash_bank *bank)
239 {
240 struct em357_flash_bank *em357_info = NULL;
241 struct target *target = bank->target;
242
243 em357_info = bank->driver_priv;
244
245 /* unlock flash registers */
246 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
247 if (retval != ERROR_OK)
248 return retval;
249 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
250 if (retval != ERROR_OK)
251 return retval;
252
253 /* unlock option flash registers */
254 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
255 if (retval != ERROR_OK)
256 return retval;
257 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
258 if (retval != ERROR_OK)
259 return retval;
260
261 /* program option bytes */
262 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTPG | FLASH_OPTWRE);
263 if (retval != ERROR_OK)
264 return retval;
265
266 retval = em357_wait_status_busy(bank, 10);
267 if (retval != ERROR_OK)
268 return retval;
269
270 /* write protection byte 1 */
271 retval = target_write_u16(target, EM357_OB_WRP0, em357_info->option_bytes.protection[0]);
272 if (retval != ERROR_OK)
273 return retval;
274
275 retval = em357_wait_status_busy(bank, 10);
276 if (retval != ERROR_OK)
277 return retval;
278
279 /* write protection byte 2 */
280 retval = target_write_u16(target, EM357_OB_WRP1, em357_info->option_bytes.protection[1]);
281 if (retval != ERROR_OK)
282 return retval;
283
284 retval = em357_wait_status_busy(bank, 10);
285 if (retval != ERROR_OK)
286 return retval;
287
288 /* write protection byte 3 */
289 retval = target_write_u16(target, EM357_OB_WRP2, em357_info->option_bytes.protection[2]);
290 if (retval != ERROR_OK)
291 return retval;
292
293 retval = em357_wait_status_busy(bank, 10);
294 if (retval != ERROR_OK)
295 return retval;
296
297 /* write readout protection bit */
298 retval = target_write_u16(target, EM357_OB_RDP, em357_info->option_bytes.RDP);
299 if (retval != ERROR_OK)
300 return retval;
301
302 retval = em357_wait_status_busy(bank, 10);
303 if (retval != ERROR_OK)
304 return retval;
305
306 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
307 if (retval != ERROR_OK)
308 return retval;
309
310 return ERROR_OK;
311 }
312
313 static int em357_protect_check(struct flash_bank *bank)
314 {
315 struct target *target = bank->target;
316 struct em357_flash_bank *em357_info = bank->driver_priv;
317
318 uint32_t protection;
319 int i, s;
320 int num_bits;
321 int set;
322
323 if (target->state != TARGET_HALTED) {
324 LOG_ERROR("Target not halted");
325 return ERROR_TARGET_NOT_HALTED;
326 }
327
328 /* each bit refers to a 4bank protection (bit 0-23) */
329 int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
330 if (retval != ERROR_OK)
331 return retval;
332
333 /* each protection bit is for 4 * 2K pages */
334 num_bits = (bank->num_sectors / em357_info->ppage_size);
335
336 for (i = 0; i < num_bits; i++) {
337 set = 1;
338 if (protection & (1 << i))
339 set = 0;
340
341 for (s = 0; s < em357_info->ppage_size; s++)
342 bank->sectors[(i * em357_info->ppage_size) + s].is_protected = set;
343 }
344
345 return ERROR_OK;
346 }
347
348 static int em357_erase(struct flash_bank *bank, int first, int last)
349 {
350 struct target *target = bank->target;
351 int i;
352
353 if (bank->target->state != TARGET_HALTED) {
354 LOG_ERROR("Target not halted");
355 return ERROR_TARGET_NOT_HALTED;
356 }
357
358 if ((first == 0) && (last == (bank->num_sectors - 1)))
359 return em357_mass_erase(bank);
360
361 /* Enable FPEC clock */
362 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
363
364 /* unlock flash registers */
365 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
366 if (retval != ERROR_OK)
367 return retval;
368 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
369 if (retval != ERROR_OK)
370 return retval;
371
372 for (i = first; i <= last; i++) {
373 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER);
374 if (retval != ERROR_OK)
375 return retval;
376 retval = target_write_u32(target, EM357_FLASH_AR,
377 bank->base + bank->sectors[i].offset);
378 if (retval != ERROR_OK)
379 return retval;
380 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER | FLASH_STRT);
381 if (retval != ERROR_OK)
382 return retval;
383
384 retval = em357_wait_status_busy(bank, 100);
385 if (retval != ERROR_OK)
386 return retval;
387
388 bank->sectors[i].is_erased = 1;
389 }
390
391 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
392 if (retval != ERROR_OK)
393 return retval;
394
395 return ERROR_OK;
396 }
397
398 static int em357_protect(struct flash_bank *bank, int set, int first, int last)
399 {
400 struct em357_flash_bank *em357_info = NULL;
401 struct target *target = bank->target;
402 uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
403 int i, reg, bit;
404 int status;
405 uint32_t protection;
406
407 em357_info = bank->driver_priv;
408
409 if (target->state != TARGET_HALTED) {
410 LOG_ERROR("Target not halted");
411 return ERROR_TARGET_NOT_HALTED;
412 }
413
414 if ((first % em357_info->ppage_size) != 0) {
415 LOG_WARNING("aligned start protect sector to a %d sector boundary",
416 em357_info->ppage_size);
417 first = first - (first % em357_info->ppage_size);
418 }
419 if (((last + 1) % em357_info->ppage_size) != 0) {
420 LOG_WARNING("aligned end protect sector to a %d sector boundary",
421 em357_info->ppage_size);
422 last++;
423 last = last - (last % em357_info->ppage_size);
424 last--;
425 }
426
427 /* each bit refers to a 4bank protection */
428 int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
429 if (retval != ERROR_OK)
430 return retval;
431
432 prot_reg[0] = (uint16_t)protection;
433 prot_reg[1] = (uint16_t)(protection >> 8);
434 prot_reg[2] = (uint16_t)(protection >> 16);
435
436 for (i = first; i <= last; i++) {
437 reg = (i / em357_info->ppage_size) / 8;
438 bit = (i / em357_info->ppage_size) - (reg * 8);
439
440 LOG_WARNING("reg, bit: %d, %d", reg, bit);
441 if (set)
442 prot_reg[reg] &= ~(1 << bit);
443 else
444 prot_reg[reg] |= (1 << bit);
445 }
446
447 status = em357_erase_options(bank);
448 if (retval != ERROR_OK)
449 return status;
450
451 em357_info->option_bytes.protection[0] = prot_reg[0];
452 em357_info->option_bytes.protection[1] = prot_reg[1];
453 em357_info->option_bytes.protection[2] = prot_reg[2];
454
455 return em357_write_options(bank);
456 }
457
458 static int em357_write_block(struct flash_bank *bank, const uint8_t *buffer,
459 uint32_t offset, uint32_t count)
460 {
461 struct target *target = bank->target;
462 uint32_t buffer_size = 16384;
463 struct working_area *write_algorithm;
464 struct working_area *source;
465 uint32_t address = bank->base + offset;
466 struct reg_param reg_params[4];
467 struct armv7m_algorithm armv7m_info;
468 int retval = ERROR_OK;
469
470 /* see contib/loaders/flash/stm32x.s for src, the same is used here except for
471 * a modified *_FLASH_BASE */
472
473 static const uint8_t em357_flash_write_code[] = {
474 /* #define EM357_FLASH_CR_OFFSET 0x10
475 * #define EM357_FLASH_SR_OFFSET 0x0C
476 * write: */
477 0x08, 0x4c, /* ldr r4, EM357_FLASH_BASE */
478 0x1c, 0x44, /* add r4, r3 */
479 /* write_half_word: */
480 0x01, 0x23, /* movs r3, #0x01 */
481 0x23, 0x61, /* str r3, [r4,
482 *#EM357_FLASH_CR_OFFSET] */
483 0x30, 0xf8, 0x02, 0x3b, /* ldrh r3, [r0], #0x02 */
484 0x21, 0xf8, 0x02, 0x3b, /* strh r3, [r1], #0x02 */
485 /* busy: */
486 0xe3, 0x68, /* ldr r3, [r4,
487 *#EM357_FLASH_SR_OFFSET] */
488 0x13, 0xf0, 0x01, 0x0f, /* tst r3, #0x01 */
489 0xfb, 0xd0, /* beq busy */
490 0x13, 0xf0, 0x14, 0x0f, /* tst r3, #0x14 */
491 0x01, 0xd1, /* bne exit */
492 0x01, 0x3a, /* subs r2, r2, #0x01 */
493 0xf0, 0xd1, /* bne write_half_word */
494 /* exit: */
495 0x00, 0xbe, /* bkpt #0x00 */
496 0x00, 0x80, 0x00, 0x40, /* EM357_FLASH_BASE: .word 0x40008000 */
497 };
498
499 /* flash write code */
500 if (target_alloc_working_area(target, sizeof(em357_flash_write_code),
501 &write_algorithm) != ERROR_OK) {
502 LOG_WARNING("no working area available, can't do block memory writes");
503 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
504 }
505
506 retval = target_write_buffer(target, write_algorithm->address,
507 sizeof(em357_flash_write_code), em357_flash_write_code);
508 if (retval != ERROR_OK)
509 return retval;
510
511 /* memory buffer */
512 while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
513 buffer_size /= 2;
514 if (buffer_size <= 256) {
515 /* we already allocated the writing code, but failed to get a
516 * buffer, free the algorithm */
517 target_free_working_area(target, write_algorithm);
518
519 LOG_WARNING(
520 "no large enough working area available, can't do block memory writes");
521 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
522 }
523 }
524
525 armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
526 armv7m_info.core_mode = ARM_MODE_THREAD;
527
528 init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
529 init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
530 init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
531 init_reg_param(&reg_params[3], "r3", 32, PARAM_IN_OUT);
532
533 while (count > 0) {
534 uint32_t thisrun_count = (count > (buffer_size / 2)) ?
535 (buffer_size / 2) : count;
536
537 retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer);
538 if (retval != ERROR_OK)
539 break;
540
541 buf_set_u32(reg_params[0].value, 0, 32, source->address);
542 buf_set_u32(reg_params[1].value, 0, 32, address);
543 buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
544 buf_set_u32(reg_params[3].value, 0, 32, 0);
545
546 retval = target_run_algorithm(target, 0, NULL, 4, reg_params,
547 write_algorithm->address, 0, 10000, &armv7m_info);
548 if (retval != ERROR_OK) {
549 LOG_ERROR("error executing em357 flash write algorithm");
550 break;
551 }
552
553 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_PGERR) {
554 LOG_ERROR("flash memory not erased before writing");
555 /* Clear but report errors */
556 target_write_u32(target, EM357_FLASH_SR, FLASH_PGERR);
557 retval = ERROR_FAIL;
558 break;
559 }
560
561 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_WRPRTERR) {
562 LOG_ERROR("flash memory write protected");
563 /* Clear but report errors */
564 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR);
565 retval = ERROR_FAIL;
566 break;
567 }
568
569 buffer += thisrun_count * 2;
570 address += thisrun_count * 2;
571 count -= thisrun_count;
572 }
573
574 target_free_working_area(target, source);
575 target_free_working_area(target, write_algorithm);
576
577 destroy_reg_param(&reg_params[0]);
578 destroy_reg_param(&reg_params[1]);
579 destroy_reg_param(&reg_params[2]);
580 destroy_reg_param(&reg_params[3]);
581
582 return retval;
583 }
584
585 static int em357_write(struct flash_bank *bank, const uint8_t *buffer,
586 uint32_t offset, uint32_t count)
587 {
588 struct target *target = bank->target;
589 uint32_t words_remaining = (count / 2);
590 uint32_t bytes_remaining = (count & 0x00000001);
591 uint32_t address = bank->base + offset;
592 uint32_t bytes_written = 0;
593 int retval;
594
595 if (bank->target->state != TARGET_HALTED) {
596 LOG_ERROR("Target not halted");
597 return ERROR_TARGET_NOT_HALTED;
598 }
599
600 if (offset & 0x1) {
601 LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
602 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
603 }
604
605 /* unlock flash registers */
606 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
607 if (retval != ERROR_OK)
608 return retval;
609 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
610 if (retval != ERROR_OK)
611 return retval;
612
613 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
614
615 /* multiple half words (2-byte) to be programmed? */
616 if (words_remaining > 0) {
617 /* try using a block write */
618 retval = em357_write_block(bank, buffer, offset, words_remaining);
619 if (retval != ERROR_OK) {
620 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
621 /* if block write failed (no sufficient working area),
622 * we use normal (slow) single dword accesses */
623 LOG_WARNING(
624 "couldn't use block writes, falling back to single memory accesses");
625 }
626 } else {
627 buffer += words_remaining * 2;
628 address += words_remaining * 2;
629 words_remaining = 0;
630 }
631 }
632
633 if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
634 return retval;
635
636 while (words_remaining > 0) {
637 uint16_t value;
638 memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
639
640 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
641 if (retval != ERROR_OK)
642 return retval;
643 retval = target_write_u16(target, address, value);
644 if (retval != ERROR_OK)
645 return retval;
646
647 retval = em357_wait_status_busy(bank, 5);
648 if (retval != ERROR_OK)
649 return retval;
650
651 bytes_written += 2;
652 words_remaining--;
653 address += 2;
654 }
655
656 if (bytes_remaining) {
657 uint16_t value = 0xffff;
658 memcpy(&value, buffer + bytes_written, bytes_remaining);
659
660 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
661 if (retval != ERROR_OK)
662 return retval;
663 retval = target_write_u16(target, address, value);
664 if (retval != ERROR_OK)
665 return retval;
666
667 retval = em357_wait_status_busy(bank, 5);
668 if (retval != ERROR_OK)
669 return retval;
670 }
671
672 return target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
673 }
674
675 static int em357_probe(struct flash_bank *bank)
676 {
677 struct target *target = bank->target;
678 struct em357_flash_bank *em357_info = bank->driver_priv;
679 int i;
680 uint16_t num_pages;
681 int page_size;
682 uint32_t base_address = 0x08000000;
683
684 em357_info->probed = 0;
685
686 switch (bank->size) {
687 case 0x10000:
688 /* 64k -- 64 1k pages */
689 num_pages = 64;
690 page_size = 1024;
691 break;
692 case 0x20000:
693 /* 128k -- 128 1k pages */
694 num_pages = 128;
695 page_size = 1024;
696 break;
697 case 0x30000:
698 /* 192k -- 96 2k pages */
699 num_pages = 96;
700 page_size = 2048;
701 break;
702 case 0x40000:
703 /* 256k -- 128 2k pages */
704 num_pages = 128;
705 page_size = 2048;
706 break;
707 default:
708 LOG_WARNING("No size specified for em357 flash driver, assuming 192k!");
709 num_pages = 96;
710 page_size = 2048;
711 break;
712 }
713
714 /* Enable FPEC CLK */
715 int retval = target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
716 if (retval != ERROR_OK)
717 return retval;
718
719 em357_info->ppage_size = 4;
720
721 LOG_INFO("flash size = %dkbytes", num_pages*page_size/1024);
722
723 if (bank->sectors) {
724 free(bank->sectors);
725 bank->sectors = NULL;
726 }
727
728 bank->base = base_address;
729 bank->size = (num_pages * page_size);
730 bank->num_sectors = num_pages;
731 bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
732
733 for (i = 0; i < num_pages; i++) {
734 bank->sectors[i].offset = i * page_size;
735 bank->sectors[i].size = page_size;
736 bank->sectors[i].is_erased = -1;
737 bank->sectors[i].is_protected = 1;
738 }
739
740 em357_info->probed = 1;
741
742 return ERROR_OK;
743 }
744
745 static int em357_auto_probe(struct flash_bank *bank)
746 {
747 struct em357_flash_bank *em357_info = bank->driver_priv;
748 if (em357_info->probed)
749 return ERROR_OK;
750 return em357_probe(bank);
751 }
752
753 COMMAND_HANDLER(em357_handle_lock_command)
754 {
755 struct target *target = NULL;
756 struct em357_flash_bank *em357_info = NULL;
757
758 if (CMD_ARGC < 1)
759 return ERROR_COMMAND_SYNTAX_ERROR;
760
761 struct flash_bank *bank;
762 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
763 if (ERROR_OK != retval)
764 return retval;
765
766 em357_info = bank->driver_priv;
767
768 target = bank->target;
769
770 if (target->state != TARGET_HALTED) {
771 LOG_ERROR("Target not halted");
772 return ERROR_TARGET_NOT_HALTED;
773 }
774
775 if (em357_erase_options(bank) != ERROR_OK) {
776 command_print(CMD_CTX, "em357 failed to erase options");
777 return ERROR_OK;
778 }
779
780 /* set readout protection */
781 em357_info->option_bytes.RDP = 0;
782
783 if (em357_write_options(bank) != ERROR_OK) {
784 command_print(CMD_CTX, "em357 failed to lock device");
785 return ERROR_OK;
786 }
787
788 command_print(CMD_CTX, "em357 locked");
789
790 return ERROR_OK;
791 }
792
793 COMMAND_HANDLER(em357_handle_unlock_command)
794 {
795 struct target *target = NULL;
796
797 if (CMD_ARGC < 1)
798 return ERROR_COMMAND_SYNTAX_ERROR;
799
800 struct flash_bank *bank;
801 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
802 if (ERROR_OK != retval)
803 return retval;
804
805 target = bank->target;
806
807 if (target->state != TARGET_HALTED) {
808 LOG_ERROR("Target not halted");
809 return ERROR_TARGET_NOT_HALTED;
810 }
811
812 if (em357_erase_options(bank) != ERROR_OK) {
813 command_print(CMD_CTX, "em357 failed to unlock device");
814 return ERROR_OK;
815 }
816
817 if (em357_write_options(bank) != ERROR_OK) {
818 command_print(CMD_CTX, "em357 failed to lock device");
819 return ERROR_OK;
820 }
821
822 command_print(CMD_CTX, "em357 unlocked.\n"
823 "INFO: a reset or power cycle is required "
824 "for the new settings to take effect.");
825
826 return ERROR_OK;
827 }
828
829 static int em357_mass_erase(struct flash_bank *bank)
830 {
831 struct target *target = bank->target;
832
833 if (target->state != TARGET_HALTED) {
834 LOG_ERROR("Target not halted");
835 return ERROR_TARGET_NOT_HALTED;
836 }
837
838 /* Make sure the flash clock is on */
839 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
840
841 /* unlock option flash registers */
842 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
843 if (retval != ERROR_OK)
844 return retval;
845 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
846 if (retval != ERROR_OK)
847 return retval;
848
849 /* mass erase flash memory */
850 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER);
851 if (retval != ERROR_OK)
852 return retval;
853 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER | FLASH_STRT);
854 if (retval != ERROR_OK)
855 return retval;
856
857 retval = em357_wait_status_busy(bank, 100);
858 if (retval != ERROR_OK)
859 return retval;
860
861 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
862 if (retval != ERROR_OK)
863 return retval;
864
865 return ERROR_OK;
866 }
867
868 COMMAND_HANDLER(em357_handle_mass_erase_command)
869 {
870 int i;
871
872 if (CMD_ARGC < 1)
873 return ERROR_COMMAND_SYNTAX_ERROR;
874
875 struct flash_bank *bank;
876 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
877 if (ERROR_OK != retval)
878 return retval;
879
880 retval = em357_mass_erase(bank);
881 if (retval == ERROR_OK) {
882 /* set all sectors as erased */
883 for (i = 0; i < bank->num_sectors; i++)
884 bank->sectors[i].is_erased = 1;
885
886 command_print(CMD_CTX, "em357 mass erase complete");
887 } else
888 command_print(CMD_CTX, "em357 mass erase failed");
889
890 return retval;
891 }
892
893 static const struct command_registration em357_exec_command_handlers[] = {
894 {
895 .name = "lock",
896 .usage = "<bank>",
897 .handler = em357_handle_lock_command,
898 .mode = COMMAND_EXEC,
899 .help = "Lock entire flash device.",
900 },
901 {
902 .name = "unlock",
903 .usage = "<bank>",
904 .handler = em357_handle_unlock_command,
905 .mode = COMMAND_EXEC,
906 .help = "Unlock entire protected flash device.",
907 },
908 {
909 .name = "mass_erase",
910 .usage = "<bank>",
911 .handler = em357_handle_mass_erase_command,
912 .mode = COMMAND_EXEC,
913 .help = "Erase entire flash device.",
914 },
915 COMMAND_REGISTRATION_DONE
916 };
917
918 static const struct command_registration em357_command_handlers[] = {
919 {
920 .name = "em357",
921 .mode = COMMAND_ANY,
922 .help = "em357 flash command group",
923 .usage = "",
924 .chain = em357_exec_command_handlers,
925 },
926 COMMAND_REGISTRATION_DONE
927 };
928
929 struct flash_driver em357_flash = {
930 .name = "em357",
931 .commands = em357_command_handlers,
932 .flash_bank_command = em357_flash_bank_command,
933 .erase = em357_erase,
934 .protect = em357_protect,
935 .write = em357_write,
936 .read = default_flash_read,
937 .probe = em357_probe,
938 .auto_probe = em357_auto_probe,
939 .erase_check = default_flash_blank_check,
940 .protect_check = em357_protect_check,
941 };
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