Remove FSF address from GPL notices
[openocd.git] / src / flash / nor / avrf.c
1 /***************************************************************************
2 * Copyright (C) 2009 by Simon Qian *
3 * SimonQian@SimonQian.com *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
17 ***************************************************************************/
18
19 #ifdef HAVE_CONFIG_H
20 #include "config.h"
21 #endif
22
23 #include "imp.h"
24 #include <target/avrt.h>
25
26 /* AVR_JTAG_Instructions */
27 #define AVR_JTAG_INS_LEN 4
28 /* Public Instructions: */
29 #define AVR_JTAG_INS_EXTEST 0x00
30 #define AVR_JTAG_INS_IDCODE 0x01
31 #define AVR_JTAG_INS_SAMPLE_PRELOAD 0x02
32 #define AVR_JTAG_INS_BYPASS 0x0F
33 /* AVR Specified Public Instructions: */
34 #define AVR_JTAG_INS_AVR_RESET 0x0C
35 #define AVR_JTAG_INS_PROG_ENABLE 0x04
36 #define AVR_JTAG_INS_PROG_COMMANDS 0x05
37 #define AVR_JTAG_INS_PROG_PAGELOAD 0x06
38 #define AVR_JTAG_INS_PROG_PAGEREAD 0x07
39
40 /* Data Registers: */
41 #define AVR_JTAG_REG_Bypass_Len 1
42 #define AVR_JTAG_REG_DeviceID_Len 32
43
44 #define AVR_JTAG_REG_Reset_Len 1
45 #define AVR_JTAG_REG_JTAGID_Len 32
46 #define AVR_JTAG_REG_ProgrammingEnable_Len 16
47 #define AVR_JTAG_REG_ProgrammingCommand_Len 15
48 #define AVR_JTAG_REG_FlashDataByte_Len 16
49
50 struct avrf_type {
51 char name[15];
52 uint16_t chip_id;
53 int flash_page_size;
54 int flash_page_num;
55 int eeprom_page_size;
56 int eeprom_page_num;
57 };
58
59 struct avrf_flash_bank {
60 int ppage_size;
61 int probed;
62 };
63
64 static const struct avrf_type avft_chips_info[] = {
65 /* name, chip_id, flash_page_size, flash_page_num,
66 * eeprom_page_size, eeprom_page_num
67 */
68 {"atmega128", 0x9702, 256, 512, 8, 512},
69 {"at90can128", 0x9781, 256, 512, 8, 512},
70 {"at90usb128", 0x9782, 256, 512, 8, 512},
71 {"atmega164p", 0x940a, 128, 128, 4, 128},
72 {"atmega324p", 0x9508, 128, 256, 4, 256},
73 {"atmega324pa", 0x9511, 128, 256, 4, 256},
74 {"atmega644p", 0x960a, 256, 256, 8, 256},
75 {"atmega1284p", 0x9705, 256, 512, 8, 512},
76 };
77
78 /* avr program functions */
79 static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
80 {
81 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
82 avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_Reset_Len);
83
84 return ERROR_OK;
85 }
86
87 static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
88 {
89 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
90 avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
91
92 return ERROR_OK;
93 }
94
95 static int avr_jtagprg_enterprogmode(struct avr_common *avr)
96 {
97 avr_jtag_reset(avr, 1);
98
99 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
100 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
101
102 return ERROR_OK;
103 }
104
105 static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
106 {
107 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
108 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
109 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
110
111 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
112 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
113
114 avr_jtag_reset(avr, 0);
115
116 return ERROR_OK;
117 }
118
119 static int avr_jtagprg_chiperase(struct avr_common *avr)
120 {
121 uint32_t poll_value;
122
123 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
124 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
125 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
126 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
127 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
128
129 do {
130 poll_value = 0;
131 avr_jtag_senddat(avr->jtag_info.tap,
132 &poll_value,
133 0x3380,
134 AVR_JTAG_REG_ProgrammingCommand_Len);
135 if (ERROR_OK != mcu_execute_queue())
136 return ERROR_FAIL;
137 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
138 } while (!(poll_value & 0x0200));
139
140 return ERROR_OK;
141 }
142
143 static int avr_jtagprg_writeflashpage(struct avr_common *avr,
144 const uint8_t *page_buf,
145 uint32_t buf_size,
146 uint32_t addr,
147 uint32_t page_size)
148 {
149 uint32_t i, poll_value;
150
151 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
152 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
153
154 /* load addr high byte */
155 avr_jtag_senddat(avr->jtag_info.tap,
156 NULL,
157 0x0700 | ((addr >> 9) & 0xFF),
158 AVR_JTAG_REG_ProgrammingCommand_Len);
159
160 /* load addr low byte */
161 avr_jtag_senddat(avr->jtag_info.tap,
162 NULL,
163 0x0300 | ((addr >> 1) & 0xFF),
164 AVR_JTAG_REG_ProgrammingCommand_Len);
165
166 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
167
168 for (i = 0; i < page_size; i++) {
169 if (i < buf_size)
170 avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
171 else
172 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
173 }
174
175 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
176
177 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
178 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
179 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
180 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
181
182 do {
183 poll_value = 0;
184 avr_jtag_senddat(avr->jtag_info.tap,
185 &poll_value,
186 0x3700,
187 AVR_JTAG_REG_ProgrammingCommand_Len);
188 if (ERROR_OK != mcu_execute_queue())
189 return ERROR_FAIL;
190 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
191 } while (!(poll_value & 0x0200));
192
193 return ERROR_OK;
194 }
195
196 FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
197 {
198 struct avrf_flash_bank *avrf_info;
199
200 if (CMD_ARGC < 6)
201 return ERROR_COMMAND_SYNTAX_ERROR;
202
203 avrf_info = malloc(sizeof(struct avrf_flash_bank));
204 bank->driver_priv = avrf_info;
205
206 avrf_info->probed = 0;
207
208 return ERROR_OK;
209 }
210
211 static int avrf_erase(struct flash_bank *bank, int first, int last)
212 {
213 struct target *target = bank->target;
214 struct avr_common *avr = target->arch_info;
215 int status;
216
217 LOG_DEBUG("%s", __func__);
218
219 if (target->state != TARGET_HALTED) {
220 LOG_ERROR("Target not halted");
221 return ERROR_TARGET_NOT_HALTED;
222 }
223
224 status = avr_jtagprg_enterprogmode(avr);
225 if (status != ERROR_OK)
226 return status;
227
228 status = avr_jtagprg_chiperase(avr);
229 if (status != ERROR_OK)
230 return status;
231
232 return avr_jtagprg_leaveprogmode(avr);
233 }
234
235 static int avrf_protect(struct flash_bank *bank, int set, int first, int last)
236 {
237 LOG_INFO("%s", __func__);
238 return ERROR_OK;
239 }
240
241 static int avrf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
242 {
243 struct target *target = bank->target;
244 struct avr_common *avr = target->arch_info;
245 uint32_t cur_size, cur_buffer_size, page_size;
246
247 if (bank->target->state != TARGET_HALTED) {
248 LOG_ERROR("Target not halted");
249 return ERROR_TARGET_NOT_HALTED;
250 }
251
252 page_size = bank->sectors[0].size;
253 if ((offset % page_size) != 0) {
254 LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
255 offset,
256 page_size);
257 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
258 }
259
260 LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
261 LOG_DEBUG("count is %" PRId32 "", count);
262
263 if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
264 return ERROR_FAIL;
265
266 cur_size = 0;
267 while (count > 0) {
268 if (count > page_size)
269 cur_buffer_size = page_size;
270 else
271 cur_buffer_size = count;
272 avr_jtagprg_writeflashpage(avr,
273 buffer + cur_size,
274 cur_buffer_size,
275 offset + cur_size,
276 page_size);
277 count -= cur_buffer_size;
278 cur_size += cur_buffer_size;
279
280 keep_alive();
281 }
282
283 return avr_jtagprg_leaveprogmode(avr);
284 }
285
286 #define EXTRACT_MFG(X) (((X) & 0xffe) >> 1)
287 #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
288 #define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
289
290 static int avrf_probe(struct flash_bank *bank)
291 {
292 struct target *target = bank->target;
293 struct avrf_flash_bank *avrf_info = bank->driver_priv;
294 struct avr_common *avr = target->arch_info;
295 const struct avrf_type *avr_info = NULL;
296 int i;
297 uint32_t device_id;
298
299 if (bank->target->state != TARGET_HALTED) {
300 LOG_ERROR("Target not halted");
301 return ERROR_TARGET_NOT_HALTED;
302 }
303
304 avrf_info->probed = 0;
305
306 avr_jtag_read_jtagid(avr, &device_id);
307 if (ERROR_OK != mcu_execute_queue())
308 return ERROR_FAIL;
309
310 LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
311 if (EXTRACT_MFG(device_id) != 0x1F)
312 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
313 EXTRACT_MFG(device_id),
314 0x1F);
315
316 for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
317 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
318 avr_info = &avft_chips_info[i];
319 LOG_INFO("target device is %s", avr_info->name);
320 break;
321 }
322 }
323
324 if (avr_info != NULL) {
325 if (bank->sectors) {
326 free(bank->sectors);
327 bank->sectors = NULL;
328 }
329
330 /* chip found */
331 bank->base = 0x00000000;
332 bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
333 bank->num_sectors = avr_info->flash_page_num;
334 bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
335
336 for (i = 0; i < avr_info->flash_page_num; i++) {
337 bank->sectors[i].offset = i * avr_info->flash_page_size;
338 bank->sectors[i].size = avr_info->flash_page_size;
339 bank->sectors[i].is_erased = -1;
340 bank->sectors[i].is_protected = 1;
341 }
342
343 avrf_info->probed = 1;
344 return ERROR_OK;
345 } else {
346 /* chip not supported */
347 LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
348
349 avrf_info->probed = 1;
350 return ERROR_FAIL;
351 }
352 }
353
354 static int avrf_auto_probe(struct flash_bank *bank)
355 {
356 struct avrf_flash_bank *avrf_info = bank->driver_priv;
357 if (avrf_info->probed)
358 return ERROR_OK;
359 return avrf_probe(bank);
360 }
361
362 static int avrf_protect_check(struct flash_bank *bank)
363 {
364 LOG_INFO("%s", __func__);
365 return ERROR_OK;
366 }
367
368 static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
369 {
370 struct target *target = bank->target;
371 struct avr_common *avr = target->arch_info;
372 const struct avrf_type *avr_info = NULL;
373 int i;
374 uint32_t device_id;
375
376 if (bank->target->state != TARGET_HALTED) {
377 LOG_ERROR("Target not halted");
378 return ERROR_TARGET_NOT_HALTED;
379 }
380
381 avr_jtag_read_jtagid(avr, &device_id);
382 if (ERROR_OK != mcu_execute_queue())
383 return ERROR_FAIL;
384
385 LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
386 if (EXTRACT_MFG(device_id) != 0x1F)
387 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
388 EXTRACT_MFG(device_id),
389 0x1F);
390
391 for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
392 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
393 avr_info = &avft_chips_info[i];
394 LOG_INFO("target device is %s", avr_info->name);
395
396 break;
397 }
398 }
399
400 if (avr_info != NULL) {
401 /* chip found */
402 snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
403 EXTRACT_VER(device_id));
404 return ERROR_OK;
405 } else {
406 /* chip not supported */
407 snprintf(buf, buf_size, "Cannot identify target as a avr\n");
408 return ERROR_FLASH_OPERATION_FAILED;
409 }
410 }
411
412 static int avrf_mass_erase(struct flash_bank *bank)
413 {
414 struct target *target = bank->target;
415 struct avr_common *avr = target->arch_info;
416
417 if (target->state != TARGET_HALTED) {
418 LOG_ERROR("Target not halted");
419 return ERROR_TARGET_NOT_HALTED;
420 }
421
422 if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
423 || (ERROR_OK != avr_jtagprg_chiperase(avr))
424 || (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
425 return ERROR_FAIL;
426
427 return ERROR_OK;
428 }
429
430 COMMAND_HANDLER(avrf_handle_mass_erase_command)
431 {
432 int i;
433
434 if (CMD_ARGC < 1)
435 return ERROR_COMMAND_SYNTAX_ERROR;
436
437 struct flash_bank *bank;
438 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
439 if (ERROR_OK != retval)
440 return retval;
441
442 if (avrf_mass_erase(bank) == ERROR_OK) {
443 /* set all sectors as erased */
444 for (i = 0; i < bank->num_sectors; i++)
445 bank->sectors[i].is_erased = 1;
446
447 command_print(CMD_CTX, "avr mass erase complete");
448 } else
449 command_print(CMD_CTX, "avr mass erase failed");
450
451 LOG_DEBUG("%s", __func__);
452 return ERROR_OK;
453 }
454
455 static const struct command_registration avrf_exec_command_handlers[] = {
456 {
457 .name = "mass_erase",
458 .usage = "<bank>",
459 .handler = avrf_handle_mass_erase_command,
460 .mode = COMMAND_EXEC,
461 .help = "erase entire device",
462 },
463 COMMAND_REGISTRATION_DONE
464 };
465 static const struct command_registration avrf_command_handlers[] = {
466 {
467 .name = "avrf",
468 .mode = COMMAND_ANY,
469 .help = "AVR flash command group",
470 .usage = "",
471 .chain = avrf_exec_command_handlers,
472 },
473 COMMAND_REGISTRATION_DONE
474 };
475
476 struct flash_driver avr_flash = {
477 .name = "avr",
478 .commands = avrf_command_handlers,
479 .flash_bank_command = avrf_flash_bank_command,
480 .erase = avrf_erase,
481 .protect = avrf_protect,
482 .write = avrf_write,
483 .read = default_flash_read,
484 .probe = avrf_probe,
485 .auto_probe = avrf_auto_probe,
486 .erase_check = default_flash_blank_check,
487 .protect_check = avrf_protect_check,
488 .info = avrf_info,
489 };