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[openocd.git] / src / flash / nor / avrf.c
1 /***************************************************************************
2 * Copyright (C) 2009 by Simon Qian *
3 * SimonQian@SimonQian.com *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20 #ifdef HAVE_CONFIG_H
21 #include "config.h"
22 #endif
23
24 #include "imp.h"
25 #include <target/avrt.h>
26
27
28 /* AVR_JTAG_Instructions */
29 #define AVR_JTAG_INS_LEN 4
30 // Public Instructions:
31 #define AVR_JTAG_INS_EXTEST 0x00
32 #define AVR_JTAG_INS_IDCODE 0x01
33 #define AVR_JTAG_INS_SAMPLE_PRELOAD 0x02
34 #define AVR_JTAG_INS_BYPASS 0x0F
35 // AVR Specified Public Instructions:
36 #define AVR_JTAG_INS_AVR_RESET 0x0C
37 #define AVR_JTAG_INS_PROG_ENABLE 0x04
38 #define AVR_JTAG_INS_PROG_COMMANDS 0x05
39 #define AVR_JTAG_INS_PROG_PAGELOAD 0x06
40 #define AVR_JTAG_INS_PROG_PAGEREAD 0x07
41
42 // Data Registers:
43 #define AVR_JTAG_REG_Bypass_Len 1
44 #define AVR_JTAG_REG_DeviceID_Len 32
45
46 #define AVR_JTAG_REG_Reset_Len 1
47 #define AVR_JTAG_REG_JTAGID_Len 32
48 #define AVR_JTAG_REG_ProgrammingEnable_Len 16
49 #define AVR_JTAG_REG_ProgrammingCommand_Len 15
50 #define AVR_JTAG_REG_FlashDataByte_Len 16
51
52 struct avrf_type
53 {
54 char name[15];
55 uint16_t chip_id;
56 int flash_page_size;
57 int flash_page_num;
58 int eeprom_page_size;
59 int eeprom_page_num;
60 };
61
62 struct avrf_flash_bank
63 {
64 int ppage_size;
65 int probed;
66 };
67
68 static struct avrf_type avft_chips_info[] =
69 {
70 /* name, chip_id, flash_page_size, flash_page_num,
71 * eeprom_page_size, eeprom_page_num
72 */
73 {"atmega128", 0x9702, 256, 512, 8, 512},
74 {"at90can128", 0x9781, 256, 512, 8, 512},
75 };
76
77 /* avr program functions */
78 static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
79 {
80 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
81 avr_jtag_senddat(avr->jtag_info.tap, NULL, reset ,AVR_JTAG_REG_Reset_Len);
82
83 return ERROR_OK;
84 }
85
86 static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
87 {
88 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
89 avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
90
91 return ERROR_OK;
92 }
93
94 static int avr_jtagprg_enterprogmode(struct avr_common *avr)
95 {
96 avr_jtag_reset(avr, 1);
97
98 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
99 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
100
101 return ERROR_OK;
102 }
103
104 static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
105 {
106 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
107 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
108 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
109
110 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
111 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
112
113 avr_jtag_reset(avr, 0);
114
115 return ERROR_OK;
116 }
117
118 static int avr_jtagprg_chiperase(struct avr_common *avr)
119 {
120 uint32_t poll_value;
121
122 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
123 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
124 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
125 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
126 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
127
128 do {
129 poll_value = 0;
130 avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
131 if (ERROR_OK != mcu_execute_queue())
132 {
133 return ERROR_FAIL;
134 }
135 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
136 } while (!(poll_value & 0x0200));
137
138 return ERROR_OK;
139 }
140
141 static int avr_jtagprg_writeflashpage(struct avr_common *avr, uint8_t *page_buf, uint32_t buf_size, uint32_t addr, uint32_t page_size)
142 {
143 uint32_t i, poll_value;
144
145 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
146 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
147
148 // load addr high byte
149 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0700 | ((addr >> 9) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
150
151 // load addr low byte
152 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0300 | ((addr >> 1) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
153
154 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
155
156 for (i = 0; i < page_size; i++)
157 {
158 if (i < buf_size)
159 {
160 avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
161 }
162 else
163 {
164 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
165 }
166 }
167
168 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
169
170 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
171 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
172 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
173 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
174
175 do {
176 poll_value = 0;
177 avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
178 if (ERROR_OK != mcu_execute_queue())
179 {
180 return ERROR_FAIL;
181 }
182 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
183 } while (!(poll_value & 0x0200));
184
185 return ERROR_OK;
186 }
187
188 FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
189 {
190 struct avrf_flash_bank *avrf_info;
191
192 if (CMD_ARGC < 6)
193 {
194 return ERROR_COMMAND_SYNTAX_ERROR;
195 }
196
197 avrf_info = malloc(sizeof(struct avrf_flash_bank));
198 bank->driver_priv = avrf_info;
199
200 avrf_info->probed = 0;
201
202 return ERROR_OK;
203 }
204
205 static int avrf_erase(struct flash_bank *bank, int first, int last)
206 {
207 struct target *target = bank->target;
208 struct avr_common *avr = target->arch_info;
209 int status;
210
211 LOG_DEBUG("%s", __FUNCTION__);
212
213 if (target->state != TARGET_HALTED)
214 {
215 LOG_ERROR("Target not halted");
216 return ERROR_TARGET_NOT_HALTED;
217 }
218
219 status = avr_jtagprg_enterprogmode(avr);
220 if (status != ERROR_OK)
221 return status;
222
223 status = avr_jtagprg_chiperase(avr);
224 if (status != ERROR_OK)
225 return status;
226
227 return avr_jtagprg_leaveprogmode(avr);
228 }
229
230 static int avrf_protect(struct flash_bank *bank, int set, int first, int last)
231 {
232 LOG_INFO("%s", __FUNCTION__);
233 return ERROR_OK;
234 }
235
236 static int avrf_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
237 {
238 struct target *target = bank->target;
239 struct avr_common *avr = target->arch_info;
240 uint32_t cur_size, cur_buffer_size, page_size;
241
242 if (bank->target->state != TARGET_HALTED)
243 {
244 LOG_ERROR("Target not halted");
245 return ERROR_TARGET_NOT_HALTED;
246 }
247
248 page_size = bank->sectors[0].size;
249 if ((offset % page_size) != 0)
250 {
251 LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment", offset, page_size);
252 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
253 }
254
255 LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
256 LOG_DEBUG("count is %" PRId32 "", count);
257
258 if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
259 {
260 return ERROR_FAIL;
261 }
262
263 cur_size = 0;
264 while (count > 0)
265 {
266 if (count > page_size)
267 {
268 cur_buffer_size = page_size;
269 }
270 else
271 {
272 cur_buffer_size = count;
273 }
274 avr_jtagprg_writeflashpage(avr, buffer + cur_size, cur_buffer_size, offset + cur_size, page_size);
275 count -= cur_buffer_size;
276 cur_size += cur_buffer_size;
277
278 keep_alive();
279 }
280
281 return avr_jtagprg_leaveprogmode(avr);
282 }
283
284 #define EXTRACT_MFG(X) (((X) & 0xffe) >> 1)
285 #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
286 #define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
287 static int avrf_probe(struct flash_bank *bank)
288 {
289 struct target *target = bank->target;
290 struct avrf_flash_bank *avrf_info = bank->driver_priv;
291 struct avr_common *avr = target->arch_info;
292 struct avrf_type *avr_info = NULL;
293 int i;
294 uint32_t device_id;
295
296 if (bank->target->state != TARGET_HALTED)
297 {
298 LOG_ERROR("Target not halted");
299 return ERROR_TARGET_NOT_HALTED;
300 }
301
302 avrf_info->probed = 0;
303
304 avr_jtag_read_jtagid(avr, &device_id);
305 if (ERROR_OK != mcu_execute_queue())
306 {
307 return ERROR_FAIL;
308 }
309
310 LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
311 if (EXTRACT_MFG(device_id) != 0x1F)
312 {
313 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
314 }
315
316 for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++)
317 {
318 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
319 {
320 avr_info = &avft_chips_info[i];
321 LOG_INFO("target device is %s", avr_info->name);
322 break;
323 }
324 }
325
326 if (avr_info != NULL)
327 {
328 if (bank->sectors)
329 {
330 free(bank->sectors);
331 bank->sectors = NULL;
332 }
333
334 // chip found
335 bank->base = 0x00000000;
336 bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
337 bank->num_sectors = avr_info->flash_page_num;
338 bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
339
340 for (i = 0; i < avr_info->flash_page_num; i++)
341 {
342 bank->sectors[i].offset = i * avr_info->flash_page_size;
343 bank->sectors[i].size = avr_info->flash_page_size;
344 bank->sectors[i].is_erased = -1;
345 bank->sectors[i].is_protected = 1;
346 }
347
348 avrf_info->probed = 1;
349 return ERROR_OK;
350 }
351 else
352 {
353 // chip not supported
354 LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
355
356 avrf_info->probed = 1;
357 return ERROR_FAIL;
358 }
359 }
360
361 static int avrf_auto_probe(struct flash_bank *bank)
362 {
363 struct avrf_flash_bank *avrf_info = bank->driver_priv;
364 if (avrf_info->probed)
365 return ERROR_OK;
366 return avrf_probe(bank);
367 }
368
369 static int avrf_protect_check(struct flash_bank *bank)
370 {
371 LOG_INFO("%s", __FUNCTION__);
372 return ERROR_OK;
373 }
374
375 static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
376 {
377 struct target *target = bank->target;
378 struct avr_common *avr = target->arch_info;
379 struct avrf_type *avr_info = NULL;
380 int i;
381 uint32_t device_id;
382
383 if (bank->target->state != TARGET_HALTED)
384 {
385 LOG_ERROR("Target not halted");
386 return ERROR_TARGET_NOT_HALTED;
387 }
388
389 avr_jtag_read_jtagid(avr, &device_id);
390 if (ERROR_OK != mcu_execute_queue())
391 {
392 return ERROR_FAIL;
393 }
394
395 LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
396 if (EXTRACT_MFG(device_id) != 0x1F)
397 {
398 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
399 }
400
401 for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++)
402 {
403 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
404 {
405 avr_info = &avft_chips_info[i];
406 LOG_INFO("target device is %s", avr_info->name);
407
408 break;
409 }
410 }
411
412 if (avr_info != NULL)
413 {
414 // chip found
415 snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name, EXTRACT_VER(device_id));
416 return ERROR_OK;
417 }
418 else
419 {
420 // chip not supported
421 snprintf(buf, buf_size, "Cannot identify target as a avr\n");
422 return ERROR_FLASH_OPERATION_FAILED;
423 }
424 }
425
426 static int avrf_mass_erase(struct flash_bank *bank)
427 {
428 struct target *target = bank->target;
429 struct avr_common *avr = target->arch_info;
430
431 if (target->state != TARGET_HALTED)
432 {
433 LOG_ERROR("Target not halted");
434 return ERROR_TARGET_NOT_HALTED;
435 }
436
437 if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
438 || (ERROR_OK != avr_jtagprg_chiperase(avr))
439 || (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
440 {
441 return ERROR_FAIL;
442 }
443
444 return ERROR_OK;
445 }
446
447 COMMAND_HANDLER(avrf_handle_mass_erase_command)
448 {
449 int i;
450
451 if (CMD_ARGC < 1)
452 {
453 return ERROR_COMMAND_SYNTAX_ERROR;
454 }
455
456 struct flash_bank *bank;
457 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
458 if (ERROR_OK != retval)
459 return retval;
460
461 if (avrf_mass_erase(bank) == ERROR_OK)
462 {
463 /* set all sectors as erased */
464 for (i = 0; i < bank->num_sectors; i++)
465 {
466 bank->sectors[i].is_erased = 1;
467 }
468
469 command_print(CMD_CTX, "avr mass erase complete");
470 }
471 else
472 {
473 command_print(CMD_CTX, "avr mass erase failed");
474 }
475
476 LOG_DEBUG("%s", __FUNCTION__);
477 return ERROR_OK;
478 }
479
480 static const struct command_registration avrf_exec_command_handlers[] = {
481 {
482 .name = "mass_erase",
483 .usage = "<bank>",
484 .handler = avrf_handle_mass_erase_command,
485 .mode = COMMAND_EXEC,
486 .help = "erase entire device",
487 },
488 COMMAND_REGISTRATION_DONE
489 };
490 static const struct command_registration avrf_command_handlers[] = {
491 {
492 .name = "avrf",
493 .mode = COMMAND_ANY,
494 .help = "AVR flash command group",
495 .usage = "",
496 .chain = avrf_exec_command_handlers,
497 },
498 COMMAND_REGISTRATION_DONE
499 };
500
501 struct flash_driver avr_flash = {
502 .name = "avr",
503 .commands = avrf_command_handlers,
504 .flash_bank_command = avrf_flash_bank_command,
505 .erase = avrf_erase,
506 .protect = avrf_protect,
507 .write = avrf_write,
508 .read = default_flash_read,
509 .probe = avrf_probe,
510 .auto_probe = avrf_auto_probe,
511 .erase_check = default_flash_mem_blank_check,
512 .protect_check = avrf_protect_check,
513 .info = avrf_info,
514 };
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