nit: more LOG_* \n fixes
[openocd.git] / src / flash / nor / aduc702x.c
1 /***************************************************************************
2 * Copyright (C) 2008 by Kevin McGuire *
3 * Copyright (C) 2008 by Marcel Wijlaars *
4 * Copyright (C) 2009 by Michael Ashton *
5 * *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
10 * *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
15 * *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
20 ***************************************************************************/
21
22 #ifdef HAVE_CONFIG_H
23 #include "config.h"
24 #endif
25
26 #include "imp.h"
27 #include <helper/binarybuffer.h>
28 #include <helper/time_support.h>
29 #include <target/algorithm.h>
30 #include <target/arm.h>
31
32
33 static int aduc702x_build_sector_list(struct flash_bank *bank);
34 static int aduc702x_check_flash_completion(struct target* target, unsigned int timeout_ms);
35 static int aduc702x_set_write_enable(struct target *target, int enable);
36
37 #define ADUC702x_FLASH 0xfffff800
38 #define ADUC702x_FLASH_FEESTA (0*4)
39 #define ADUC702x_FLASH_FEEMOD (1*4)
40 #define ADUC702x_FLASH_FEECON (2*4)
41 #define ADUC702x_FLASH_FEEDAT (3*4)
42 #define ADUC702x_FLASH_FEEADR (4*4)
43 #define ADUC702x_FLASH_FEESIGN (5*4)
44 #define ADUC702x_FLASH_FEEPRO (6*4)
45 #define ADUC702x_FLASH_FEEHIDE (7*4)
46
47 struct aduc702x_flash_bank {
48 struct working_area *write_algorithm;
49 };
50
51 /* flash bank aduc702x 0 0 0 0 <target#>
52 * The ADC7019-28 devices all have the same flash layout */
53 FLASH_BANK_COMMAND_HANDLER(aduc702x_flash_bank_command)
54 {
55 struct aduc702x_flash_bank *nbank;
56
57 nbank = malloc(sizeof(struct aduc702x_flash_bank));
58
59 bank->base = 0x80000;
60 bank->size = 0xF800; // top 4k not accessible
61 bank->driver_priv = nbank;
62
63 aduc702x_build_sector_list(bank);
64
65 return ERROR_OK;
66 }
67
68 static int aduc702x_build_sector_list(struct flash_bank *bank)
69 {
70 //aduc7026_struct flash_bank *aduc7026_info = bank->driver_priv;
71
72 int i = 0;
73 uint32_t offset = 0;
74
75 // sector size is 512
76 bank->num_sectors = bank->size / 512;
77 bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
78 for (i = 0; i < bank->num_sectors; ++i)
79 {
80 bank->sectors[i].offset = offset;
81 bank->sectors[i].size = 512;
82 offset += bank->sectors[i].size;
83 bank->sectors[i].is_erased = -1;
84 bank->sectors[i].is_protected = 0;
85 }
86
87 return ERROR_OK;
88 }
89
90 static int aduc702x_protect_check(struct flash_bank *bank)
91 {
92 printf("aduc702x_protect_check not implemented yet.\n");
93 return ERROR_OK;
94 }
95
96 static int aduc702x_erase(struct flash_bank *bank, int first, int last)
97 {
98 //int res;
99 int x;
100 int count;
101 //uint32_t v;
102 struct target *target = bank->target;
103
104 aduc702x_set_write_enable(target, 1);
105
106 /* mass erase */
107 if (((first | last) == 0) || ((first == 0) && (last >= bank->num_sectors))) {
108 LOG_DEBUG("performing mass erase.");
109 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, 0x3cff);
110 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, 0xffc3);
111 target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x06);
112
113 if (aduc702x_check_flash_completion(target, 3500) != ERROR_OK)
114 {
115 LOG_ERROR("mass erase failed");
116 aduc702x_set_write_enable(target, 0);
117 return ERROR_FLASH_OPERATION_FAILED;
118 }
119
120 LOG_DEBUG("mass erase successful.");
121 return ERROR_OK;
122 } else {
123 unsigned long adr;
124
125 count = last - first + 1;
126 for (x = 0; x < count; ++x)
127 {
128 adr = bank->base + ((first + x) * 512);
129
130 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, adr);
131 target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x05);
132
133 if (aduc702x_check_flash_completion(target, 50) != ERROR_OK)
134 {
135 LOG_ERROR("failed to erase sector at address 0x%08lX", adr);
136 aduc702x_set_write_enable(target, 0);
137 return ERROR_FLASH_SECTOR_NOT_ERASED;
138 }
139
140 LOG_DEBUG("erased sector at address 0x%08lX", adr);
141 }
142 }
143
144 aduc702x_set_write_enable(target, 0);
145
146 return ERROR_OK;
147 }
148
149 static int aduc702x_protect(struct flash_bank *bank, int set, int first, int last)
150 {
151 printf("aduc702x_protect not implemented yet.\n");
152 return ERROR_FLASH_OPERATION_FAILED;
153 }
154
155 /* If this fn returns ERROR_TARGET_RESOURCE_NOT_AVAILABLE, then the caller can fall
156 * back to another mechanism that does not require onboard RAM
157 *
158 * Caller should not check for other return values specifically
159 */
160 static int aduc702x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
161 {
162 struct aduc702x_flash_bank *aduc702x_info = bank->driver_priv;
163 struct target *target = bank->target;
164 uint32_t buffer_size = 7000;
165 struct working_area *source;
166 uint32_t address = bank->base + offset;
167 struct reg_param reg_params[6];
168 struct arm_algorithm armv4_5_info;
169 int retval = ERROR_OK;
170
171 if (((count%2)!=0)||((offset%2)!=0))
172 {
173 LOG_ERROR("write block must be multiple of two bytes in offset & length");
174 return ERROR_FAIL;
175 }
176
177 /* parameters:
178
179 r0 - address of source data (absolute)
180 r1 - number of halfwords to be copied
181 r2 - start address in flash (offset from beginning of flash memory)
182 r3 - exit code
183 r4 - base address of flash controller (0xFFFFF800)
184
185 registers:
186
187 r5 - scratch
188 r6 - set to 2, used to write flash command
189
190 */
191 static const uint32_t aduc702x_flash_write_code[] = {
192 //<_start>:
193 0xe3a05008, // mov r5, #8 ; 0x8
194 0xe5845004, // str r5, [r4, #4]
195 0xe3a06002, // mov r6, #2 ; 0x2
196 //<next>:
197 0xe1c421b0, // strh r2, [r4, #16]
198 0xe0d050b2, // ldrh r5, [r0], #2
199 0xe1c450bc, // strh r5, [r4, #12]
200 0xe5c46008, // strb r6, [r4, #8]
201 //<wait_complete>:
202 0xe1d430b0, // ldrh r3, [r4]
203 0xe3130004, // tst r3, #4 ; 0x4
204 0x1afffffc, // bne 1001c <wait_complete>
205 0xe2822002, // add r2, r2, #2 ; 0x2
206 0xe2511001, // subs r1, r1, #1 ; 0x1
207 0x0a000001, // beq 1003c <done>
208 0xe3130001, // tst r3, #1 ; 0x1
209 0x1afffff3, // bne 1000c <next>
210 //<done>:
211 0xeafffffe // b 1003c <done>
212 };
213
214 /* flash write code */
215 if (target_alloc_working_area(target, sizeof(aduc702x_flash_write_code),
216 &aduc702x_info->write_algorithm) != ERROR_OK)
217 {
218 LOG_WARNING("no working area available, can't do block memory writes");
219 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
220 };
221
222 retval=target_write_buffer(target, aduc702x_info->write_algorithm->address,
223 sizeof(aduc702x_flash_write_code), (uint8_t*)aduc702x_flash_write_code);
224 if (retval!=ERROR_OK)
225 {
226 return retval;
227 }
228
229 /* memory buffer */
230 while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK)
231 {
232 buffer_size /= 2;
233 if (buffer_size <= 256)
234 {
235 /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
236 if (aduc702x_info->write_algorithm)
237 target_free_working_area(target, aduc702x_info->write_algorithm);
238
239 LOG_WARNING("no large enough working area available, can't do block memory writes");
240 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
241 }
242 }
243
244 armv4_5_info.common_magic = ARM_COMMON_MAGIC;
245 armv4_5_info.core_mode = ARM_MODE_SVC;
246 armv4_5_info.core_state = ARM_STATE_ARM;
247
248 init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
249 init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
250 init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
251 init_reg_param(&reg_params[3], "r3", 32, PARAM_IN);
252 init_reg_param(&reg_params[4], "r4", 32, PARAM_OUT);
253
254 while (count > 0)
255 {
256 uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
257
258 retval=target_write_buffer(target, source->address, thisrun_count, buffer);
259 if (retval!=ERROR_OK)
260 {
261 break;
262 }
263
264 buf_set_u32(reg_params[0].value, 0, 32, source->address);
265 buf_set_u32(reg_params[1].value, 0, 32, thisrun_count/2);
266 buf_set_u32(reg_params[2].value, 0, 32, address);
267 buf_set_u32(reg_params[4].value, 0, 32, 0xFFFFF800);
268
269 if ((retval = target_run_algorithm(target, 0, NULL, 5,
270 reg_params, aduc702x_info->write_algorithm->address,
271 aduc702x_info->write_algorithm->address + sizeof(aduc702x_flash_write_code) - 4,
272 10000, &armv4_5_info)) != ERROR_OK)
273 {
274 LOG_ERROR("error executing aduc702x flash write algorithm");
275 break;
276 }
277
278 if ((buf_get_u32(reg_params[3].value, 0, 32) & 1) != 1)
279 {
280 /* FIX!!!! what does this mean??? replace w/sensible error message */
281 LOG_ERROR("aduc702x detected error writing flash");
282 retval = ERROR_FAIL;
283 break;
284 }
285
286 buffer += thisrun_count;
287 address += thisrun_count;
288 count -= thisrun_count;
289 }
290
291 target_free_working_area(target, source);
292 target_free_working_area(target, aduc702x_info->write_algorithm);
293
294 destroy_reg_param(&reg_params[0]);
295 destroy_reg_param(&reg_params[1]);
296 destroy_reg_param(&reg_params[2]);
297 destroy_reg_param(&reg_params[3]);
298 destroy_reg_param(&reg_params[4]);
299
300 return retval;
301 }
302
303 /* All-JTAG, single-access method. Very slow. Used only if there is no
304 * working area available. */
305 static int aduc702x_write_single(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
306 {
307 uint32_t x;
308 uint8_t b;
309 struct target *target = bank->target;
310
311 aduc702x_set_write_enable(target, 1);
312
313 for (x = 0; x < count; x += 2) {
314 // FEEADR = address
315 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, offset + x);
316
317 // set up data
318 if ((x + 1) == count)
319 {
320 // last byte
321 target_read_u8(target, offset + x + 1, &b);
322 }
323 else
324 b = buffer[x + 1];
325
326 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, buffer[x] | (b << 8));
327
328 // do single-write command
329 target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x02);
330
331 if (aduc702x_check_flash_completion(target, 1) != ERROR_OK)
332 {
333 LOG_ERROR("single write failed for address 0x%08lX", (unsigned long)(offset + x));
334 aduc702x_set_write_enable(target, 0);
335 return ERROR_FLASH_OPERATION_FAILED;
336 }
337
338 }
339 LOG_DEBUG("wrote %d bytes at address 0x%08lX", (int)count, (unsigned long)(offset + x));
340
341 aduc702x_set_write_enable(target, 0);
342
343 return ERROR_OK;
344 }
345
346 static int aduc702x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
347 {
348 int retval;
349
350 /* try using a block write */
351 if ((retval = aduc702x_write_block(bank, buffer, offset, count)) != ERROR_OK)
352 {
353 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
354 {
355 /* if block write failed (no sufficient working area),
356 * use normal (slow) JTAG method */
357 LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
358
359 if ((retval = aduc702x_write_single(bank, buffer, offset, count)) != ERROR_OK)
360 {
361 LOG_ERROR("slow write failed");
362 return ERROR_FLASH_OPERATION_FAILED;
363 }
364 }
365 }
366
367 return retval;
368 }
369
370 static int aduc702x_probe(struct flash_bank *bank)
371 {
372 return ERROR_OK;
373 }
374
375 static int aduc702x_info(struct flash_bank *bank, char *buf, int buf_size)
376 {
377 snprintf(buf, buf_size, "aduc702x flash driver info");
378 return ERROR_OK;
379 }
380
381 /* sets FEEMOD bit 3
382 * enable = 1 enables writes & erases, 0 disables them */
383 static int aduc702x_set_write_enable(struct target *target, int enable)
384 {
385 // don't bother to preserve int enable bit here
386 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, enable ? 8 : 0);
387
388 return ERROR_OK;
389 }
390
391 /* wait up to timeout_ms for controller to not be busy,
392 * then check whether the command passed or failed.
393 *
394 * this function sleeps 1ms between checks (after the first one),
395 * so in some cases may slow things down without a usleep after the first read */
396 static int aduc702x_check_flash_completion(struct target* target, unsigned int timeout_ms)
397 {
398 uint8_t v = 4;
399
400 long long endtime = timeval_ms() + timeout_ms;
401 while (1) {
402 target_read_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEESTA, &v);
403 if ((v & 4) == 0) break;
404 alive_sleep(1);
405 if (timeval_ms() >= endtime) break;
406 }
407
408 if (v & 2) return ERROR_FAIL;
409 // if a command is ignored, both the success and fail bits may be 0
410 else if ((v & 3) == 0) return ERROR_FAIL;
411 else return ERROR_OK;
412 }
413
414 struct flash_driver aduc702x_flash = {
415 .name = "aduc702x",
416 .flash_bank_command = aduc702x_flash_bank_command,
417 .erase = aduc702x_erase,
418 .protect = aduc702x_protect,
419 .write = aduc702x_write,
420 .read = default_flash_read,
421 .probe = aduc702x_probe,
422 .auto_probe = aduc702x_probe,
423 .erase_check = default_flash_blank_check,
424 .protect_check = aduc702x_protect_check,
425 .info = aduc702x_info
426 };

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