1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de> *
3 * Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
4 * Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
6 * Partially based on drivers/mtd/nand_ids.c from Linux. *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 /* configured NAND devices and NAND Flash command handler */
30 struct nand_device
*nand_devices
= NULL
;
32 void nand_device_add(struct nand_device
*c
)
35 struct nand_device
*p
= nand_devices
;
36 while (p
&& p
->next
) p
= p
->next
;
45 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
48 * Pagesize; 0, 256, 512
49 * 0 get this information from the extended chip ID
50 * 256 256 Byte page size
51 * 512 512 Byte page size
53 static struct nand_info nand_flash_ids
[] =
55 /* start "museum" IDs */
56 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
57 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
58 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
59 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
60 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
61 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
62 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
63 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
64 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
65 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
67 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
68 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
69 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
70 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
71 /* end "museum" IDs */
73 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
74 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
75 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
76 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
78 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
79 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
80 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
81 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
83 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
84 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
85 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
86 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
88 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
89 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
90 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
91 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
92 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
93 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
94 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
96 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
98 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS
},
99 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS
},
100 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16
},
101 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16
},
103 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS
},
104 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS
},
105 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16
},
106 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16
},
108 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS
},
109 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS
},
110 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16
},
111 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16
},
113 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS
},
114 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS
},
115 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16
},
116 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16
},
118 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS
},
119 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS
},
120 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16
},
121 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16
},
123 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS
},
124 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS
},
125 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16
},
126 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16
},
128 {NULL
, 0, 0, 0, 0, 0 }
131 /* Manufacturer ID list
133 static struct nand_manufacturer nand_manuf_ids
[] =
136 {NAND_MFR_TOSHIBA
, "Toshiba"},
137 {NAND_MFR_SAMSUNG
, "Samsung"},
138 {NAND_MFR_FUJITSU
, "Fujitsu"},
139 {NAND_MFR_NATIONAL
, "National"},
140 {NAND_MFR_RENESAS
, "Renesas"},
141 {NAND_MFR_STMICRO
, "ST Micro"},
142 {NAND_MFR_HYNIX
, "Hynix"},
143 {NAND_MFR_MICRON
, "Micron"},
148 * Define default oob placement schemes for large and small page devices
152 static struct nand_ecclayout nand_oob_8
= {
164 * Returns the flash bank specified by @a name, which matches the
165 * driver name and a suffix (option) specify the driver-specific
166 * bank number. The suffix consists of the '.' and the driver-specific
167 * bank number: when two davinci banks are defined, then 'davinci.1' refers
168 * to the second (e.g. DM355EVM).
170 static struct nand_device
*get_nand_device_by_name(const char *name
)
172 unsigned requested
= get_flash_name_index(name
);
175 struct nand_device
*nand
;
176 for (nand
= nand_devices
; NULL
!= nand
; nand
= nand
->next
)
178 if (strcmp(nand
->name
, name
) == 0)
180 if (!flash_driver_name_matches(nand
->controller
->name
, name
))
182 if (++found
< requested
)
189 struct nand_device
*get_nand_device_by_num(int num
)
191 struct nand_device
*p
;
194 for (p
= nand_devices
; p
; p
= p
->next
)
205 COMMAND_HELPER(nand_command_get_device
, unsigned name_index
,
206 struct nand_device
**nand
)
208 const char *str
= CMD_ARGV
[name_index
];
209 *nand
= get_nand_device_by_name(str
);
214 COMMAND_PARSE_NUMBER(uint
, str
, num
);
215 *nand
= get_nand_device_by_num(num
);
217 command_print(CMD_CTX
, "NAND flash device '%s' not found", str
);
218 return ERROR_INVALID_ARGUMENTS
;
223 int nand_build_bbt(struct nand_device
*nand
, int first
, int last
)
227 int pages_per_block
= (nand
->erase_size
/ nand
->page_size
);
231 if ((first
< 0) || (first
>= nand
->num_blocks
))
234 if ((last
>= nand
->num_blocks
) || (last
== -1))
235 last
= nand
->num_blocks
- 1;
237 page
= first
* pages_per_block
;
238 for (i
= first
; i
<= last
; i
++)
240 ret
= nand_read_page(nand
, page
, NULL
, 0, oob
, 6);
244 if (((nand
->device
->options
& NAND_BUSWIDTH_16
) && ((oob
[0] & oob
[1]) != 0xff))
245 || (((nand
->page_size
== 512) && (oob
[5] != 0xff)) ||
246 ((nand
->page_size
== 2048) && (oob
[0] != 0xff))))
248 LOG_WARNING("bad block: %i", i
);
249 nand
->blocks
[i
].is_bad
= 1;
253 nand
->blocks
[i
].is_bad
= 0;
256 page
+= pages_per_block
;
262 int nand_read_status(struct nand_device
*nand
, uint8_t *status
)
265 return ERROR_NAND_DEVICE_NOT_PROBED
;
267 /* Send read status command */
268 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
273 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
276 nand
->controller
->read_data(nand
, &data
);
277 *status
= data
& 0xff;
281 nand
->controller
->read_data(nand
, status
);
287 static int nand_poll_ready(struct nand_device
*nand
, int timeout
)
291 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
293 if (nand
->device
->options
& NAND_BUSWIDTH_16
) {
295 nand
->controller
->read_data(nand
, &data
);
296 status
= data
& 0xff;
298 nand
->controller
->read_data(nand
, &status
);
300 if (status
& NAND_STATUS_READY
)
305 return (status
& NAND_STATUS_READY
) != 0;
308 int nand_probe(struct nand_device
*nand
)
310 uint8_t manufacturer_id
, device_id
;
315 /* clear device data */
317 nand
->manufacturer
= NULL
;
319 /* clear device parameters */
321 nand
->address_cycles
= 0;
323 nand
->erase_size
= 0;
325 /* initialize controller (device parameters are zero, use controller default) */
326 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
330 case ERROR_NAND_OPERATION_FAILED
:
331 LOG_DEBUG("controller initialization failed");
332 return ERROR_NAND_OPERATION_FAILED
;
333 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
334 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
335 return ERROR_NAND_OPERATION_FAILED
;
337 LOG_ERROR("BUG: unknown controller initialization failure");
338 return ERROR_NAND_OPERATION_FAILED
;
342 nand
->controller
->command(nand
, NAND_CMD_RESET
);
343 nand
->controller
->reset(nand
);
345 nand
->controller
->command(nand
, NAND_CMD_READID
);
346 nand
->controller
->address(nand
, 0x0);
348 if (nand
->bus_width
== 8)
350 nand
->controller
->read_data(nand
, &manufacturer_id
);
351 nand
->controller
->read_data(nand
, &device_id
);
356 nand
->controller
->read_data(nand
, &data_buf
);
357 manufacturer_id
= data_buf
& 0xff;
358 nand
->controller
->read_data(nand
, &data_buf
);
359 device_id
= data_buf
& 0xff;
362 for (i
= 0; nand_flash_ids
[i
].name
; i
++)
364 if (nand_flash_ids
[i
].id
== device_id
)
366 nand
->device
= &nand_flash_ids
[i
];
371 for (i
= 0; nand_manuf_ids
[i
].name
; i
++)
373 if (nand_manuf_ids
[i
].id
== manufacturer_id
)
375 nand
->manufacturer
= &nand_manuf_ids
[i
];
380 if (!nand
->manufacturer
)
382 nand
->manufacturer
= &nand_manuf_ids
[0];
383 nand
->manufacturer
->id
= manufacturer_id
;
388 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
389 manufacturer_id
, device_id
);
390 return ERROR_NAND_OPERATION_FAILED
;
393 LOG_DEBUG("found %s (%s)", nand
->device
->name
, nand
->manufacturer
->name
);
395 /* initialize device parameters */
398 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
399 nand
->bus_width
= 16;
403 /* Do we need extended device probe information? */
404 if (nand
->device
->page_size
== 0 ||
405 nand
->device
->erase_size
== 0)
407 if (nand
->bus_width
== 8)
409 nand
->controller
->read_data(nand
, id_buff
+ 3);
410 nand
->controller
->read_data(nand
, id_buff
+ 4);
411 nand
->controller
->read_data(nand
, id_buff
+ 5);
417 nand
->controller
->read_data(nand
, &data_buf
);
418 id_buff
[3] = data_buf
;
420 nand
->controller
->read_data(nand
, &data_buf
);
421 id_buff
[4] = data_buf
;
423 nand
->controller
->read_data(nand
, &data_buf
);
424 id_buff
[5] = data_buf
>> 8;
429 if (nand
->device
->page_size
== 0)
431 nand
->page_size
= 1 << (10 + (id_buff
[4] & 3));
433 else if (nand
->device
->page_size
== 256)
435 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
436 return ERROR_NAND_OPERATION_FAILED
;
440 nand
->page_size
= nand
->device
->page_size
;
443 /* number of address cycles */
444 if (nand
->page_size
<= 512)
446 /* small page devices */
447 if (nand
->device
->chip_size
<= 32)
448 nand
->address_cycles
= 3;
449 else if (nand
->device
->chip_size
<= 8*1024)
450 nand
->address_cycles
= 4;
453 LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
454 nand
->address_cycles
= 5;
459 /* large page devices */
460 if (nand
->device
->chip_size
<= 128)
461 nand
->address_cycles
= 4;
462 else if (nand
->device
->chip_size
<= 32*1024)
463 nand
->address_cycles
= 5;
466 LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
467 nand
->address_cycles
= 6;
472 if (nand
->device
->erase_size
== 0)
474 switch ((id_buff
[4] >> 4) & 3) {
476 nand
->erase_size
= 64 << 10;
479 nand
->erase_size
= 128 << 10;
482 nand
->erase_size
= 256 << 10;
485 nand
->erase_size
=512 << 10;
491 nand
->erase_size
= nand
->device
->erase_size
;
494 /* initialize controller, but leave parameters at the controllers default */
495 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
499 case ERROR_NAND_OPERATION_FAILED
:
500 LOG_DEBUG("controller initialization failed");
501 return ERROR_NAND_OPERATION_FAILED
;
502 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
503 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
504 nand
->bus_width
, nand
->address_cycles
, nand
->page_size
);
505 return ERROR_NAND_OPERATION_FAILED
;
507 LOG_ERROR("BUG: unknown controller initialization failure");
508 return ERROR_NAND_OPERATION_FAILED
;
512 nand
->num_blocks
= (nand
->device
->chip_size
* 1024) / (nand
->erase_size
/ 1024);
513 nand
->blocks
= malloc(sizeof(struct nand_block
) * nand
->num_blocks
);
515 for (i
= 0; i
< nand
->num_blocks
; i
++)
517 nand
->blocks
[i
].size
= nand
->erase_size
;
518 nand
->blocks
[i
].offset
= i
* nand
->erase_size
;
519 nand
->blocks
[i
].is_erased
= -1;
520 nand
->blocks
[i
].is_bad
= -1;
526 int nand_erase(struct nand_device
*nand
, int first_block
, int last_block
)
534 return ERROR_NAND_DEVICE_NOT_PROBED
;
536 if ((first_block
< 0) || (last_block
>= nand
->num_blocks
))
537 return ERROR_INVALID_ARGUMENTS
;
539 /* make sure we know if a block is bad before erasing it */
540 for (i
= first_block
; i
<= last_block
; i
++)
542 if (nand
->blocks
[i
].is_bad
== -1)
544 nand_build_bbt(nand
, i
, last_block
);
549 for (i
= first_block
; i
<= last_block
; i
++)
551 /* Send erase setup command */
552 nand
->controller
->command(nand
, NAND_CMD_ERASE1
);
554 page
= i
* (nand
->erase_size
/ nand
->page_size
);
556 /* Send page address */
557 if (nand
->page_size
<= 512)
560 nand
->controller
->address(nand
, page
& 0xff);
561 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
563 /* 3rd cycle only on devices with more than 32 MiB */
564 if (nand
->address_cycles
>= 4)
565 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
567 /* 4th cycle only on devices with more than 8 GiB */
568 if (nand
->address_cycles
>= 5)
569 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
574 nand
->controller
->address(nand
, page
& 0xff);
575 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
577 /* 3rd cycle only on devices with more than 128 MiB */
578 if (nand
->address_cycles
>= 5)
579 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
582 /* Send erase confirm command */
583 nand
->controller
->command(nand
, NAND_CMD_ERASE2
);
585 retval
= nand
->controller
->nand_ready
?
586 nand
->controller
->nand_ready(nand
, 1000) :
587 nand_poll_ready(nand
, 1000);
589 LOG_ERROR("timeout waiting for NAND flash block erase to complete");
590 return ERROR_NAND_OPERATION_TIMEOUT
;
593 if ((retval
= nand_read_status(nand
, &status
)) != ERROR_OK
)
595 LOG_ERROR("couldn't read status");
596 return ERROR_NAND_OPERATION_FAILED
;
601 LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
602 (nand
->blocks
[i
].is_bad
== 1)
605 /* continue; other blocks might still be erasable */
608 nand
->blocks
[i
].is_erased
= 1;
615 static int nand_read_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
620 return ERROR_NAND_DEVICE_NOT_PROBED
;
622 if (address
% nand
->page_size
)
624 LOG_ERROR("reads need to be page aligned");
625 return ERROR_NAND_OPERATION_FAILED
;
628 page
= malloc(nand
->page_size
);
630 while (data_size
> 0)
632 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
633 uint32_t page_address
;
636 page_address
= address
/ nand
->page_size
;
638 nand_read_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
640 memcpy(data
, page
, thisrun_size
);
642 address
+= thisrun_size
;
643 data
+= thisrun_size
;
644 data_size
-= thisrun_size
;
652 static int nand_write_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
657 return ERROR_NAND_DEVICE_NOT_PROBED
;
659 if (address
% nand
->page_size
)
661 LOG_ERROR("writes need to be page aligned");
662 return ERROR_NAND_OPERATION_FAILED
;
665 page
= malloc(nand
->page_size
);
667 while (data_size
> 0)
669 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
670 uint32_t page_address
;
672 memset(page
, 0xff, nand
->page_size
);
673 memcpy(page
, data
, thisrun_size
);
675 page_address
= address
/ nand
->page_size
;
677 nand_write_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
679 address
+= thisrun_size
;
680 data
+= thisrun_size
;
681 data_size
-= thisrun_size
;
690 int nand_write_page(struct nand_device
*nand
, uint32_t page
,
691 uint8_t *data
, uint32_t data_size
,
692 uint8_t *oob
, uint32_t oob_size
)
697 return ERROR_NAND_DEVICE_NOT_PROBED
;
699 block
= page
/ (nand
->erase_size
/ nand
->page_size
);
700 if (nand
->blocks
[block
].is_erased
== 1)
701 nand
->blocks
[block
].is_erased
= 0;
703 if (nand
->use_raw
|| nand
->controller
->write_page
== NULL
)
704 return nand_write_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
706 return nand
->controller
->write_page(nand
, page
, data
, data_size
, oob
, oob_size
);
709 int nand_read_page(struct nand_device
*nand
, uint32_t page
,
710 uint8_t *data
, uint32_t data_size
,
711 uint8_t *oob
, uint32_t oob_size
)
714 return ERROR_NAND_DEVICE_NOT_PROBED
;
716 if (nand
->use_raw
|| nand
->controller
->read_page
== NULL
)
717 return nand_read_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
719 return nand
->controller
->read_page(nand
, page
, data
, data_size
, oob
, oob_size
);
722 int nand_page_command(struct nand_device
*nand
, uint32_t page
,
723 uint8_t cmd
, bool oob_only
)
726 return ERROR_NAND_DEVICE_NOT_PROBED
;
728 if (oob_only
&& NAND_CMD_READ0
== cmd
&& nand
->page_size
<= 512)
729 cmd
= NAND_CMD_READOOB
;
731 nand
->controller
->command(nand
, cmd
);
733 if (nand
->page_size
<= 512) {
734 /* small page device */
736 /* column (always 0, we start at the beginning of a page/OOB area) */
737 nand
->controller
->address(nand
, 0x0);
740 nand
->controller
->address(nand
, page
& 0xff);
741 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
743 /* 4th cycle only on devices with more than 32 MiB */
744 if (nand
->address_cycles
>= 4)
745 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
747 /* 5th cycle only on devices with more than 8 GiB */
748 if (nand
->address_cycles
>= 5)
749 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
751 /* large page device */
753 /* column (0 when we start at the beginning of a page,
754 * or 2048 for the beginning of OOB area)
756 nand
->controller
->address(nand
, 0x0);
758 nand
->controller
->address(nand
, 0x8);
760 nand
->controller
->address(nand
, 0x0);
763 nand
->controller
->address(nand
, page
& 0xff);
764 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
766 /* 5th cycle only on devices with more than 128 MiB */
767 if (nand
->address_cycles
>= 5)
768 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
770 /* large page devices need a start command if reading */
771 if (NAND_CMD_READ0
== cmd
)
772 nand
->controller
->command(nand
, NAND_CMD_READSTART
);
775 if (nand
->controller
->nand_ready
) {
776 if (!nand
->controller
->nand_ready(nand
, 100))
777 return ERROR_NAND_OPERATION_TIMEOUT
;
785 int nand_read_data_page(struct nand_device
*nand
, uint8_t *data
, uint32_t size
)
787 int retval
= ERROR_NAND_NO_BUFFER
;
789 if (nand
->controller
->read_block_data
!= NULL
)
790 retval
= (nand
->controller
->read_block_data
)(nand
, data
, size
);
792 if (ERROR_NAND_NO_BUFFER
== retval
) {
794 int incr
= (nand
->device
->options
& NAND_BUSWIDTH_16
) ? 2 : 1;
797 for (i
= 0; retval
== ERROR_OK
&& i
< size
; i
+= incr
) {
798 retval
= nand
->controller
->read_data(nand
, data
);
806 int nand_read_page_raw(struct nand_device
*nand
, uint32_t page
,
807 uint8_t *data
, uint32_t data_size
,
808 uint8_t *oob
, uint32_t oob_size
)
812 retval
= nand_page_command(nand
, page
, NAND_CMD_READ0
, !data
);
813 if (ERROR_OK
!= retval
)
817 nand_read_data_page(nand
, data
, data_size
);
820 nand_read_data_page(nand
, oob
, oob_size
);
825 int nand_write_data_page(struct nand_device
*nand
, uint8_t *data
, uint32_t size
)
827 int retval
= ERROR_NAND_NO_BUFFER
;
829 if (nand
->controller
->write_block_data
!= NULL
)
830 retval
= (nand
->controller
->write_block_data
)(nand
, data
, size
);
832 if (ERROR_NAND_NO_BUFFER
== retval
) {
833 bool is16bit
= nand
->device
->options
& NAND_BUSWIDTH_16
;
834 uint32_t incr
= is16bit
? 2 : 1;
838 for (i
= 0; i
< size
; i
+= incr
) {
840 write_data
= le_to_h_u16(data
);
844 retval
= nand
->controller
->write_data(nand
, write_data
);
845 if (ERROR_OK
!= retval
)
855 int nand_write_finish(struct nand_device
*nand
)
860 nand
->controller
->command(nand
, NAND_CMD_PAGEPROG
);
862 retval
= nand
->controller
->nand_ready
?
863 nand
->controller
->nand_ready(nand
, 100) :
864 nand_poll_ready(nand
, 100);
866 return ERROR_NAND_OPERATION_TIMEOUT
;
868 retval
= nand_read_status(nand
, &status
);
869 if (ERROR_OK
!= retval
) {
870 LOG_ERROR("couldn't read status");
871 return ERROR_NAND_OPERATION_FAILED
;
874 if (status
& NAND_STATUS_FAIL
) {
875 LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
877 return ERROR_NAND_OPERATION_FAILED
;
883 int nand_write_page_raw(struct nand_device
*nand
, uint32_t page
,
884 uint8_t *data
, uint32_t data_size
,
885 uint8_t *oob
, uint32_t oob_size
)
889 retval
= nand_page_command(nand
, page
, NAND_CMD_SEQIN
, !data
);
890 if (ERROR_OK
!= retval
)
894 retval
= nand_write_data_page(nand
, data
, data_size
);
895 if (ERROR_OK
!= retval
) {
896 LOG_ERROR("Unable to write data to NAND device");
902 retval
= nand_write_data_page(nand
, oob
, oob_size
);
903 if (ERROR_OK
!= retval
) {
904 LOG_ERROR("Unable to write OOB data to NAND device");
909 return nand_write_finish(nand
);
Linking to existing account procedure
If you already have an account and want to add another login method
you
MUST first sign in with your existing account and
then change URL to read
https://review.openocd.org/login/?link
to get to this page again but this time it'll work for linking. Thank you.
SSH host keys fingerprints
1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=.. |
|+o.. . |
|*.o . . |
|+B . . . |
|Bo. = o S |
|Oo.+ + = |
|oB=.* = . o |
| =+=.+ + E |
|. .=o . o |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)