1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de> *
3 * Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
4 * Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
6 * Partially based on drivers/mtd/nand_ids.c from Linux. *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 /* configured NAND devices and NAND Flash command handler */
30 struct nand_device
*nand_devices
= NULL
;
32 void nand_device_add(struct nand_device
*c
)
35 struct nand_device
*p
= nand_devices
;
36 while (p
&& p
->next
) p
= p
->next
;
45 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
48 * Pagesize; 0, 256, 512
49 * 0 get this information from the extended chip ID
50 * 256 256 Byte page size
51 * 512 512 Byte page size
53 static struct nand_info nand_flash_ids
[] =
55 /* start "museum" IDs */
56 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
57 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
58 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
59 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
60 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
61 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
62 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
63 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
64 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
65 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
67 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
68 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
69 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
70 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
71 /* end "museum" IDs */
73 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
74 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
75 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
76 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
78 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
79 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
80 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
81 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
83 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
84 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
85 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
86 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
88 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
89 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
90 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
91 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
92 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
93 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
94 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
96 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
98 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS
},
99 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS
},
100 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16
},
101 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16
},
103 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS
},
104 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS
},
105 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16
},
106 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16
},
108 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS
},
109 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS
},
110 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16
},
111 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16
},
113 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS
},
114 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS
},
115 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16
},
116 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16
},
118 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS
},
119 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS
},
120 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16
},
121 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16
},
123 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS
},
124 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS
},
125 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16
},
126 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16
},
128 {NULL
, 0, 0, 0, 0, 0 }
131 /* Manufacturer ID list
133 static struct nand_manufacturer nand_manuf_ids
[] =
136 {NAND_MFR_TOSHIBA
, "Toshiba"},
137 {NAND_MFR_SAMSUNG
, "Samsung"},
138 {NAND_MFR_FUJITSU
, "Fujitsu"},
139 {NAND_MFR_NATIONAL
, "National"},
140 {NAND_MFR_RENESAS
, "Renesas"},
141 {NAND_MFR_STMICRO
, "ST Micro"},
142 {NAND_MFR_HYNIX
, "Hynix"},
143 {NAND_MFR_MICRON
, "Micron"},
148 * Define default oob placement schemes for large and small page devices
152 static struct nand_ecclayout nand_oob_8
= {
163 struct nand_device
*get_nand_device_by_name(const char *name
)
165 unsigned requested
= get_flash_name_index(name
);
168 struct nand_device
*nand
;
169 for (nand
= nand_devices
; NULL
!= nand
; nand
= nand
->next
)
171 if (strcmp(nand
->name
, name
) == 0)
173 if (!flash_driver_name_matches(nand
->controller
->name
, name
))
175 if (++found
< requested
)
182 struct nand_device
*get_nand_device_by_num(int num
)
184 struct nand_device
*p
;
187 for (p
= nand_devices
; p
; p
= p
->next
)
198 COMMAND_HELPER(nand_command_get_device
, unsigned name_index
,
199 struct nand_device
**nand
)
201 const char *str
= CMD_ARGV
[name_index
];
202 *nand
= get_nand_device_by_name(str
);
207 COMMAND_PARSE_NUMBER(uint
, str
, num
);
208 *nand
= get_nand_device_by_num(num
);
210 command_print(CMD_CTX
, "NAND flash device '%s' not found", str
);
211 return ERROR_INVALID_ARGUMENTS
;
216 int nand_build_bbt(struct nand_device
*nand
, int first
, int last
)
222 if ((first
< 0) || (first
>= nand
->num_blocks
))
225 if ((last
>= nand
->num_blocks
) || (last
== -1))
226 last
= nand
->num_blocks
- 1;
228 for (i
= first
; i
< last
; i
++)
230 nand_read_page(nand
, page
, NULL
, 0, oob
, 6);
232 if (((nand
->device
->options
& NAND_BUSWIDTH_16
) && ((oob
[0] & oob
[1]) != 0xff))
233 || (((nand
->page_size
== 512) && (oob
[5] != 0xff)) ||
234 ((nand
->page_size
== 2048) && (oob
[0] != 0xff))))
236 LOG_WARNING("bad block: %i", i
);
237 nand
->blocks
[i
].is_bad
= 1;
241 nand
->blocks
[i
].is_bad
= 0;
244 page
+= (nand
->erase_size
/ nand
->page_size
);
250 int nand_read_status(struct nand_device
*nand
, uint8_t *status
)
253 return ERROR_NAND_DEVICE_NOT_PROBED
;
255 /* Send read status command */
256 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
261 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
264 nand
->controller
->read_data(nand
, &data
);
265 *status
= data
& 0xff;
269 nand
->controller
->read_data(nand
, status
);
275 static int nand_poll_ready(struct nand_device
*nand
, int timeout
)
279 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
281 if (nand
->device
->options
& NAND_BUSWIDTH_16
) {
283 nand
->controller
->read_data(nand
, &data
);
284 status
= data
& 0xff;
286 nand
->controller
->read_data(nand
, &status
);
288 if (status
& NAND_STATUS_READY
)
293 return (status
& NAND_STATUS_READY
) != 0;
296 int nand_probe(struct nand_device
*nand
)
298 uint8_t manufacturer_id
, device_id
;
303 /* clear device data */
305 nand
->manufacturer
= NULL
;
307 /* clear device parameters */
309 nand
->address_cycles
= 0;
311 nand
->erase_size
= 0;
313 /* initialize controller (device parameters are zero, use controller default) */
314 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
318 case ERROR_NAND_OPERATION_FAILED
:
319 LOG_DEBUG("controller initialization failed");
320 return ERROR_NAND_OPERATION_FAILED
;
321 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
322 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
323 return ERROR_NAND_OPERATION_FAILED
;
325 LOG_ERROR("BUG: unknown controller initialization failure");
326 return ERROR_NAND_OPERATION_FAILED
;
330 nand
->controller
->command(nand
, NAND_CMD_RESET
);
331 nand
->controller
->reset(nand
);
333 nand
->controller
->command(nand
, NAND_CMD_READID
);
334 nand
->controller
->address(nand
, 0x0);
336 if (nand
->bus_width
== 8)
338 nand
->controller
->read_data(nand
, &manufacturer_id
);
339 nand
->controller
->read_data(nand
, &device_id
);
344 nand
->controller
->read_data(nand
, &data_buf
);
345 manufacturer_id
= data_buf
& 0xff;
346 nand
->controller
->read_data(nand
, &data_buf
);
347 device_id
= data_buf
& 0xff;
350 for (i
= 0; nand_flash_ids
[i
].name
; i
++)
352 if (nand_flash_ids
[i
].id
== device_id
)
354 nand
->device
= &nand_flash_ids
[i
];
359 for (i
= 0; nand_manuf_ids
[i
].name
; i
++)
361 if (nand_manuf_ids
[i
].id
== manufacturer_id
)
363 nand
->manufacturer
= &nand_manuf_ids
[i
];
368 if (!nand
->manufacturer
)
370 nand
->manufacturer
= &nand_manuf_ids
[0];
371 nand
->manufacturer
->id
= manufacturer_id
;
376 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
377 manufacturer_id
, device_id
);
378 return ERROR_NAND_OPERATION_FAILED
;
381 LOG_DEBUG("found %s (%s)", nand
->device
->name
, nand
->manufacturer
->name
);
383 /* initialize device parameters */
386 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
387 nand
->bus_width
= 16;
391 /* Do we need extended device probe information? */
392 if (nand
->device
->page_size
== 0 ||
393 nand
->device
->erase_size
== 0)
395 if (nand
->bus_width
== 8)
397 nand
->controller
->read_data(nand
, id_buff
+ 3);
398 nand
->controller
->read_data(nand
, id_buff
+ 4);
399 nand
->controller
->read_data(nand
, id_buff
+ 5);
405 nand
->controller
->read_data(nand
, &data_buf
);
406 id_buff
[3] = data_buf
;
408 nand
->controller
->read_data(nand
, &data_buf
);
409 id_buff
[4] = data_buf
;
411 nand
->controller
->read_data(nand
, &data_buf
);
412 id_buff
[5] = data_buf
>> 8;
417 if (nand
->device
->page_size
== 0)
419 nand
->page_size
= 1 << (10 + (id_buff
[4] & 3));
421 else if (nand
->device
->page_size
== 256)
423 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
424 return ERROR_NAND_OPERATION_FAILED
;
428 nand
->page_size
= nand
->device
->page_size
;
431 /* number of address cycles */
432 if (nand
->page_size
<= 512)
434 /* small page devices */
435 if (nand
->device
->chip_size
<= 32)
436 nand
->address_cycles
= 3;
437 else if (nand
->device
->chip_size
<= 8*1024)
438 nand
->address_cycles
= 4;
441 LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
442 nand
->address_cycles
= 5;
447 /* large page devices */
448 if (nand
->device
->chip_size
<= 128)
449 nand
->address_cycles
= 4;
450 else if (nand
->device
->chip_size
<= 32*1024)
451 nand
->address_cycles
= 5;
454 LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
455 nand
->address_cycles
= 6;
460 if (nand
->device
->erase_size
== 0)
462 switch ((id_buff
[4] >> 4) & 3) {
464 nand
->erase_size
= 64 << 10;
467 nand
->erase_size
= 128 << 10;
470 nand
->erase_size
= 256 << 10;
473 nand
->erase_size
=512 << 10;
479 nand
->erase_size
= nand
->device
->erase_size
;
482 /* initialize controller, but leave parameters at the controllers default */
483 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
487 case ERROR_NAND_OPERATION_FAILED
:
488 LOG_DEBUG("controller initialization failed");
489 return ERROR_NAND_OPERATION_FAILED
;
490 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
491 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
492 nand
->bus_width
, nand
->address_cycles
, nand
->page_size
);
493 return ERROR_NAND_OPERATION_FAILED
;
495 LOG_ERROR("BUG: unknown controller initialization failure");
496 return ERROR_NAND_OPERATION_FAILED
;
500 nand
->num_blocks
= (nand
->device
->chip_size
* 1024) / (nand
->erase_size
/ 1024);
501 nand
->blocks
= malloc(sizeof(struct nand_block
) * nand
->num_blocks
);
503 for (i
= 0; i
< nand
->num_blocks
; i
++)
505 nand
->blocks
[i
].size
= nand
->erase_size
;
506 nand
->blocks
[i
].offset
= i
* nand
->erase_size
;
507 nand
->blocks
[i
].is_erased
= -1;
508 nand
->blocks
[i
].is_bad
= -1;
514 int nand_erase(struct nand_device
*nand
, int first_block
, int last_block
)
522 return ERROR_NAND_DEVICE_NOT_PROBED
;
524 if ((first_block
< 0) || (last_block
> nand
->num_blocks
))
525 return ERROR_INVALID_ARGUMENTS
;
527 /* make sure we know if a block is bad before erasing it */
528 for (i
= first_block
; i
<= last_block
; i
++)
530 if (nand
->blocks
[i
].is_bad
== -1)
532 nand_build_bbt(nand
, i
, last_block
);
537 for (i
= first_block
; i
<= last_block
; i
++)
539 /* Send erase setup command */
540 nand
->controller
->command(nand
, NAND_CMD_ERASE1
);
542 page
= i
* (nand
->erase_size
/ nand
->page_size
);
544 /* Send page address */
545 if (nand
->page_size
<= 512)
548 nand
->controller
->address(nand
, page
& 0xff);
549 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
551 /* 3rd cycle only on devices with more than 32 MiB */
552 if (nand
->address_cycles
>= 4)
553 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
555 /* 4th cycle only on devices with more than 8 GiB */
556 if (nand
->address_cycles
>= 5)
557 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
562 nand
->controller
->address(nand
, page
& 0xff);
563 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
565 /* 3rd cycle only on devices with more than 128 MiB */
566 if (nand
->address_cycles
>= 5)
567 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
570 /* Send erase confirm command */
571 nand
->controller
->command(nand
, NAND_CMD_ERASE2
);
573 retval
= nand
->controller
->nand_ready
?
574 nand
->controller
->nand_ready(nand
, 1000) :
575 nand_poll_ready(nand
, 1000);
577 LOG_ERROR("timeout waiting for NAND flash block erase to complete");
578 return ERROR_NAND_OPERATION_TIMEOUT
;
581 if ((retval
= nand_read_status(nand
, &status
)) != ERROR_OK
)
583 LOG_ERROR("couldn't read status");
584 return ERROR_NAND_OPERATION_FAILED
;
589 LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
590 (nand
->blocks
[i
].is_bad
== 1)
593 /* continue; other blocks might still be erasable */
596 nand
->blocks
[i
].is_erased
= 1;
603 static int nand_read_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
608 return ERROR_NAND_DEVICE_NOT_PROBED
;
610 if (address
% nand
->page_size
)
612 LOG_ERROR("reads need to be page aligned");
613 return ERROR_NAND_OPERATION_FAILED
;
616 page
= malloc(nand
->page_size
);
618 while (data_size
> 0)
620 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
621 uint32_t page_address
;
624 page_address
= address
/ nand
->page_size
;
626 nand_read_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
628 memcpy(data
, page
, thisrun_size
);
630 address
+= thisrun_size
;
631 data
+= thisrun_size
;
632 data_size
-= thisrun_size
;
640 static int nand_write_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
645 return ERROR_NAND_DEVICE_NOT_PROBED
;
647 if (address
% nand
->page_size
)
649 LOG_ERROR("writes need to be page aligned");
650 return ERROR_NAND_OPERATION_FAILED
;
653 page
= malloc(nand
->page_size
);
655 while (data_size
> 0)
657 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
658 uint32_t page_address
;
660 memset(page
, 0xff, nand
->page_size
);
661 memcpy(page
, data
, thisrun_size
);
663 page_address
= address
/ nand
->page_size
;
665 nand_write_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
667 address
+= thisrun_size
;
668 data
+= thisrun_size
;
669 data_size
-= thisrun_size
;
678 int nand_write_page(struct nand_device
*nand
, uint32_t page
,
679 uint8_t *data
, uint32_t data_size
,
680 uint8_t *oob
, uint32_t oob_size
)
685 return ERROR_NAND_DEVICE_NOT_PROBED
;
687 block
= page
/ (nand
->erase_size
/ nand
->page_size
);
688 if (nand
->blocks
[block
].is_erased
== 1)
689 nand
->blocks
[block
].is_erased
= 0;
691 if (nand
->use_raw
|| nand
->controller
->write_page
== NULL
)
692 return nand_write_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
694 return nand
->controller
->write_page(nand
, page
, data
, data_size
, oob
, oob_size
);
697 int nand_read_page(struct nand_device
*nand
, uint32_t page
,
698 uint8_t *data
, uint32_t data_size
,
699 uint8_t *oob
, uint32_t oob_size
)
702 return ERROR_NAND_DEVICE_NOT_PROBED
;
704 if (nand
->use_raw
|| nand
->controller
->read_page
== NULL
)
705 return nand_read_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
707 return nand
->controller
->read_page(nand
, page
, data
, data_size
, oob
, oob_size
);
710 int nand_page_command(struct nand_device
*nand
, uint32_t page
,
711 uint8_t cmd
, bool oob_only
)
714 return ERROR_NAND_DEVICE_NOT_PROBED
;
716 if (oob_only
&& NAND_CMD_READ0
== cmd
&& nand
->page_size
<= 512)
717 cmd
= NAND_CMD_READOOB
;
719 nand
->controller
->command(nand
, cmd
);
721 if (nand
->page_size
<= 512) {
722 /* small page device */
724 /* column (always 0, we start at the beginning of a page/OOB area) */
725 nand
->controller
->address(nand
, 0x0);
728 nand
->controller
->address(nand
, page
& 0xff);
729 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
731 /* 4th cycle only on devices with more than 32 MiB */
732 if (nand
->address_cycles
>= 4)
733 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
735 /* 5th cycle only on devices with more than 8 GiB */
736 if (nand
->address_cycles
>= 5)
737 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
739 /* large page device */
741 /* column (0 when we start at the beginning of a page,
742 * or 2048 for the beginning of OOB area)
744 nand
->controller
->address(nand
, 0x0);
746 nand
->controller
->address(nand
, 0x8);
748 nand
->controller
->address(nand
, 0x0);
751 nand
->controller
->address(nand
, page
& 0xff);
752 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
754 /* 5th cycle only on devices with more than 128 MiB */
755 if (nand
->address_cycles
>= 5)
756 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
758 /* large page devices need a start command if reading */
759 if (NAND_CMD_READ0
== cmd
)
760 nand
->controller
->command(nand
, NAND_CMD_READSTART
);
763 if (nand
->controller
->nand_ready
) {
764 if (!nand
->controller
->nand_ready(nand
, 100))
765 return ERROR_NAND_OPERATION_TIMEOUT
;
773 int nand_read_data_page(struct nand_device
*nand
, uint8_t *data
, uint32_t size
)
775 int retval
= ERROR_NAND_NO_BUFFER
;
777 if (nand
->controller
->read_block_data
!= NULL
)
778 retval
= (nand
->controller
->read_block_data
)(nand
, data
, size
);
780 if (ERROR_NAND_NO_BUFFER
== retval
) {
782 int incr
= (nand
->device
->options
& NAND_BUSWIDTH_16
) ? 2 : 1;
785 for (i
= 0; retval
== ERROR_OK
&& i
< size
; i
+= incr
) {
786 retval
= nand
->controller
->read_data(nand
, data
);
794 int nand_read_page_raw(struct nand_device
*nand
, uint32_t page
,
795 uint8_t *data
, uint32_t data_size
,
796 uint8_t *oob
, uint32_t oob_size
)
800 retval
= nand_page_command(nand
, page
, NAND_CMD_READ0
, !data
);
801 if (ERROR_OK
!= retval
)
805 nand_read_data_page(nand
, data
, data_size
);
808 nand_read_data_page(nand
, oob
, oob_size
);
813 int nand_write_data_page(struct nand_device
*nand
, uint8_t *data
, uint32_t size
)
815 int retval
= ERROR_NAND_NO_BUFFER
;
817 if (nand
->controller
->write_block_data
!= NULL
)
818 retval
= (nand
->controller
->write_block_data
)(nand
, data
, size
);
820 if (ERROR_NAND_NO_BUFFER
== retval
) {
821 bool is16bit
= nand
->device
->options
& NAND_BUSWIDTH_16
;
822 uint32_t incr
= is16bit
? 2 : 1;
826 for (i
= 0; i
< size
; i
+= incr
) {
828 write_data
= le_to_h_u16(data
);
832 retval
= nand
->controller
->write_data(nand
, write_data
);
833 if (ERROR_OK
!= retval
)
843 int nand_write_finish(struct nand_device
*nand
)
848 nand
->controller
->command(nand
, NAND_CMD_PAGEPROG
);
850 retval
= nand
->controller
->nand_ready
?
851 nand
->controller
->nand_ready(nand
, 100) :
852 nand_poll_ready(nand
, 100);
854 return ERROR_NAND_OPERATION_TIMEOUT
;
856 retval
= nand_read_status(nand
, &status
);
857 if (ERROR_OK
!= retval
) {
858 LOG_ERROR("couldn't read status");
859 return ERROR_NAND_OPERATION_FAILED
;
862 if (status
& NAND_STATUS_FAIL
) {
863 LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
865 return ERROR_NAND_OPERATION_FAILED
;
871 int nand_write_page_raw(struct nand_device
*nand
, uint32_t page
,
872 uint8_t *data
, uint32_t data_size
,
873 uint8_t *oob
, uint32_t oob_size
)
877 retval
= nand_page_command(nand
, page
, NAND_CMD_SEQIN
, !data
);
878 if (ERROR_OK
!= retval
)
882 retval
= nand_write_data_page(nand
, data
, data_size
);
883 if (ERROR_OK
!= retval
) {
884 LOG_ERROR("Unable to write data to NAND device");
890 retval
= nand_write_data_page(nand
, oob
, oob_size
);
891 if (ERROR_OK
!= retval
) {
892 LOG_ERROR("Unable to write OOB data to NAND device");
897 return nand_write_finish(nand
);
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