src/flash/nand/arm_io.c

   1 /*
   2  * Copyright (C) 2009 by Marvell Semiconductors, Inc.
   3  * Written by Nicolas Pitre <nico at marvell.com>
   4  *
   5  * Copyright (C) 2009 by David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the
  19  * Free Software Foundation, Inc.,
  20  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  21  */
  22
  23 #ifdef HAVE_CONFIG_H
  24 #include "config.h"
  25 #endif
  26
  27 #include "core.h"
  28 #include "arm_io.h"
  29 #include <helper/binarybuffer.h>
  30 #include <target/arm.h>
  31 #include <target/algorithm.h>
  32
  33
  34 /**
  35  * Copies code to a working area.  This will allocate room for the code plus the
  36  * additional amount requested if the working area pointer is null.
  37  *
  38  * @param target Pointer to the target to copy code to
  39  * @param code Pointer to the code area to be copied
  40  * @param code_size Size of the code being copied
  41  * @param additional Size of the additional area to be allocated in addition to
  42  *                   code
  43  * @param area Pointer to a pointer to a working area to copy code to
  44  * @return Success or failure of the operation
  45  */
  46 static int arm_code_to_working_area(struct target *target,
  47                 const uint32_t *code, unsigned code_size,
  48                 unsigned additional, struct working_area **area)
  49 {
  50         uint8_t code_buf[code_size];
  51         unsigned i;
  52         int retval;
  53         unsigned size = code_size + additional;
  54
  55         /* REVISIT this assumes size doesn't ever change.
  56          * That's usually correct; but there are boards with
  57          * both large and small page chips, where it won't be...
  58          */
  59
  60         /* make sure we have a working area */
  61         if (NULL == *area) {
  62                 retval = target_alloc_working_area(target, size, area);
  63                 if (retval != ERROR_OK) {
  64                         LOG_DEBUG("%s: no %d byte buffer", __FUNCTION__, (int) size);
  65                         return ERROR_NAND_NO_BUFFER;
  66                 }
  67         }
  68
  69         /* buffer code in target endianness */
  70         for (i = 0; i < code_size / 4; i++)
  71                 target_buffer_set_u32(target, code_buf + i * 4, code[i]);
  72
  73         /* copy code to work area */
  74         retval = target_write_memory(target, (*area)->address,
  75                         4, code_size / 4, code_buf);
  76
  77         return retval;
  78 }
  79
  80 /**
  81  * ARM-specific bulk write from buffer to address of 8-bit wide NAND.
  82  * For now this only supports ARMv4 and ARMv5 cores.
  83  *
  84  * Enhancements to target_run_algorithm() could enable:
  85  *   - ARMv6 and ARMv7 cores in ARM mode
  86  *
  87  * Different code fragments could handle:
  88  *   - Thumb2 cores like Cortex-M (needs different byteswapping)
  89  *   - 16-bit wide data (needs different setup too)
  90  *
  91  * @param nand Pointer to the arm_nand_data struct that defines the I/O
  92  * @param data Pointer to the data to be copied to flash
  93  * @param size Size of the data being copied
  94  * @return Success or failure of the operation
  95  */
  96 int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
  97 {
  98         struct target           *target = nand->target;
  99         struct arm_algorithm    algo;
 100         struct arm              *arm = target->arch_info;
 101         struct reg_param        reg_params[3];
 102         uint32_t                target_buf;
 103         uint32_t                exit_var = 0;
 104         int                     retval;
 105
 106         /* Inputs:
 107          *  r0  NAND data address (byte wide)
 108          *  r1  buffer address
 109          *  r2  buffer length
 110          */
 111         static const uint32_t code[] = {
 112                 0xe4d13001,     /* s: ldrb  r3, [r1], #1 */
 113                 0xe5c03000,     /*    strb  r3, [r0]     */
 114                 0xe2522001,     /*    subs  r2, r2, #1   */
 115                 0x1afffffb,     /*    bne   s            */
 116
 117                 /* exit: ARMv4 needs hardware breakpoint */
 118                 0xe1200070,     /* e: bkpt  #0           */
 119         };
 120
 121         if (nand->op != ARM_NAND_WRITE || !nand->copy_area) {
 122                 retval = arm_code_to_working_area(target, code, sizeof(code),
 123                                 nand->chunk_size, &nand->copy_area);
 124                 if (retval != ERROR_OK) {
 125                         return retval;
 126                 }
 127         }
 128
 129         nand->op = ARM_NAND_WRITE;
 130
 131         /* copy data to work area */
 132         target_buf = nand->copy_area->address + sizeof(code);
 133         retval = target_bulk_write_memory(target, target_buf, size / 4, data);
 134         if (retval == ERROR_OK && (size & 3) != 0)
 135                 retval = target_write_memory(target,
 136                                 target_buf + (size & ~3),
 137                                 1, size & 3, data + (size & ~3));
 138         if (retval != ERROR_OK)
 139                 return retval;
 140
 141         /* set up algorithm and parameters */
 142         algo.common_magic = ARM_COMMON_MAGIC;
 143         algo.core_mode = ARM_MODE_SVC;
 144         algo.core_state = ARM_STATE_ARM;
 145
 146         init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
 147         init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
 148         init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
 149
 150         buf_set_u32(reg_params[0].value, 0, 32, nand->data);
 151         buf_set_u32(reg_params[1].value, 0, 32, target_buf);
 152         buf_set_u32(reg_params[2].value, 0, 32, size);
 153
 154         /* armv4 must exit using a hardware breakpoint */
 155         if (arm->is_armv4)
 156                 exit_var = nand->copy_area->address + sizeof(code) - 4;
 157
 158         /* use alg to write data from work area to NAND chip */
 159         retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 160                         nand->copy_area->address, exit_var, 1000, &algo);
 161         if (retval != ERROR_OK)
 162                 LOG_ERROR("error executing hosted NAND write");
 163
 164         destroy_reg_param(&reg_params[0]);
 165         destroy_reg_param(&reg_params[1]);
 166         destroy_reg_param(&reg_params[2]);
 167
 168         return retval;
 169 }
 170
 171 /**
 172  * Uses an on-chip algorithm for an ARM device to read from a NAND device and
 173  * store the data into the host machine's memory.
 174  *
 175  * @param nand Pointer to the arm_nand_data struct that defines the I/O
 176  * @param data Pointer to the data buffer to store the read data
 177  * @param size Amount of data to be stored to the buffer.
 178  * @return Success or failure of the operation
 179  */
 180 int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
 181 {
 182         struct target *target = nand->target;
 183         struct arm_algorithm algo;
 184         struct arm *arm = target->arch_info;
 185         struct reg_param reg_params[3];
 186         uint32_t target_buf;
 187         uint32_t exit_var = 0;
 188         int retval;
 189
 190         /* Inputs:
 191          *  r0  buffer address
 192          *  r1  NAND data address (byte wide)
 193          *  r2  buffer length
 194          */
 195         static const uint32_t code[] = {
 196                 0xe5d13000,     /* s: ldrb  r3, [r1]     */
 197                 0xe4c03001,     /*    strb  r3, [r0], #1 */
 198                 0xe2522001,     /*    subs  r2, r2, #1   */
 199                 0x1afffffb,     /*    bne   s            */
 200
 201                 /* exit: ARMv4 needs hardware breakpoint */
 202                 0xe1200070,     /* e: bkpt  #0           */
 203         };
 204
 205         /* create the copy area if not yet available */
 206         if (nand->op != ARM_NAND_READ || !nand->copy_area) {
 207                 retval = arm_code_to_working_area(target, code, sizeof(code),
 208                                 nand->chunk_size, &nand->copy_area);
 209                 if (retval != ERROR_OK) {
 210                         return retval;
 211                 }
 212         }
 213
 214         nand->op = ARM_NAND_READ;
 215         target_buf = nand->copy_area->address + sizeof(code);
 216
 217         /* set up algorithm and parameters */
 218         algo.common_magic = ARM_COMMON_MAGIC;
 219         algo.core_mode = ARM_MODE_SVC;
 220         algo.core_state = ARM_STATE_ARM;
 221
 222         init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
 223         init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
 224         init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
 225
 226         buf_set_u32(reg_params[0].value, 0, 32, target_buf);
 227         buf_set_u32(reg_params[1].value, 0, 32, nand->data);
 228         buf_set_u32(reg_params[2].value, 0, 32, size);
 229
 230         /* armv4 must exit using a hardware breakpoint */
 231         if (arm->is_armv4)
 232                 exit_var = nand->copy_area->address + sizeof(code) - 4;
 233
 234         /* use alg to write data from NAND chip to work area */
 235         retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 236                         nand->copy_area->address, exit_var, 1000, &algo);
 237         if (retval != ERROR_OK)
 238                 LOG_ERROR("error executing hosted NAND read");
 239
 240         destroy_reg_param(&reg_params[0]);
 241         destroy_reg_param(&reg_params[1]);
 242         destroy_reg_param(&reg_params[2]);
 243
 244         /* read from work area to the host's memory */
 245         retval = target_read_buffer(target, target_buf, size, data);
 246
 247         return retval;
 248 }
 249